aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2007-02-13[PATCH] x86-64: update IO-APIC dest field to 8-bit for xAPICBenjamin Romer
On the Unisys ES7000/ONE system, we encountered a problem where performing a kexec reboot or dump on any cell other than cell 0 causes the system timer to stop working, resulting in a hang during timer calibration in the new kernel. We traced the problem to one line of code in disable_IO_APIC(), which needs to restore the timer's IO-APIC configuration before rebooting. The code is currently using the 4-bit physical destination field, rather than using the 8-bit logical destination field, and it cuts off the upper 4 bits of the timer's APIC ID. If we change this to use the logical destination field, the timer works and we can kexec on the upper cells. This was tested on two different cells (0 and 2) in an ES7000/ONE system. For reference, the relevant Intel xAPIC spec is kept at ftp://download.intel.com/design/chipsets/e8501/datashts/30962001.pdf, specifically on page 334. Signed-off-by: Benjamin M Romer <benjamin.romer@unisys.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] i386: Remove unused kernel config option X86_XADDRobert P. J. Day
Remove the unused kernel config option X86_XADD, which is unused in any source or header file. Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] x86-64: clean up sparsemem memory_present callBob Picco
Eliminate arch specific memory_present call x86_64 NUMA by utilizing sparse_memory_present_with_active_regions. Acked-by: Mel Gorman <mel@csn.ul.ie> Signed-off-by: Bob Picco <bob.picco@hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@muc.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] i386: entry.S END/ENDPROC annotationsJan Beulich
Annotate i386/kernel/entry.S with END/ENDPROC to assist disassemblers and other analysis tools. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] i386: support Classic MediaGXmtakada
I hope to support "classic" MediaGXm in kernel. The DIR1 register of MediaGXm( or Geode) shows the following values for identify CPU. For example, My MediaGXm shows 0x42. We can read National Semiconductor's datasheet without any NDAs. http://www.national.com/pf/GX/GXLV.html from datasheets: DIR1 0x30 - 0x33 GXm rev. 1.0 - 2.3 0x34 - 0x4f GXm rev. 2.4 - 3.x 0x5x GXm rev. 5.0 - 5.4 0x6x GXLV 0x7x (unknow) 0x8x Gx1 In nsc driver of X, accept 0x30 through 0x82. What will 0x7x mean? Cc: Jordan Crouse <jordan.crouse@amd.com> Cc: Andi Kleen <ak@suse.de> Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: avoid gcc extensionRandy Dunlap
setcc() in math-emu is written as a gcc extension statement expression macro that returns a value. However, it's not used that way and it's not needed like that, so just make it a inline function so that we don't use an extension when it's not needed. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Christoph Hellwig <hch@infradead.org> Cc: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] i386: All Transmeta CPUs have constant TSCsH. Peter Anvin
All Transmeta CPUs ever produced have constant-rate TSCs. Signed-off-by: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] x86: fix laptop bootup hang in init_acpi()Ingo Molnar
During kernel bootup, a new T60 laptop (CoreDuo, 32-bit) hangs about 10%-20% of the time in acpi_init(): Calling initcall 0xc055ce1a: topology_init+0x0/0x2f() Calling initcall 0xc055d75e: mtrr_init_finialize+0x0/0x2c() Calling initcall 0xc05664f3: param_sysfs_init+0x0/0x175() Calling initcall 0xc014cb65: pm_sysrq_init+0x0/0x17() Calling initcall 0xc0569f99: init_bio+0x0/0xf4() Calling initcall 0xc056b865: genhd_device_init+0x0/0x50() Calling initcall 0xc056c4bd: fbmem_init+0x0/0x87() Calling initcall 0xc056dd74: acpi_init+0x0/0x1ee() It's a hard hang that not even an NMI could punch through! Frustratingly, adding printks or function tracing to the ACPI code made the hangs go away ... After some time an additional detail emerged: disabling the NMI watchdog made these occasional hangs go away. So i spent the better part of today trying to debug this and trying out various theories when i finally found the likely reason for the hang: if acpi_ns_initialize_devices() executes an _INI AML method and an NMI happens to hit that AML execution in the wrong moment, the machine would hang. (my theory is that this must be some sort of chipset setup method doing stores to chipset mmio registers?) Unfortunately given the characteristics of the hang it was sheer impossible to figure out which of the numerous AML methods is impacted by this problem. As a workaround i wrote an interface to disable chipset-based NMIs while executing _INI sections - and indeed this fixed the hang. I did a boot-loop of 100 separate reboots and none hung - while without the patch it would hang every 5-10 attempts. Out of caution i did not touch the nmi_watchdog=2 case (it's not related to the chipset anyway and didnt hang). I implemented this for both x86_64 and i686, tested the i686 laptop both with nmi_watchdog=1 [which triggered the hangs] and nmi_watchdog=2, and tested an Athlon64 box with the 64-bit kernel as well. Everything builds and works with the patch applied. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Len Brown <lenb@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2007-02-13[PATCH] x86-64: robustify bad_dma_address handlingMuli Ben-Yehuda
- set bad_dma_address explicitly to 0x0 - reserve 32 pages from bad_dma_address and up - WARN_ON() a driver feeding us bad_dma_address Thanks to Leo Duran <leo.duran@amd.com> for the suggestion. Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Leo Duran <leo.duran@amd.com> Cc: Job Mason <jdmason@kudzu.us>
2007-02-13[PATCH] x86-64: define dma noncoherent API functionsJeff Garzik
x86-64 is missing these: Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Don't reserve ROMsAndi Kleen
We trust the e820 table, so explicitely reserving ROMs shouldn't be needed. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Fix off by one error in IOMMU boundary checkingAndi Kleen
Should be harmless because there is normally no memory there, but technically it was incorrect. Pointed out by Leo Duran Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: x86_64 - Fix FS/GS registers for VT executionZachary Amsden
Initialize FS and GS to __KERNEL_DS as well. The actual value of them is not important, but it is important to reload them in protected mode. At this time, they still retain the real mode values from initial boot. VT disallows execution of code under such conditions, which means hardware virtualization can not be used to boot the kernel on Intel platforms, making the boot time painfully slow. This requires moving the GS load before the load of GS_BASE, so just move all the segments loads there to keep them together in the code. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Unexport __supported_pte_maskAndi Kleen
The symbol is needed to manipulate page tables, and modules shouldn't do that. Leftover from 2.4, but no in tree module should need it now. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Check return value of putreg in PTRACE_SETREGSAndi Kleen
This means if an illegal value is set for the segment registers there ptrace will error out now with an errno instead of silently ignoring it. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: - Ignore long SMI interrupts in clock calibration code - ↵Jack Steiner
update 1 Add failsafe mechanism to HPET/TSC clock calibration. Signed-off-by: Jack Steiner <steiner@sgi.com> Updated to include failsafe mechanism & additional community feedback. Patch built on latest 2.6.20-rc4-mm1 tree. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: fix size_or_mask and size_and_maskAndreas Herrmann
mtrr: fix size_or_mask and size_and_mask This fixes two bugs in /proc/mtrr interface: o If physical address size crosses the 44 bit boundary size_or_mask is evaluated wrong. o size_and_mask limits width of physical base address for an MTRR to be less than 44 bits. TBD: later patch had one more change, but I think that was bogus. TBD: need to double check Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Convert /proc/apm to seqfileAlexey Dobriyan
Byte-to-byte identical /proc/apm here. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Fix preprocessor conditionJosef 'Jeff' Sipek
Old code was legal standard C, but apparently not sparse-C. Signed-off-by: Josef 'Jeff' Sipek <jsipek@cs.sunysb.edu> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: use smp_call_function_single()Alexey Dobriyan
It will execure cpuid only on the cpu we need. Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: use smp_call_function_single()Alexey Dobriyan
It will execute rdmsr and wrmsr only on the cpu we need. Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Kconfig typosNicolas Kaiser
Some typos in Kconfig. Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Small cleanup to TLB flush codeAndi Kleen
- Remove outdated comment - Use cpu_relax() in a busy loop Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: remove get_pmd()Jan Beulich
Function is dead. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Allow to run a program when a machine check event is detectedAndi Kleen
When a machine check event is detected (including a AMD RevF threshold overflow event) allow to run a "trigger" program. This allows user space to react to such events sooner. The trigger is configured using a new trigger entry in the machinecheck sysfs interface. It is currently shared between all CPUs. I also fixed the AMD threshold handler to run the machine check polling code immediately to actually log any events that might have caused the threshold interrupt. Also added some documentation for the mce sysfs interface. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Tighten mce_amd driver MSR readsJan Beulich
while debugging an unrelated problem in Xen, I noticed odd reads from non-existent MSRs. Having now found time to look why these happen, I came up with below patch, which - prevents accessing MCi_MISCj with j > 0 when the block pointer in MCi_MISC0 is zero - accesses only contiguous MCi_MISCj until a non-implemented one is found - doesn't touch unimplemented blocks in mce_threshold_interrupt at all - gives names to two bits previously derived from MASK_VALID_HI (it took me some time to understand the code without this) The first three items, besides being apparently closer to the spec, should namely help cutting down on the time mce_threshold_interrupt() takes. Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86: simplify notify_page_fault()Jan Beulich
Remove all parameters from this function that aren't really variable. Signed-off-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: list x86_64 quilt treeRandy Dunlap
List x86_64 quilt tree in MAINTAINERS. Signed-off-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: cleanup Doc/x86_64/ filesRandy Dunlap
Fix typos. Lots of whitespace changes for readability and consistency. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in oprofileVenkatesh Pallipadi
Handle these 32 bit perfmon counter MSR writes cleanly in oprofile. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Handle 32 bit PerfMon Counter writes cleanly in i386 nmi_watchdogVenkatesh Pallipadi
Change i386 nmi handler to handle 32 bit perfmon counter MSR writes cleanly. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Handle 32 bit PerfMon Counter writes cleanly in x86_64 ↵Venkatesh Pallipadi
nmi_watchdog P6 CPUs and Core/Core 2 CPUs which has 'architectural perf mon' feature, only supports write of low 32 bits in Performance Monitoring Counters. Bits 32..39 are sign extended based on bit 31 and bits 40..63 are reserved and should be zero. This patch: Change x86_64 nmi handler to handle this case cleanly. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] x86-64: Use constant instead of raw number in x86_64 ioperm.cGlauber de Oliveira Costa
This is a tiny cleanup to increase readability Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] x86-64: Remove fastcall references in x86_64 codeGlauber de Oliveira Costa
Unlike x86, x86_64 already passes arguments in registers. The use of regparm attribute makes no difference in produced code, and the use of fastcall just bloats the code. Signed-off-by: Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] x86-64: Fix fake numa for x86_64 machines with big IO holeRohit Seth
This patch resolves the issue of running with numa=fake=X on kernel command line on x86_64 machines that have big IO hole. While calculating the size of each node now we look at the total hole size in that range. Previously there were nodes that only had IO holes in them causing kernel boot problems. We now use the NODE_MIN_SIZE (64MB) as the minimum size of memory that any node must have. We reduce the number of allocated nodes if the number of nodes specified on kernel command line results in any node getting memory smaller than NODE_MIN_SIZE. This change allows the extra memory to be incremented in NODE_MIN_SIZE granule and uniformly distribute among as many nodes (called big nodes) as possible. [akpm@osdl.org: build fix] Signed-off-by: David Rientjes <reintjes@google.com> Signed-off-by: Paul Menage <menage@google.com> Signed-off-by: Rohit Seth <rohitseth@google.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: romsignature/checksum cleanupRene Herman
Use adding __init to romsignature() (it's only called from probe_roms() which is itself __init) as an excuse to submit a pedantic cleanup. Signed-off-by: Rene Herman <rene.herman@gmail.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: improve sched_clock() on i686Ingo Molnar
Clean up sched_clock() on i686: it will use the TSC if available and falls back to jiffies only if the user asked for it to be disabled via notsc or the CPU calibration code didnt figure out the right cpu_khz. This generally makes the scheduler timestamps more finegrained, on all hardware. (the current scheduler is pretty resistant against asynchronous sched_clock() values on different CPUs, it will allow at most up to a jiffy of jitter.) Also simplify sched_clock()'s check for TSC availability: propagate the desire and ability to use the TSC into the tsc_disable flag, previously this flag only indicated whether the notsc option was passed. This makes the rare low-res sched_clock() codepath a single branch off a read-mostly flag. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: add idle notifierStephane Eranian
Add a notifier mechanism to the low level idle loop. You can register a callback function which gets invoked on entry and exit from the low level idle loop. The low level idle loop is defined as the polling loop, low-power call, or the mwait instruction. Interrupts processed by the idle thread are not considered part of the low level loop. The notifier can be used to measure precisely how much is spent in useless execution (or low power mode). The perfmon subsystem uses it to turn on/off monitoring. Signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: arch/i386/kernel/cpu/mcheck/mce.c should #include <asm/mce.h>Adrian Bunk
Every file should include the headers containing the prototypes for it's global functions. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] generic: Break init() in two parts to avoid MODPOST warningsVivek Goyal
o init() is a non __init function in .text section but it calls many functions which are in .init.text section. Hence MODPOST generates lots of cross reference warnings on i386 if compiled with CONFIG_RELOCATABLE=y WARNING: vmlinux - Section mismatch: reference to .init.text:smp_prepare_cpus from .text between 'init' (at offset 0xc0101049) and 'rest_init' WARNING: vmlinux - Section mismatch: reference to .init.text:migration_init from .text between 'init' (at offset 0xc010104e) and 'rest_init' WARNING: vmlinux - Section mismatch: reference to .init.text:spawn_ksoftirqd from .text between 'init' (at offset 0xc0101053) and 'rest_init' o This patch breaks down init() in two parts. One part which can go in .init.text section and can be freed and other part which has to be non __init(init_post()). Now init() calls init_post() and init_post() does not call any functions present in .init sections. Hence getting rid of warnings. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: move startup_32() in text.head sectionVivek Goyal
o Entry startup_32 was in .text section but it was accessing some init data too and it prompts MODPOST to generate compilation warnings. WARNING: vmlinux - Section mismatch: reference to .init.data:boot_params from .text between '_text' (at offset 0xc0100029) and 'startup_32_smp' WARNING: vmlinux - Section mismatch: reference to .init.data:boot_params from .text between '_text' (at offset 0xc0100037) and 'startup_32_smp' WARNING: vmlinux - Section mismatch: reference to .init.data:init_pg_tables_end from .text between '_text' (at offset 0xc0100099) and 'startup_32_smp' o Can't move startup_32 to .init.text as this entry point has to be at the start of bzImage. Hence moved startup_32 to a new section .text.head and instructed MODPOST to not to generate warnings if init data is being accessed from .text.head section. This code has been audited. o SMP boot up code (startup_32_smp) can go into .init.text if CPU hotplug is not supported. Otherwise it generates more warnings WARNING: vmlinux - Section mismatch: reference to .init.data:new_cpu_data from .text between 'checkCPUtype' (at offset 0xc0100126) and 'is486' WARNING: vmlinux - Section mismatch: reference to .init.data:new_cpu_data from .text between 'checkCPUtype' (at offset 0xc0100130) and 'is486' Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Paravirt debug defaults offZachary Amsden
Deliberate register clobber around performance critical inline code is great for testing, bad to leave on by default. Many people ship with DEBUG_KERNEL turned on, so stop making DEBUG_PARAVIRT default on. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Vmi timer raceZachary Amsden
Because timer code moves around, and we might eventually move our init to a late_time_init hook, save and restore IRQs around this code because it is definitely not interrupt safe. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: Kprobe rpl fixZachary Amsden
Kprobes bugfix for paravirt compatibility - RPL on the CS when inserting BPs must match running kernel. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> CC: Eric Biederman <ebiederm@xmission.com>
2007-02-13[PATCH] i386: Profile pc badnessZachary Amsden
Profile_pc was broken when using paravirtualization because the assumption the kernel was running at CPL 0 was violated, causing bad logic to read a random value off the stack. The only way to be in kernel lock functions is to be in kernel code, so validate that assumption explicitly by checking the CS value. We don't want to be fooled by BIOS / APM segments and try to read those stacks, so only match KERNEL_CS. I moved some stuff in segment.h to make it prettier. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de>
2007-02-13[PATCH] i386: vMI timer patchesZachary Amsden
VMI timer code. It works by taking over the local APIC clock when APIC is configured, which requires a couple hooks into the APIC code. The backend timer code could be commonized into the timer infrastructure, but there are some pieces missing (stolen time, in particular), and the exact semantics of when to do accounting for NO_IDLE need to be shared between different hypervisors as well. So for now, VMI timer is a separate module. [Adrian Bunk: cleanups] Subject: VMI timer patches Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: vMI backend for paravirt-opsZachary Amsden
Fairly straightforward implementation of VMI backend for paravirt-ops. [Adrian Bunk: some cleanups] Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: SMP boot hook for paravirtZachary Amsden
Add VMI SMP boot hook. We emulate a regular boot sequence and use the same APIC IPI initiation, we just poke magic values to load into the CPU state when the startup IPI is received, rather than having to jump through a real mode trampoline. This is all that was needed to get SMP to work. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: iOPL handling for paravirt guestsZachary Amsden
I found a clever way to make the extra IOPL switching invisible to non-paravirt compiles - since kernel_rpl is statically defined to be zero there, and only non-zero rpl kernel have a problem restoring IOPL, as popf does not restore IOPL flags unless run at CPL-0. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>
2007-02-13[PATCH] i386: paravirt CPU hypercall batching modeZachary Amsden
The VMI ROM has a mode where hypercalls can be queued and batched. This turns out to be a significant win during context switch, but must be done at a specific point before side effects to CPU state are visible to subsequent instructions. This is similar to the MMU batching hooks already provided. The same hooks could be used by the Xen backend to implement a context switch multicall. To explain a bit more about lazy modes in the paravirt patches, basically, the idea is that only one of lazy CPU or MMU mode can be active at any given time. Lazy MMU mode is similar to this lazy CPU mode, and allows for batching of multiple PTE updates (say, inside a remap loop), but to avoid keeping some kind of state machine about when to flush cpu or mmu updates, we just allow one or the other to be active. Although there is no real reason a more comprehensive scheme could not be implemented, there is also no demonstrated need for this extra complexity. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Andi Kleen <ak@suse.de> Cc: Jeremy Fitzhardinge <jeremy@xensource.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Chris Wright <chrisw@sous-sol.org> Signed-off-by: Andrew Morton <akpm@osdl.org>