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2005-09-12[PATCH] i386: add memory clobbers to syscall macrosAndi Kleen
As noted by matz@suse.de The problem is, that on i386 the syscallN macro is defined like so: long __res; \ __asm__ volatile ("int $0x80" \ : "=a" (__res) \ : "0" (__NR_##name),"b" ((long)(arg1)),"c" ((long)(arg2)), \ "d" ((long)(arg3)),"S" ((long)(arg4)),"D" ((long)(arg5))); \ If one of the arguments (in the _llseek syscall it's the arg4) is a pointer which the syscall is expected to write to (to the memory pointed to by this ptr), then this side-effect is not captured in the asm. If anyone uses this macro to define it's own version of the syscall (sometimes necessary when not using glibc) and it's inlined, then GCC doesn't know that this asm write to "*dest", when called like so for instance: out = 1; llseek (fd, bla, blubb, &out, trara) use (out); Here nobody tells GCC that "out" actually is written to (just a pointer to it is passed to the asm). Hence GCC might (and in the above bug did) copy-propagate "1" into the second use of "out". The easiest solution would be to add a "memory" clobber to the definition of this syscall macro. As this is a syscall, it shouldn't inhibit too many optimizations. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix show_mem a little bitAndi Kleen
- Add KERN_INFO to printks (from i386) - Use longs instead of ints to accumulate pages. - Fix broken indenting. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove disable_tsc code in context switchAndi Kleen
It only offers extremly dubious security advantages and is not worth the overhead in this critical path. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Print version at end of kernel buildAndi Kleen
(from i386) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix (harmless) typo in head.S early level2 page tableAndi Kleen
The global bit was not set in the first 2MB page, instead it had a bit in the free AVL section which is useless. Fixed thus. Noticed by Eric Biederman Cc: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix idle=pollHugh Dickins
x86_64 idle=poll might be a little less responsive than it should: unlike mwait_idle, and unlike i386, its poll_idle left TIF_POLLING_NRFLAG set. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Only allocate per cpu data for possible CPUs, not compiled ↵Andi Kleen
in CPUs. Saves some memory except for hotplug situations. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Increase TLB flush array sizeAndi Kleen
The generic TLB flush functions kept upto 506 pages per CPU to avoid too frequent IPIs. This value was done for the L1 cache of older x86 CPUs, but with modern CPUs it does not make much sense anymore. TLB flushing is slow enough that using the L2 cache is fine. This patch increases the flush array on x86-64 to cache 5350 pages. That is roughly 20MB with 4K pages. It speeds up large munmaps in multithreaded processes on SMP considerably. The cost is roughly 42k of memory per CPU, which is reasonable. I only increased it on x86-64 for now, but it would probably make sense to increase it everywhere. Embedded architectures with SMP may keep it smaller to save some memory per CPU. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't include config.h in asm/timex.hAndi Kleen
asm-x86-64/timex.h does not reference CONFIG constants. Do not need to include config.h. Signed-off-by: Grant Grundler <iod00d@hp.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Some cleanup and optimization to the processor data area.Andi Kleen
- Remove unused irqrsp field - Remove pda->me - Optimize set_softirq_pending slightly Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Add simnow consoleAndi Kleen
This adds console and earlyprintk support for a host file on AMD's SimNow simulator. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Make remote TLB flush more scalableAndi Kleen
Instead of using a global spinlock to protect the state of the remote TLB flush use a lock and state for each sending CPU. To tell the receiver where to look for the state use 8 different call vectors. Each CPU uses a specific vector to trigger flushes on other CPUs. Depending on the received vector the target CPUs look into the right per cpu variable for the flush data. When the system has more than 8 CPUs they are hashed to the 8 available vectors. The limited global vector space forces us to this right now. In future when interrupts are split into per CPU domains this could be fixed, at the cost of needing more IPIs in flat mode. Also some minor cleanup in the smp flush code and remove some outdated debug code. Requires patch to move cpu_possible_map setup earlier. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix 32bit sendfileTsuneo.Yoshioka@f-secure.com
If we use 64bit kernel on ia64/x86_64/s390 architecture, and we run 32bit binary on 32bit compatibility mode, sendfile system call seems be not set offset argument. This is because sendfile's return value is not zero but the code regards the result by return value is zero or not. This problem will be affect to ia64/x86_64/s390 and not affect to other architecture does not affect other architecture (mips/parisc/ppc64/sparc64). Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Include build number in oops outputAndi Kleen
Include build number in oops output Helps me to match oopses to correct kernel. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Use ACPI PXM to parse PCI<->node assignmentsAndi Kleen
Since this is shared code I had to implement it for i386 too Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove code to resume machine check state of other CPUs.Andi Kleen
The resume code uses CPU hotplug now so at resume time we only ever see one CPU. Pointed out by Yu Luming. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove redundant max_mapnr and replace with end_pfnAndi Kleen
The FLATMEM people added it, but there doesn't seem a good reason because end_pfn is identical. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Use e820_find_hole to compute reserved pagesAndi Kleen
Avoids a very dumb loop Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix harmless off by one in e820 codeAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Micro optimization to dma_alloc_coherent node lookupAndi Kleen
Use pcibus_to_node directly Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't trust boot_cpu_id in the mptable.Andi Kleen
It could be wrong for kexec or other cases. Read it from the CPU instead. Signed-off-by: Murali <muralim@in.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Add command line option to set machine check tolerance levelAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Make lockless machine check record passing a bit more robust.Andi Kleen
One machine is constantly throwing NMI watchdog timeouts in mce_log This was one attempt to fix it. (AK: this doesn't actually fix the bug I'm seeing unfortunately, probably drop. I don't like it that the reader can spin forever now waiting for a writer) Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove redundant swiotlb=force handlingAndi Kleen
It's already handled in the main swiotlb code. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't allocate aperture when swiotlb is enabled and no AGP foundAndi Kleen
No-one needs it then Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Reverse order of bootmem listsAndi Kleen
This leads to bootmem allocating first from node 0 instead of from the last node. This avoids swiotlb allocating on the last node, which doesn't really work on a machine with >4GB. Note: there is a better patch around from someone else that gets rid of the pgdat list completely. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Avoid unnecessary double bouncing for swiotlbAndi Kleen
PCI_DMA_BUS_IS_PHYS has to be zero even when the GART IOMMU is disabled and the swiotlb is used. Otherwise the block layer does unnecessary double bouncing. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't assume APIC for boot processor has an APIC ID of zeroAndi Kleen
Originally from Stuart Hayes. When setting up the APIC for the Uniprocessor kernel don't assume the CPU has an APIC ID of zero. This fixes boot with the UP kernel on Dell PowerEdge 6800/6850 4way systems. Cc: Stuart.Hayes@dell.com Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Use SRAT data on Intel systems too.Andi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Support dualcore and 8 socket systems in k8 fallback node ↵Andi Kleen
parsing In particular on systems where the local APIC space and node space is very different from the Linux CPU number space. Previously the older NUMA setup code directly parsing the K8 northbridge registers had some issues on 8 socket or dual core systems. This patch fixes them. This is mainly done by fixing some confusion between Linux CPU numbers and local APIC ids. We now pass the local APIC IDs to later code, which avoids mismatches. Also add some heuristics to detect cases where the Hypertransport nodeids and the local APIC IDs don't match, but are shifted by a constant offset. This is still all quite hackish, hopefully BIOS writers fill in correct SRATs instead. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't cache align PDA on UP buildsAndi Kleen
Suggested by someone I forgot who sorry. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Fix the apic version that gets printed during bootAndi Kleen
Signed-off-by: Suresh Sidda <suresh.b.siddha@intel.com> Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Don't assign CPU numbers in SRAT parsingAndi Kleen
Do that later when the CPU boots. SRAT just stores the APIC<->Node mapping node. This fixes problems on systems where the order of SRAT entries does not match the MADT. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: White space and comment fixes for smp_call_function_singleAndi Kleen
No functional changes Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Enable interrupts during delay calibration on APsAndi Kleen
We used to disable them to work around a bug, but that is not needed anymore. Keeping them enabled avoids the NMI watchdog triggering in some cases. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Use largest APIC number, not number of CPUs to decide on ↵Andi Kleen
physflat mode Handles case where BIOS gives CPUs very large APIC numbers correctly. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove code for outdated APICsAndi Kleen
No x86-64 chipset has these APICs. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove esr disable hack in APIC codeAndi Kleen
This was just needed for the Numasaurus, which fortunately doesn't support x86-64 CPUs. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove obsolete APIC "write around" bug workaroundAndi Kleen
No x86-64 chipset has this bug Generated code doesn't change because it was always disabled. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Remove apic_write_around from smpboot.cAndi Kleen
We don't do workarounds for ancient hardware bugs. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86-64: Update defconfigAndi Kleen
Allow diskless booting. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] x86{-64}: Remove old hack that disabled mmconfig support on AMD systems.Andi Kleen
Now that Greg implemented MCFG/_SEG support this shouldn't be needed anymore Cc: gregkh@suse.de Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] cpuset semaphore depth check optimizePaul Jackson
Optimize the deadlock avoidance check on the global cpuset semaphore cpuset_sem. Instead of adding a depth counter to the task struct of each task, rather just two words are enough, one to store the depth and the other the current cpuset_sem holder. Thanks to Nikita Danilov for the idea. Signed-off-by: Paul Jackson <pj@sgi.com> [ We may want to change this further, but at least it's now a totally internal decision to the cpusets code ] Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] crc16: remove w1 specific comments.Evgeniy Polyakov
Remove w1 comments from crc16.h and move specific constants into w1_ds2433.c where they are used. Replace %d with %zd. Signed-off-by: Evgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/ppc64-2.6 Linus Torvalds
2005-09-12Mark ia64-specific MCA/INIT scheduler hooks as dangerousLinus Torvalds
..and only enable them for ia64. The functions are only valid when the whole system has been totally stopped and no scheduler activity is ongoing on any CPU, and interrupts are globally disabled. In other words, they aren't useful for anything else. So make sure that nobody can use them by mistake. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] i386: Don't miss pending signals returning to user mode after signal ↵Roland McGrath
processing Signed-off-by: Roland McGrath <roland@redhat.com> Acked-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-12[PATCH] ppc64: Remove unused codeAnton Blanchard
ppc64_attention_msg and ppc64_dump_msg are not used so remove them. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-12[PATCH] ppc64: Fix for missing start-cpu rtas tokenAnton Blanchard
If the rtas start-cpu token doesnt exist then presume the cpu is already spinning. If it isnt we will catch it later on when the cpu doesnt respond. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-12[PATCH] ppc64: indent pci codeAnton Blanchard
Fix up some badly indented code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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