| Age | Commit message (Collapse) | Author |
|---|
|
When hugetlbpage support isn't enabled, this can be bogus.
Wrap it back in _PAGE_FLAGS_HARD to avoid changes to the
base PTE when not aiming for larger sizes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This was missing for sh too, wire it up..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Follows the same change as other architectures..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds a platform device for the directly connected
CF interface on R7780RP boards, for use with the
pata_platform libata driver.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Wire up all of the essentials for lockdep..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
gcc4 gets a bit pissy about the outputs:
include/asm/atomic.h: In function 'atomic_add':
include/asm/atomic.h:37: error: invalid lvalue in asm statement
include/asm/atomic.h:30: error: invalid lvalue in asm output 1
...
this ended up being a thinko anyways, so just fix it up.
Verified for proper behaviour with the older toolchains, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds basic NO_IDLE_HZ support to the SH timer API so timers
are able to wire it up. Taken from the ARM version, as it fit in
to our API with very few changes needed.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This syncs up the SH clock framework with the linux/clk.h API,
for which there were only some minor changes required, namely
the clk_get() dev_id and subsequent callsites.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Since all of the sys_timer sources currently do this on their own
within the ->get_offset() path, it's more sensible to just have
the caller take care of it when grabbing xtime_lock. Incidentally,
this is more in line with what others (ie, ARM) are doing already.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Previously this was using a static pgd shift in the reporting
code, simply flip this to PGDIR_SHIFT which does the right
thing depending on varying PTE magnitudes on the SH-X2 MMU.
While we're at it, and since it's been recently added, use
get_TTB() for fetching the TTB, rather than the open coded
instructions.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
The end of the store queue bitmap is miscalculated when searching
for a free range in sq_remap(), missing the PAGE_SHIFT shift that's
done in sq_api_init(). This runs in to workloads where we can scan
beyond the end of the bitmap.
Spotted by Paul Jackson:
http://marc.theaimsgroup.com/?l=linux-kernel&m=116493191224097&w
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This makes the early printk support somewhat more flexible,
moving the port definition to a config option, and making the
port initialization configurable for sh-ipl+g users.
At the same time, this allows us to trivially wire up the
SH7780 SCIF0, so that's thrown in too more or less for free.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
There were a number of places that made evil PAGE_SIZE == 4k
assumptions that ended up breaking when trying to play with
8k and 64k page sizes, this fixes those up.
The most significant change is the way we load THREAD_SIZE,
previously this was done via:
mov #(THREAD_SIZE >> 8), reg
shll8 reg
to avoid a memory access and allow the immediate load. With
a 64k PAGE_SIZE, we're out of range for the immediate load
size without resorting to special instructions available in
later ISAs (movi20s and so on). The "workaround" for this is
to bump up the shift to 10 and insert a shll2, which gives a
bit more flexibility while still being much cheaper than a
memory access.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
There was a clobber issue with the register we were saving
the stack in, so we switch to a register that we handle in
the clobber list properly already.
This also follows the x86 changes for allowing the softirq
checks from hardirq context.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This extends the SH DMA API for allowing handling of DMA
channels based off of their respective capabilities.
A couple of functions are added to the existing API,
the core bits are register_chan_caps() for registering
channel capabilities, and request_dma_bycap() for fetching
a channel dynamically based off of a capability set.
Signed-off-by: Mark Glaisher <mark.glaisher@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Pass along the dev_id from request_dma() all the way down,
rather than inserting an artificial name relating to the TEI
line that we were doing before.
This makes the line a bit less obvious, but dev_id is the proper
behaviour for this regardless.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Previously we linked in the ISA DMA wrapper unconditionally.
As there are very few users of this, it's better to make it
conditional.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Handle the case where no registered DMACs exist somewhat more
gracefully. While we're at it, check for sysdev_create_file()
failing.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
The implementation of system call tracing in the kernel has a
couple of ordering problems:
- the validity of the system call number is checked before
calling out to system call tracing code, and should be
done after
- the system call number used when tracing is the one the
system call was invoked with, while the system call tracing
code can legitimatly change the call number (for example
strace permutes fork into clone)
This patch fixes both of these problems, and also reoders the
code slightly to make the direct path through the code the
common case.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Two of the fields in /proc/[number]/stat are documented in
proc(5) as:
kstkesp %lu
The current value of esp (stack pointer), as
found in the kernel stack page for the process.
kstkeip %lu
The current EIP (instruction pointer).
The SH currently prints the the last SP and PC of the process
inside the kernel, while most other archs use the last user
space values.
This patch modifes the SH to display the user space values.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Handle simple TLB miss faults which can be resolved completely
from the page table in assembler.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds simple push-switch support for the RDBRP-1/RDBREVRP-1 debug
boards found on the R7780RP-1.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds support for a generic push switch framework. Adaptable for
various switches, including GPIO switches and the push switches commonly
found on Renesas debug boards.
This allows switch states to be trivially reported through sysfs.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Remove extra bits from the pmd structure and store a kernel logical
address rather than a physical address. This allows it to be directly
dereferenced. Another piece of wierdness inherited from x86.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Add TTB accessor functions and give it a sensible default
value. We will use this later for optimizing the fault
path.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Remove the previous saving of fault codes into the thread_struct
as they are never used, and appeared to be inherited from x86.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This fixes up the kernel for gcc4. The existing exception handlers
needed some wrapping for pt_regs access, acessing the registers
via a RELOC_HIDE() pointer.
The strcpy() issues popped up here too, so add -ffreestanding and
kill off the symbol export.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Previously big endian was simply assumed if little endian was
not set, which led to some cflags ordering issues. There's not
much point to not having a big endian option, so shove one in
a choice and wire it up in the Makefile.
This lets us clean up some of the cflags ordering while we're
at it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Simple sem2mutex conversion for the p3map semaphores.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds some preliminary support for the SH-X2 MMU, used by
newer SH-4A parts (particularly SH7785).
This MMU implements a 'compat' mode with SH-X MMUs and an
'extended' mode for SH-X2 extended features. Extended features
include additional page sizes (8kB, 4MB, 64MB), as well as the
addition of page execute permissions.
The extended mode attributes are placed in a second data array,
which requires us to switch to 64-bit PTEs when in X2 mode.
With the addition of the exec perms, we also overhaul the mmap
prots somewhat, now that it's possible to handle them more
intelligently.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Simple 7785 placeholders to start hooking up other bits of code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This drops the various IRQ headers that were floating around
and primarily providing hardcoded IRQ definitions for the
various CPU subtypes. This quickly got to be an unmaintainable
mess, made even more evident by the subtle breakage introduced
by the SH-2 and SH-2A changes.
Now that subtypes are able to register IRQ maps directly, just
rip all of the headers out.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
All of the various CPU subtypes currently hardcode TIMER_IRQ,
switch this to a config option in the few places we need this.
This allows further removal of hardcoded IRQ headers..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
The nommu patches broke the path for the common bits, get it building
for the SH-3/4 case again.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
A number of API changes happened underneath the 7206 patches, update
for everything that broke.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This adds support for the Solution Engine 7206 and 7619.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
Mostly SH-2 wrappers..
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This splits out common bits from the existing exception handler for
use between SH-2/SH-2A and SH-3/4, and adds support for the SH-2/2A
exceptions.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
SH-2A has special division hardware as opposed to a full-fledged FPU,
wire up the exception handlers for this.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
This implements initial support for the SH7206 (SH-2A) and SH7619
(SH-2) MMU-less CPUs.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
|
|
CONFIG_LBD and CONFIG_LSF are spread into asm/types.h for no particularly
good reason.
Centralising the definition in linux/types.h means that arch maintainers
don't need to bother adding it, as well as fixing the problem with
x86-64 users being asked to make a decision that has absolutely no
effect.
The H8/300 porters seem particularly confused since I'm not aware of any
microcontrollers that need to support 2TB filesystems.
Signed-off-by: Matthew Wilcox <matthew@wil.cx>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
|
* 'for-linus' of git://brick.kernel.dk/data/git/linux-2.6-block:
[PATCH] blktrace: don't return blktrace_seq from trace_note()
[PATCH] blktrace: uninline trace_note()
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/mfasheh/ocfs2
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mfasheh/ocfs2: (31 commits)
ocfs2: implement i_op->permission
configfs: make configfs_dirent_exists() static
ocfs2: update file system paths to set atime
ocfs2: core atime update functions
ocfs2: Add splice support
ocfs2: Remove ocfs2_write_should_remove_suid()
[PATCH] Export should_remove_suid()
configfs: mutex_lock_nested() fix
ocfs2: Remove struct ocfs2_journal_handle in favor of handle_t
ocfs2: remove handle argument to ocfs2_start_trans()
ocfs2: remove ocfs2_journal_handle journal field
ocfs2: pass ocfs2_super * into ocfs2_commit_trans()
ocfs2: remove unused handle argument from ocfs2_meta_lock_full()
ocfs2: make ocfs2_alloc_handle() static
ocfs2: remove unused ocfs2_handle_add_lock()
ocfs2: remove unused ocfs2_handle_add_inode()
ocfs2: Don't allocate handle early in ocfs2_rename()
ocfs2: don't use handle for locking in allocation functions
ocfs2: don't pass handle to ocfs2_meta_lock in ocfs2_rename()
ocfs2: don't pass handle to ocfs2_meta_lock in ocfs2_symlink()
...
|
|
ip_summed changes last summer had missed that one. As the result,
we have ip_summed interpreted as CHECKSUM_PARTIAL now. IOW,
->csum is interpreted as offset of checksum in the packet. net/core/*
will both read and modify the value as that offset, with obvious
reasons. At the very least it's a remote memory corruptor.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
|
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
|
|
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Cleanup memory barriers for weakly ordered systems.
[MIPS] Alchemy: Automatically enable CONFIG_RESOURCES_64BIT for PCI configs.
[MIPS] Unify csum_partial.S
[MIPS] SWARM: Fix a typo in #error directives
[MIPS] Fix atomic.h build errors.
[MIPS] Use SYSVIPC_COMPAT to fix various problems on N32
[MIPS] klconfig add missing bracket
|
|
* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (194 commits)
[POWERPC] Add missing EXPORTS for mpc52xx support
[POWERPC] Remove obsolete PPC_52xx and update CLASSIC32 comment
[POWERPC] ps3: add a default zImage target
[POWERPC] Add of_platform_bus support to mpc52xx psc uart driver
[POWERPC] typo fix and whitespace cleanup on mpc52xx-uart driver
[POWERPC] Fix debug printks for 32-bit resources in the PCI code
[POWERPC] Replace kmalloc+memset with kzalloc
[POWERPC] Linkstation / kurobox support
[POWERPC] Add the e300c3 core to the CPU table.
[POWERPC] ppc: m48t35 add missing bracket
[POWERPC] iSeries: don't build head_64.o unnecessarily
[POWERPC] iSeries: stop dt_mod.o being rebuilt unnecessarily
[POWERPC] Fix cputable.h for combined build
[POWERPC] Allow CONFIG_BOOTX_TEXT on iSeries
[POWERPC] Allow xmon to build on legacy iSeries
[POWERPC] Change ppc64_defconfig to use AUTOFS_V4 not V3
[POWERPC] Tell firmware we can handle POWER6 compatible mode
[POWERPC] Clean images in arch/powerpc/boot
[POWERPC] Fix OF pci flags parsing
[POWERPC] defconfig for lite5200 board
...
|
|
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
|
|
The support for the 52xx-based systems is now included under
CONFIG_CLASSIC32, since the 52xx chips have a 603e-based core.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Paul Mackerras <paulus@samba.org>
|
|
Add a powerpc make target that can be loaded by the ps3 bootloader (kboot) and
set this as the default image to build for that platform.
Until the compressed zImage wrapper is made, this arranges for a stripped
vmlinux image to be built.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
|
