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Trivial build fixes.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Build fixes for the hp6xx APM code, as well as some adjustments for
the battery values.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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hp6xx_defconfig resync.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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HP6xx uses OFFCHIP_IRQ_BASE to know the base irq number where non
cpu interrupts should start. This define was in irq.h before, but
since rework got lost. It really belongs inside hd64461.h since
the hp6xx wont work without it.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Trivial build fix.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Trivial compile fix.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds inline versions of writesb(), readsb(), writesw() and
readsw() to include/asm-sh/io.h. Stolen from include/asm-avr32/io.h.
These functions are needed to compile certain device drivers such as
ax88796.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes the sh778x specific pci code that pokes in the
interrupt controller and overwrites things. The new and improved IRL
code manages this in plat_irq_setup() and plat_irq_setup_pins()
instead.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch reworks the highlander irq code for r7780mp and r7785rp.
The same strategy as for the new R2D code is used here - the board
specific interrupts are now starting from HL_FPGA_IRQ_BASE. The code
for r7780rp is not touched due to lack of hardware.
Tested with CF, AX88796 on r7780mp and r7785rp. The touch switch
interrupt has also been tested on r7780mp.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch contains the following fixes:
- Adds sh7785 support to CONFIG_EARLY_SCIF_CONSOLE_PORT.
- Removes duplicate include from rts7751r2d irq code.
- Removes CONFIG_CPU_HAS_INTC from sh7720 Kconfig entry.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch contains the following fixes and improvements:
- Fix address typo for INTMSK2 / INTMSKCLR2 registers on sh7780.
- Adds IRQ_MODE_IRLnnnn_MASK using intc controller for IRL masking.
- Good old IRQ_MODE_IRLnnnn should not register any intc controller.
- plat_irq_setup_pins() now selects IRL or IRQ mode.
- the holding function is now disabled using ICR0.
By default all external pin interrupts are disabled.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The maple bus driver (http://lkml.org/lkml/2007/9/4/165) uses hardware
synchronisation between the maple bus and the VBLANK to poll the maple
bus. This patch makes the interrupt shareable.
By definition the interrupt is for both devices.
Signed-off by: Adrian McMenamin <adrian@mcmen.demon.co.uk>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We were abusing the resource size for the number of bits, this
has been reworked using proper platform data, so this can be
tidied up now. Boards in general only have a 1-byte wide resource,
which the ioremap_nocache() case already handles.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes the old r2d config file named rts7751r2d_defconfig
and adds separate config files for the two r2d board versions. The two
new defconfigs are identical with the exception of board selection:
- rts7751r2dplus_defconfig selects CONFIG_RTS7751R2D_PLUS=y
- rts7751r2d1_defconfig selects CONFIG_RTS7751R2D_1=y
Please remember to update both files with r2d changes in the future.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This rips out some of the old spinlock and rwlock behaviour that the SH-2
parts were using and reworks them for LL/SC semantics on the SH-4A.
This is primarily only useful for SH-X3 multi-cores, but can also be used
for building CONFIG_SMP=y testing kernels on SH-4A UP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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CC arch/sh/kernel/cpu/sh4/sq.o
arch/sh/kernel/cpu/sh4/sq.c: In function 'sq_flush_range':
arch/sh/kernel/cpu/sh4/sq.c:65: warning: passing argument 1 of 'prefetch' discards qualifiers from pointer target type
This didn't actually need to be volatile in the first place, so just
kill off the qualifier entirely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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'GPL v2' vs 'GPLv2'.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add some flags for the heartbeat driver, and kill off some duplication
in the bit positions for the boards that don't have special cases.
This also allows for variable access widths and inversion.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch converts the cpu specific interrupt setup code for sh7206
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch converts the cpu specific interrupt setup code for sh7619
from ipr to intc. New vectors are also added to match the information
provided by the datasheet.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch makes sure the serial port interrupt irqs matches the
datasheet. Only irqs for SCIF1 are changed. While at some cosmetic
spaces are added.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch contains various intc fixes for problems reported by
Markus Brunner on the linuxsh-dev mailing list:
http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1
Apart from added comments, the fixes are:
- add intc_set_priority() function prototype to hw_irq.h
- fix off-by-one error in intc_set_priority()
- make sure _INTC_WIDTH() is set for primary priority masking
Big thanks to Markus for finding these problems. Version two fixes
a compile error and an inverted primary check.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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With the intc core improved it is now possible to put the intc data
structures in the initdata section.
Version two of this patch puts the __initdata inside DECLARE_INTC_DESC()
and removes the __initdata included in the board specific r2d code.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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With the intc dual prio register support in place it is now possible
to add the ipi vectors to x3.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch replaces all instances of CONFIG_VOYAGERGX with
CONFIG_MFD_SM501. While at it we make sure the r2d code compiles
both with and without SM501.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch converts the board specific interrupt code for r2d to make
use of intc. While at it we improve the Kconfig to avoid confusion.
- Two sets of interrupt tables exist - one for R2D-1 and one for R2D-PLUS.
- R2D-1 and R2D-PLUS use the same irq constants.
- R2D-1 has AX88796 support, R2D-PLUS does not hook up that IRQ.
- R2D-PLUS has KEY support, R2D-1 does not hook up that IRQ.
- The number and order of IRQ values are disconnected from register bits.
- Interrupt sources now start from IRQ 100.
- The machvec demux function converts from irlm IRQ 0-14 to IRQ 100++.
Tested on R2D-1 and R2D-PLUS boards.
Version 2 adds CONFIG_RTS7751R2D_1 and CONFIG_RTS7751R2D_PLUS together
with intc structured as __initdata.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch reworks the intc core, implementing the following features:
- Support dual priority registers - one set and one clear register
- All 8/16/32 bit register combinations are now supported
- Both single mask and single enable bitmap register are supported
- Add code to set interrupt priority
- Speedup sense and priority configuration code
- Allocate data using bootmem, allows intc data structures to be
__initdata
- Save memory - allocated memory footprint is smaller than intc
structures
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We need a secondary register member in struct intc_prio_reg to support
dual priority registers used by ipi on x3.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This makes sure the function prototype for setup_bootmem_node() gets
included. The file setup-shx3.c does not compile otherwise for
CONFIG_NUMA=n.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the SH7720 (SH3-DSP) CPU.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds the PFC definitions for SH-3, as well as consolidating the
gpio.h mess within sh-sci. Stub in sh64, as it's the odd one out
between the sh-sci architectures (sh, sh64, h8300) in this capacity.
Signed-off by: Markus Brunner <super.firetwister@gmail.com>
Signed-off by: Mark Jonas <toertel@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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synchronize_irq() was being exported twice, kill off the duplicate
export.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This was a bit more verbose than it needed to be.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that NODES_SHIFT is bumped up, we can plug in the CSM block as
a separate node, too.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This was at 1, which is where most subtypes want it. SH-X3 has
more nodes, so bump it up to 3.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that we have a way of enabling the IRQs, hook up the platform
devices and wrap in to ILSEL for mapping the vectors.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds functionality for the on-board ILSEL IRQs that chain
IRL mode events. Many on-board devices (ethernet, usb, etc.) rely
on ILSEL IRQs directly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds initial support for the SH-X3 prototype board.
Only simple logic for the IRQ controller and the heartbeat driver
for now.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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IRL doesn't always define sense registers, so don't bother trying to
iterate through the table. This ended up causing an oops on SH-X3
when using IRL mode.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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There is no point in keeping around the now unused intc2 code.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch converts the sh-specific voyagergx interrupt code to make use
of intc. A lot of "interesting" old cruft gets replaced with intc tables
and some simple demux code.
- All interrupt sources in the sm501 data sheet are now in the header.
- The number and order of IRQ values are disconnected from register bits.
- Interrupt sources now start from IRQ 200.
- set_irq_chained_handler() is now used to hook up the demux function.
In the future it would probably make sense to move the interrupt demuxer
into into the mfd driver, but this is probably a nice step in the right
direction until that happens.
Tested on a R2D-1 board using the serial port hooked up to the sm501.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds single bitmap register support to intc. The current
code only handles 16 and 32 bit registers where a set bit means
interrupt enabled, but this is easy to extend in the future.
The INTC_IRQ() macro is also added to provide a way to hook in
interrupt controllers for FPGAs in boards or companion chips.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes redundant interrupt code for the shmin board which
is using a sh770x processor and 4 IRQ lines as individual interrupts
(IRQ-mode).
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes redundant board specific interrupt code for boards
using sh775x processors and 4 IRQ lines in "Individual Interrupt Mode"
aka IRLM.
Three boards are affected: sh03, snapgear and titan.
The right way to do this is to use cpu specific code provided by intc.
A nice side effect is that sh03 now compiles, board not BROKEN any more.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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All SH-4 parts have a 4-digit year, while the SH-3 parts typically
only use a 2-digit one. The SH7705, SH7710, and SH7712 SH-3 parts
however opted to extend it to 4-digit and still look and act like
an SH-3 RTC in all other ways.
This adds a capability flag (RTC_CAP_4_DIGIT_YEAR) that these
corner-case CPU subtypes can set in their platform data and cleans
up some of the ifdef mess in the driver as a result.
Reported-by: Markus Brunner <super.firetwister@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Wire up CPU#0 URAM as node 1 on SH-X3.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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