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Hey,
I see no reason to send LL debugging messages to the modem. This can happen if
we compile the Samsung SoC with PM debugging as in andy's git branch.
From 452c17990dfeb9c2eb2ffa7ded4d24ddb1bcd4b2 Mon Sep 17 00:00:00 2001
From: Holger Freyther <zecke@openmoko.org>
Date: Sun, 23 Mar 2008 00:57:28 +0100
Subject: [PATCH] Never ever send debug messages to the modem. The serial
console is
on UART2, send the messages for decompressing and low level debugging
there.
Signed-Off-by: Holger Freyther <zecke@openmoko.org>
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We used to drive output high into GPS unit in suspend
Signed-off-by: Andy Green <andy@openmoko.com>
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Add platform stuff to deal with going in and out of suspend
so the motion sensor IO is not driving high into unpowered sensors
Signed-off-by: Andy Green <andy@openmoko.com>
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Hey,
the legacy application 'atd' from Russ Nelson/Nils Faerber, used by Qtopia, to
schedule alarms currently fails to start as the the above ioctl is failing.
The other drivers in drivers/rtc implement the above ioctl and we can
implement it too.
The code to mask/unmask the RTC alarm is copied from the set_alarm routine and
adapted to use the reg_set_bit_mask and reg_set_clear_mask.
It is compiling, so it must work. Please welcome me the lkml way ;)
Signed-Off-by: Holger Hans Peter Freyther <zecke@openmoko.org>
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We don't take care to stop driving generated USB host power even
when we have a 1A charger connected on the same pins.
Signed-off-by: Andy Green <andy@openmoko.com>
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Unless I really really missed the point, there is no support for enabling
USB Host power for USB host mode. This patch adds a /sys node for GTA02
that allows control of the charge pump for 5V out on the USB mini connector
It doesn't change any logical mode in the CPU, just enables (1) and disables
(0) USB host power.
# cat /sys/devices/platform/neo1973-pm-host.0/hostmode
0
# echo 1 > /sys/devices/platform/neo1973-pm-host.0/hostmode
Signed-off-by: Andy Green <andy@openmoko.com>
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Starting up all the PWMs seems to be needed for PWM3 operation
and FIQ / HDQ / VIB operation. But after starting, turn the
LEDs to GPIO-only.
Applies on top of Willie's patch
Signed-off-by: Andy Green <andy@openmoko.com>
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We need to be able to use the config option CONFIG_MMC_UNSAFE_RESUME that allows the rootfs
to live on SD. But when we use this, it tries to send a reset command to the SD card during
suspend -- and unfortunately many things like Power have suspended by then.
This patch again rejects IO on the MMC device during suspend of the MMC device, and it
gives the result the rootfs on SD card works okay.
Signed-off-by: Andy Green <andy@openmoko.com>
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Add support for GPA[] GPIO bus since we have some NCs
but they seem to output-only IO cells so no matter
Signed-off-by: Andy Green <andy@openmoko.com>
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This is a driver for the bq27000 found in the Highcell A5
battery, and the platform device stuff for it for GTA02. It
is a Power Supply Class battery device.
The driver doesn't contain an HDQ engine but accepts pointers
from the platform data to the HDQ action routines; our
platform data plugs it into the FIQ HDQ engine stuff.
The Power Supply class exposes the battery down /sys so you
can find out battery status by doing the equivalent of this
bash command
for i in capacity charge_full current_now present status technology temp time_to_empty_now time_to_full_now type voltage_now ; do echo -n "$i " ; cat /sys/devices/platform/bq27000-battery.0/power_supply/bat/$i ; done
Here is the kind of result you get from a battery discharging
capacity 0
charge_full 1215585
current_now 183375
present 1
status Discharging
technology Li-ion
temp 276
time_to_empty_now 0
time_to_full_now 3932100
type Battery
voltage_now 2761000
Note that temp is in 1/10 degrees C, other values are in uV,
uA, uW. The time_to_* reported are bogus, but that is what
the battery actually reports.
We can make more mappings to entries in power_supply class
but this is enough to get started with.
Signed-off-by: Andy Green <andy@openmoko.com>
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This adds a platform driver and device which performs HDQ
battery protocol using a single GPIO pin which is set
through platform data.
HDQ has some hard latency requirements which can't
be met if interrupts are enabled, so normally using
a GPIO for this will require blocking out all other
interrupts and processes for several milliseconds
per register being read or written.
This HDQ protocol engine is a FSM implemented inside the
the FIQ ISR and regulated by timer interrupts happening
at 20us intervals. The path through the FSM on any
"clock" is very short and should be over with in ~
1us. Because FIQ has guaranteed latencies of <1us,
it means we can service the HDQ protocol without
blocking interrupts or any other process other than
the caller that is waiting for the result. It's pretty
cool performance from 1 GPIO ;-)
Due to it being hard to do locking from the FIQ ISR
the code simply sleeps 10ms or whatever the scheduler
gives it and checks if the transfer took place yet.
This platform driver doesn't have any knowledge about
the device it is talking to, it just knows it is a
HDQ device. It exports three functions for read, write
and confirming HDQ is initialized. It also exports two
/sys nodes that are usable by humans, one dumps the whole
127 register HDQ register space
# cat /sys/devices/platform/gta02-hdq.0/hdq/dump
00 44 55 00 00 00 ba 04 a2 0d 50 00 00 00 00 00
00 00 9a 1a 00 00 ff ff ff ff 29 00 00 00 80 2b
00 00 00 00 00 00 ff ff 00 00 00 00 00 32 af 06
a0 d8 37 4e 00 00 00 00 00 00 00 34 2e 03 b4 e7
00 00 06 00 41 00 4c 02 00 00 00 00 00 00 00 00
83 02 00 00 94 09 59 b9 a5 0d 7f 21 00 00 7a ff
df ff 62 ff a7 04 2e 05 00 00 00 01 00 07 00 00
2a 78 36 67 7b b5 1b a9 af 19 38 89 63 57 42 7c
#
and the other allows to set one register
# echo 2 170 > /sys/devices/platform/gta02-hdq.0/hdq/write
writes 0xAA into register 2.
Signed-off-by: Andy Green <andy@openmoko.com>
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These are initialized already
Signed-off-by: Andy Green <andy@openmoko.com>
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--- linux-2.6.22/drivers/i2c/chips/pcf50606.c.orig 2008-01-17 22:30:16.000000000 -0800
+++ linux-2.6.22/drivers/i2c/chips/pcf50606.c 2008-01-17 22:31:43.000000000 -0800
@@ -71,12 +71,19 @@
I2C_CLIENT_INSMOD_1(pcf50606);
-#define PCF50606_F_CHG_FAST 0x00000001 /* Charger Fast allowed */
-#define PCF50606_F_CHG_PRESENT 0x00000002 /* Charger present */
-#define PCF50606_F_CHG_FOK 0x00000004 /* Fast OK for battery */
-#define PCF50606_F_CHG_ERR 0x00000008 /* Charger Error */
-#define PCF50606_F_CHG_PROT 0x00000010 /* Charger Protection */
-#define PCF50606_F_CHG_READY 0x00000020 /* Charging completed */
+#define PCF50606_B_CHG_FAST 0 /* Charger Fast allowed */
+#define PCF50606_B_CHG_PRESENT 1 /* Charger present */
+#define PCF50606_B_CHG_FOK 2 /* Fast OK for battery */
+#define PCF50606_B_CHG_ERR 3 /* Charger Error */
+#define PCF50606_B_CHG_PROT 4 /* Charger Protection */
+#define PCF50606_B_CHG_READY 5 /* Charging completed */
+
+#define PCF50606_F_CHG_FAST (1<<PCF50606_B_CHG_FAST) /* Charger Fast allowed */
+#define PCF50606_F_CHG_PRESENT (1<<PCF50606_B_CHG_PRESENT) /* Charger present */
+#define PCF50606_F_CHG_FOK (1<<PCF50606_B_CHG_FOK) /* Fast OK for battery */
+#define PCF50606_F_CHG_ERR (1<<PCF50606_B_CHG_ERR) /* Charger Error */
+#define PCF50606_F_CHG_PROT (1<<PCF50606_B_CHG_PROT) /* Charger Protection */
+#define PCF50606_F_CHG_READY (1<<PCF50606_B_CHG_READY) /* Charging completed */
#define PCF50606_F_CHG_MASK 0x000000fc
#define PCF50606_F_PWR_PRESSED 0x00000100
@@ -1026,12 +1033,12 @@
static DEVICE_ATTR(chgmode, S_IRUGO | S_IWUSR, show_chgmode, set_chgmode);
static const char *chgstate_names[] = {
- [PCF50606_F_CHG_FAST] = "fast_enabled",
- [PCF50606_F_CHG_PRESENT] = "present",
- [PCF50606_F_CHG_FOK] = "fast_ok",
- [PCF50606_F_CHG_ERR] = "error",
- [PCF50606_F_CHG_PROT] = "protection",
- [PCF50606_F_CHG_READY] = "ready",
+ [PCF50606_B_CHG_FAST] = "fast_enabled",
+ [PCF50606_B_CHG_PRESENT] = "present",
+ [PCF50606_B_CHG_FOK] = "fast_ok",
+ [PCF50606_B_CHG_ERR] = "error",
+ [PCF50606_B_CHG_PROT] = "protection",
+ [PCF50606_B_CHG_READY] = "ready",
};
static ssize_t show_chgstate(struct device *dev, struct device_attribute *attr,
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Add Bluetooth in monolithic kernel
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SD Card / VFAT in monolithic kernel
Signed-off-by: Andy Green <andy@openmoko.com>
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Make a defconfig for 2.6.24 out of the current 2.6.22.5 one
From: warmcat <andy@warmcat.com>
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Update to new DFU VID for A5
Signed-off-by: Andy Green <andy@openmoko.com>
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Add a couple of handy scripts to crossmake and send over dfu
From: warmcat <andy@warmcat.com>
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Adds svn defconfig
From: warmcat <andy@warmcat.com>
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Signed-off-by: Andy Green <andy@openmoko.com>
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[ Stop kernel from hanging every once in a while during Glamo
initialization. ]
debug-glamo-fb-cmdqueue-wait-timeout.patch
From: warmcat <andy@warmcat.com>
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http://bugzilla.openmoko.org/cgi-bin/bugzilla/show_bug.cgi?id=1172
This patch seems to alleviate the symptoms but doesn't cure them.
Keep it to keep development going, until we have a proper solution.
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This is a temporary work-around Mike Westerhof for this bug:
http://bugzilla.openmoko.org/cgi-bin/bugzilla/show_bug.cgi?id=788
See also
http://lists.openmoko.org/pipermail/openmoko-kernel/2008-February/000804.html
(It's the 2nd option.)
We may settle on a different solution in the future, depending on
feedback from upstream.
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S3C24xx ECC mis-calculates the bit to flip:
http://lists.infradead.org/pipermail/linux-mtd/2007-October/019586.html
If the error couldn't be corrected, we returned "no problem" :-(
http://lists.infradead.org/pipermail/linux-mtd/2007-October/019615.html
Signed-off-by: Werner Almesberger <werner@openmoko.org>
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On GTA02 we use FIQ to manage the vibrator IO now. That
is necessary because we stole timer3 from doing hw pwm
for vibrator. This keeps the same UI in /sys but does
"bitbang pwm" on the same vibrator GPIO
From: Andy Green <andy@openmoko.com>
Signed-off-by: Andy Green <andy@openmoko.com>
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This makes the FIQ stuff specific to one of the timers on the
s3c244x and adds the platform stuff for fiq in the gta02 init
Currently one sysfs node is exposed, a count of FIQ events
cat /sys/devices/platform/sc32440_fiq.0/fiq/count
From: Andy Green <andy@openmoko.com>
Signed-off-by: Andy Green <andy@openmoko.com>
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Adds a C-based FIQ ISR which is very convenient (and unusual --
normally you have to do FIQ ISR in assembler only).
Based on my article:
http://warmcat.com/_wp/2007/09/17/at91rm9200-fiq-faq-and-simple-example-code-patch/
Implemented as a platform device and driver.
Suspend / resume is tested and works.
Signed-off-by: Andy Green <andy@warmcat.com>
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Fail the build noisily if "mkimage" can't be found, e.g., if we forgot to add
the u-boot directory to PATH.
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Disable the hardware ECC checking on S3C2440 based platforms (HXD8, SMDK2440,
GTA02) for the time being, since our u-boot doesn't yet support it for 2k page
size NAND
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