| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2009-11-27 | ARM: Add Tauros2 L2 cache controller support | Lennert Buytenhek | |
| Support for the Tauros2 L2 cache controller as used with the PJ1 and PJ4 CPUs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> | |||
| 2009-11-27 | ARM: add base support for Marvell Dove SoC | Saeed Bishara | |
| The Marvell Dove (88AP510) is a high-performance, highly integrated, low power SoC with high-end ARM-compatible processor (known as PJ4), graphics processing unit, high-definition video decoding acceleration hardware, and a broad range of peripherals. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> | |||
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index : Kernel | |
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