Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-09-05 | mv643xx_eth: remove force_phy_addr field | Lennert Buytenhek | |
Currently, there are two different fields in the mv643xx_eth_platform_data struct that together describe the PHY address -- one field (phy_addr) has the address of the PHY, but if that address is zero, a second field (force_phy_addr) needs to be set to distinguish the actual address zero from a zero due to not having filled in the PHY address explicitly (which should mean 'use the default PHY address'). If we are a bit smarter about the encoding of the phy_addr field, we can avoid the need for a second field -- this patch does that. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> | |||
2008-08-09 | [ARM] Kirkwood: instantiate the orion_spi driver in the platform code | Lennert Buytenhek | |
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> | |||
2008-08-09 | [ARM] Kirkwood: Instantiate mv_xor driver | Saeed Bishara | |
Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> | |||
2008-08-07 | [ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach | Russell King | |
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | |||
2008-06-22 | [ARM] add Marvell Kirkwood (88F6000) SoC support | Saeed Bishara | |
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> |