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2009-09-12[ARM] pxafb: add accelerator ID for PXA3xx GCUDaniel Mack
Add ID 99 for PXA3xx frame buffers and report it in the pxa frame buffer conditionally, depending on a new flag in struct pxafb_mach_info. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: linux-fbdev-devel@lists.sourceforge.net Cc: Dennis Oliver Kropp <dok@directfb.org> Cc: Sven Neumann <s.neumann@raumfeld.com> Cc: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2008-12-29[ARM] pxafb: allow video memory size to be configurableEric Miao
The amount of video memory size is decided according to the following order: 1. <xres> x <yres> x <bits_per_pixel> by default, which is the backward compatible way 2. size specified in platform data 3. size specified in module parameter 'options' string or specified in kernel boot command line (see updated Documentation/fb/pxafb.txt) And now since the memory is allocated from system memory, the pxafb_mmap can be removed and the default fb_mmap() should be working all right. Also, since we now have introduced the 'struct pxafb_dma_buff' for DMA descriptors and palettes, the allocation can be separated cleanly. NOTE: the LCD DMA actually supports chained transfer (i.e. page-based transfers), to simplify the logic and keep the performance (with less TLB misses when accessing from memory mapped user space), the memory is allocated by alloc_pages_*() to ensures it's physical contiguous. Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
2008-12-17[ARM] pxafb: allow better platform configurable smart panel timingEric Miao
For smart panels (LCD panel with internal framebuffer), the following LCCR3 register bits have different meanings than the parallel one: LCCR3_PCP - controls the L_PCLK_WR polarity LCCR3_HSP - controls the L_LCLK_A0 polarity LCCR3_VSP - controls the L_FCLK_RD polarity To keep minimum change to the original parallel timing, the .lcd_conn flags and 'pxafb_mode_info.sync' are re-used to reflect this: LCD_PCLK_EDGE_{RISE,FALL} - configures LCCR3_PCP sync & FB_SYNC_{HOR,VERT}_HIGH_ACT - configures LCCR3_{HSP,VSP} Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-12-17[ARM] pxafb: add color TFT 8BPP LCD panel typeEric Miao
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-11-11pxafb: introduce LCD_TYPE_MASK and use it.Eric Miao
Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.miao@marvell.com>
2008-08-16[ARM] pxafb: add flag to specify output format on LDD pins when base is RGBT16Eric Miao
Another fix of inconsistent shift of the LCD_BIAS_ACTIVE_* and LCD_PCLK_EDGE_* is also included. Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-08-07[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>