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2009-12-28[ARM] Orion: fix PCIe inbound window programming when RAM size is not a ↵Lennert Buytenhek
power of two The PCIe inbound window size is supposed to be a power of two. If the total amount of RAM installed in the system is not a power of two, round it up such that it is. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-08-24[ARM] Kirkwood: __init requires linux/init.hMartin Michlmayr
Include linux/init.h for __init to fix this error: CC [M] drivers/net/wireless/wl12xx/boot.o In file included from arch/arm/mach-kirkwood/include/mach/gpio.h:13, from arch/arm/include/asm/gpio.h:5, from include/linux/gpio.h:7, from drivers/net/wireless/wl12xx/boot.c:24: arch/arm/plat-orion/include/plat/gpio.h:32: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘orion_gpio_init’ make[6]: *** [drivers/net/wireless/wl12xx/boot.o] Error 1 make[5]: *** [drivers/net/wireless/wl12xx] Error 2 Signed-off-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08[ARM] Orion/Kirkwood: rename orion5x_wdt to orion_wdtNicolas Pitre
The Orion watchdog driver is also used on Kirkwood. Convention is to use orion5x for stuff specific to 88F5xxx Orion chips and simply "orion" for shared stuff across SoCs including Kirkwood. Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08[ARM] orion: convert gpio to use gpiolibErik Benada
Signed-off-by: Erik Benada <erikbenada@yahoo.ca> [ nico: fix locking, additional cleanups ] Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08[ARM] orion: make sure sched_clock() usage of cnt32_to_63() is safeNicolas Pitre
With a TCLK = 200MHz, the half period of the hardware timer is roughly 10 seconds. Because cnt32_to_63() must be called at least once per half period of the base hardware counter, it is a bit risky to rely solely on scheduling to generate frequent enough calls. Let's use a kernel timer to ensure this. Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-06-08[ARM] orion: sched_clock implementation for orion platformsStefan Agner
sched_clock implementation for orion platform. Its realized using free-running clocksource timer, which provides a resolution of 7.5ns (depending on tclk). It's derived from PXA's sched_clock implementation. [ nico: renamed orion2ns to tclk2ns, fixed max value in the comment ] Signed-off-by: Stefan Agner <stefan.agner@yahoo.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-04-24Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 5460/1: Orion: reduce namespace pollution [ARM] 5458/1: pcmcia: pxa2xx-sharpsl: check if we do have Scoop config [ARM] 5457/1: mach-imx gpio buildfix [ARM] 5456/1: add sys_preadv and sys_pwritev [ARM] pxa/pcm990: start external GPIOs immediately after built-in ones [ARM] pxa/palm27x: General fix for Palm27x aSoC driver [ARM] pxa/mioa701: use GPIO95 as AC97 reset line [ARM] pxa: merge AC97 platform data structures [ARM] pxa/magician: remove un-necessary #include of pxa-regs.h and hardware.h
2009-04-23[ARM] 5460/1: Orion: reduce namespace pollutionNicolas Pitre
Symbols like SOFT_RESET are way too generic to be exported at large. To avoid this, let's move the mbus bridge register defines into a separate file and include it where needed. This affects mach-kirkwood, mach-loki, mach-mv78xx0 and mach-orion5x simultaneously as they all share code in plat-orion which relies on those defines. Some other defines have been moved to narrower scopes, or simply deleted when they had no user. This fixes compilation problem with mpt2sas on the above listed platforms. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-21clocksource: pass clocksource to read() callbackMagnus Damm
Pass clocksource pointer to the read() callback for clocksources. This allows us to share the callback between multiple instances. [hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods] [akpm@linux-foundation.org: cleanup] Signed-off-by: Magnus Damm <damm@igel.co.jp> Acked-by: John Stultz <johnstul@us.ibm.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-28Merge branch 'origin' into develRussell King
Conflicts: sound/soc/pxa/pxa2xx-i2s.c
2009-03-25[WATCHDOG] orion5x_wdt: fix compile issue by providing tclk as platform dataThomas Reitmayr
The orion5x-wdt driver is now registered as a platform device and receives the tclk value as platform data. This fixes a compile issue cause by a previously removed define "ORION5X_TCLK". Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Acked-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Kristof Provost <kristof@sigsegv.be> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Martin Michlmayr <tbm@cyrius.com> Cc: Sylver Bruneau <sylver.bruneau@googlemail.com> Cc: Kunihiko IMAI <bak@d2.dion.ne.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2009-02-26[ARM] Kirkwood: SDIO driver registration for DB6281 and RD6281Nicolas Pitre
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-19[ARM] Orion: make gpio /input/output validation separateNicolas Pitre
Especially on Kirkwood, a couple GPIOs are actually only output capable. Let's separate the ability to configure a GPIO as input or output to accommodate this restriction. Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-02-17[ARM] 5401/1: Orion: fix edge triggered GPIO interrupt supportNicolas Pitre
The GPIO interrupts can be configured as either level triggered or edge triggered, with a default of level triggered. When an edge triggered interrupt is requested, the gpio_irq_set_type method is called which currently switches the given IRQ descriptor between two struct irq_chip instances: orion_gpio_irq_level_chip and orion_gpio_irq_edge_chip. This happens via __setup_irq() which also calls irq_chip_set_defaults() to assign default methods to uninitialized ones. The problem is that irq_chip_set_defaults() is called before the irq_chip reference is switched, leaving the new irq_chip (orion_gpio_irq_edge_chip in this case) with uninitialized methods such as chip->startup() causing a kernel oops. Many solutions are possible, such as making irq_chip_set_defaults() global and calling it from gpio_irq_set_type(), or calling __irq_set_trigger() before irq_chip_set_defaults() in __setup_irq(). But those require modifications to the generic IRQ code which might have adverse effect on other architectures, and that would still be a fragile arrangement. Manually copying the missing methods from within gpio_irq_set_type() would be really ugly and it would break again the day new methods with automatic defaults are added. A better solution is to have a single irq_chip instance which can deal with both edge and level triggered interrupts. It is also a good idea to switch the IRQ handler instead, as the edge IRQ handler allows for one edge IRQ event to be queued as the IRQ is actually masked only when that second IRQ is received, at which point the hardware can queue an additional IRQ event, making edge triggered interrupts a bit more reliable. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-01-02Merge branch 'cpus4096-for-linus-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits) x86: export vector_used_by_percpu_irq x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and() sched: nominate preferred wakeup cpu, fix x86: fix lguest used_vectors breakage, -v2 x86: fix warning in arch/x86/kernel/io_apic.c sched: fix warning in kernel/sched.c sched: move test_sd_parent() to an SMP section of sched.h sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0 sched: activate active load balancing in new idle cpus sched: bias task wakeups to preferred semi-idle packages sched: nominate preferred wakeup cpu sched: favour lower logical cpu number for sched_mc balance sched: framework for sched_mc/smt_power_savings=N sched: convert BALANCE_FOR_xx_POWER to inline functions x86: use possible_cpus=NUM to extend the possible cpus allowed x86: fix cpu_mask_to_apicid_and to include cpu_online_mask x86: update io_apic.c to the new cpumask code x86: Introduce topology_core_cpumask()/topology_thread_cpumask() x86: xen: use smp_call_function_many() x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c ... Fixed up trivial conflict in kernel/time/tick-sched.c manually
2008-12-20[ARM] Orion: share GPIO IRQ handling codeLennert Buytenhek
Split off Orion GPIO IRQ handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-12-20[ARM] Orion: share GPIO handling codeLennert Buytenhek
Split off Orion GPIO handling code into plat-orion/, and add support for multiple sets of (32) GPIO pins. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-12-15Merge branch 'omap3-upstream' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
2008-12-13cpumask: convert struct clock_event_device to cpumask pointers.Rusty Russell
Impact: change calling convention of existing clock_event APIs struct clock_event_timer's cpumask field gets changed to take pointer, as does the ->broadcast function. Another single-patch change. For safety, we BUG_ON() in clockevents_register_device() if it's not set. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@elte.hu>
2008-12-04[ARM] Orion: add the option to support different ehci phy initializationRonen Shitrit
The Orion ehci driver serves the Orion, kirkwood and DD Soc families. Since each of those integrate a different USB phy we should have the ability to use few initialization sequences or to leave the boot loader phy settings as is. Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
2008-12-02[ARM] Orion: fix bug in pcie configuration cycle function field maskSaeed Bishara
The function field is 3 bits. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-08-09[ARM] Move include/asm-arm/plat-orion to arch/arm/plat-orion/include/platLennert Buytenhek
This patch performs the equivalent include directory shuffle for plat-orion, and fixes up all users. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-08-07[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/machRussell King
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-06-22[ARM] Orion: PCIe x4/x1 detection supportLennert Buytenhek
The Discovery Duo (MV78xx0) has two x4 PCIe ports which can either be used in x4 mode or in quad x1 mode. This patch adds an accessor function to the generic plat-orion PCIe handling code to detect in which of the two modes we're running (which is determined by strap pins and/or configured by the bootloader). Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22[ARM] Orion: add a separate BRIDGE_INT_TIMER1_CLR defineKe Wei
Some Feroceon-based SoCs have an MBUS bridge interrupt controller that requires writing a one instead of a zero to clear edge interrupt sources such as timer expiry. This patch adds a new BRIDGE_INT_TIMER1_CLR define, which platform code can set to either ~BRIDGE_INT_TIMER1 (write-zero-to-clear) or BRIDGE_INT_TIMER1 (write-one-to-clear) depending on the platform. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
2008-06-22[ARM] Orion: top-level IRQs are level-triggeredLennert Buytenhek
Make it clear that Orion top-level IRQs are level-triggered. This means that we don't need an ->ack() handler, or at least, we don't need the ->ack() handler (or the acking part of the ->mask_ack() handler) to actually do anything. Given that, we might as well point our ->mask_ack() handler at the ->mask() handler instead of providing a dummy ->ack() handler, since providing a ->mask_ack() handler on level IRQ sources will prevent ->ack() from ever being called. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
2008-04-10[ARM] 4954/1: Orion: fix some function section mismatchNicolas Pitre
Without this, lspci won't work. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2008-03-27plat-orion: share time handling codeLennert Buytenhek
Split off Orion time handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-03-27plat-orion: share PCIe handling codeLennert Buytenhek
Split off Orion PCIe handling code into plat-orion/. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-03-27plat-orion: share IRQ handling codeLennert Buytenhek
Split off Orion IRQ handling code into plat-orion/, and add support for multiple sets of (32) interrupts. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>
2008-03-27plat-orion: introduceLennert Buytenhek
Create arch/arm/plat-orion/, for peripherals shared between various Marvell Orion SoCs. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Reviewed-by: Tzachi Perelstein <tzachi@marvell.com> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Nicolas Pitre <nico@marvell.com>