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2009-05-23IXP42x: Use __fls() in QMgr interrupt handlers.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-23IXP42x: Add QMgr support for IXP425 rev. A0 processors.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-23IXP42x: add NPE support for IXP425 rev. A0 processors.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-23IXP42x: Identify Intel IXP425 rev. A0 processors.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-20IXP4xx: Add support for the second half of the 64 hardware queues.Krzysztof Hałasa
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-15Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: ASoC: DaVinci EVM board support buildfixes ASoC: DaVinci I2S updates ASoC: davinci-pcm buildfixes ALSA: pcsp: fix printk format warning ALSA: riptide: postfix increment and off by one pxa2xx-ac97: fix reset gpio mode setting ASoC: soc-core: fix crash when removing not instantiated card
2009-05-15Merge branch 'fix/asoc' into for-linusTakashi Iwai
* fix/asoc: ASoC: DaVinci EVM board support buildfixes ASoC: DaVinci I2S updates ASoC: davinci-pcm buildfixes pxa2xx-ac97: fix reset gpio mode setting ASoC: soc-core: fix crash when removing not instantiated card
2009-05-15ASoC: DaVinci EVM board support buildfixesDavid Brownell
This is a build fix, resyncing the DaVinci EVM ASoC board code with the version in the DaVinci tree. That resync includes support for the DM355 EVM, although that board isn't yet in mainline. (NOTE: also includes a bugfix to the platform_add_resources call, recently sent by Chaithrika U S <chaithrika@ti.com> but not yet merged into the DaVinci tree.) Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-05-10Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (26 commits) bonding: fix panic if initialization fails IXP4xx: complete Ethernet netdev setup before calling register_netdev(). IXP4xx: use "ENODEV" instead of "ENOSYS" in module initialization. ipvs: Fix IPv4 FWMARK virtual services ipv4: Make INET_LRO a bool instead of tristate. net: remove stale reference to fastroute from Kconfig help text net: update skb_recycle_check() for hardware timestamping changes bnx2: Fix panic in bnx2_poll_work(). net-sched: fix bfifo default limit igb: resolve panic on shutdown when SR-IOV is enabled wimax: oops: wimax_dev_add() is the only one that can initialize the state wimax: fix oops if netlink fails to add attribute Bluetooth: Move dev_set_name() to a context that can sleep netfilter: ctnetlink: fix wrong message type in user updates netfilter: xt_cluster: fix use of cluster match with 32 nodes netfilter: ip6t_ipv6header: fix match on packets ending with NEXTHDR_NONE netfilter: add missing linux/types.h include to xt_LED.h mac80211: pid, fix memory corruption mac80211: minstrel, fix memory corruption cfg80211: fix comment on regulatory hint processing ...
2009-05-09IXP4xx: use "ENODEV" instead of "ENOSYS" in module initialization.Krzysztof Hałasa
ENOSYS makes modutils complain about missing kernel module support. Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
2009-05-07[ARM] 5507/1: support R_ARM_MOVW_ABS_NC and MOVT_ABS relocation typesPaul Gortmaker
From: Bruce Ashfield <bruce.ashfield@windriver.com> To fully support the armv7-a instruction set/optimizations, support for the R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS relocation types is required. The MOVW and MOVT are both load-immediate instructions, MOVW loads 16 bits into the bottom half of a register, and MOVT loads 16 bits into the top half of a register. The relocation information for these instructions has a full 32 bit value, plus an addend which is stored in the 16 immediate bits in the instruction itself. The immediate bits in the instruction are not contiguous (the register # splits it into a 4 bit and 12 bit value), so the addend has to be extracted accordingly and added to the value. The value is then split and put into the instruction; a MOVW uses the bottom 16 bits of the value, and a MOVT uses the top 16 bits. Signed-off-by: David Borman <david.borman@windriver.com> Signed-off-by: Bruce Ashfield <bruce.ashfield@windriver.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-07[ARM] 5506/1: davinci: DMA_32BIT_MASK --> DMA_BIT_MASK(32)Kevin Hilman
As per commit 284901a90a9e0b812ca3f5f852cbbfb60d10249d, use DMA_BIT_MASK(n) Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-05Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6Russell King
2009-05-05Merge branch 'for-rmk' of git://git.marvell.com/orionRussell King
2009-05-05i.MX31: Disable CPU_32v6K in mx3_defconfig.Magnus Lilja
The i.MX31 ARM11 core is not a v6K core. Disable this option as it is incompatible with non v6K cores. Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05mx27ads: move PBC mapping out of vmalloc spaceUwe Kleine-König
Before this patch I got the following line in my dmesg: [ 0.000000] BUG: mapping for 0xd4000000 at 0xeb000000 overlaps vmalloc space VMALLOC_END is 0xf4000000 and there are the following other mappings defined for mx27ads: (0xa0500000,+0x00001000) maps to 0xffff0000 (0x10000000,+0x00100000) maps to 0xf4000000 (0x80000000,+0x00100000) maps to 0xf4100000 (0xd8000000,+0x00100000) maps to 0xf4200000 So map PBC to 0xf4300000. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05MXC: remove BUG_ON in interrupt handlerSascha Hauer
On i.MX31 I sometimes get spurious interrupts. There is no need to crash the whole system when this happens. Instead, silently ignore it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05mx31: remove mx31moboard_defconfigValentin Longchamp
We want to have a mx31_defconfig file that builds a kernel that is able to boot on all support mx31 systems and thus also can be better tested by automatic build scripts. For these reasons, this config file is not needed anymore. Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05ARM: ARCH_MXC should select HAVE_CLKGuennadi Liakhovetski
All i.MX platforms support <linux/clk.h> calls and should select HAVE_CLK. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05mxc : BUG in imx_dma_requestMartin Fuzzey
On MX2 platforms imx_dma_request() calls request_irq() which may sleep with interrupts disabled. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-05mxc : Clean up properly when imx_dma_free() used without imx_dma_disable()Martin Fuzzey
The sequence imx_dma_request() imx_dma_enable() imx_dma_free() left the dma channel in_use mode and did not release the timer. Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2009-05-04[ARM] mv78xx0: update defconfigNicolas Pitre
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-04[ARM] orion5x: update defconfigNicolas Pitre
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-04[ARM] Kirkwood: update defconfigNicolas Pitre
Signed-off-by: Nicolas Pitre <nico@marvell.com>
2009-05-03[ARM] Kconfig typo fix: "PXA930" -> "CPU_PXA930".Robert P. J. Day
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-05-03Merge branch 'v2630-rc3-fixes' of git://aeryn.fluff.org.uk/bjdooks/linuxRussell King
2009-05-02Merge master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* master.kernel.org:/home/rmk/linux-2.6-arm: (45 commits) [ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten with stale data [ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is created [ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branch [ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation can fail davinci: DM644x: NAND: update partitioning davinci: update DM644x support in preparation for more SoCs davinci: DM644x: rename board file davinci: update pin-multiplexing support davinci: serial: generalize for more SoCs davinci: DM355 IRQ Definitions davinci: DM646x: add interrupt number and priorities davinci: PSC: Clear bits in MDCTL reg before setting new bits davinci: gpio bugfixes davinci: add EDMA driver davinci: timers: use clk_get_rate() [ARM] pxa/littleton: add missing da9034 touchscreen support [ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expanders [ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not working [ARM] pxa: make ads7846 on corgi and spitz to sync on HSYNC [ARM] pxa: remove unused CPU_FREQ_PXA Kconfig symbol ...
2009-05-01[ARM] S3C2412: Add missing cache flush in suspend codeBen Dooks
The alterations to the suspend code missed adding a call to the cache flushing routines during the suspend path of the S3C2412. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
2009-05-01[ARM] S3C64XX: Add S3C64XX_PA_IIS{0,1} to <mach/map.h>Ben Dooks
Add the physical address of the two I2S channel register blocks. Signed-off-by: Ben Dooks <ben@simtec.co.uk>
2009-04-30[ARM] 5489/1: ARM errata: Data written to the L2 cache can be overwritten ↵Catalin Marinas
with stale data This patch is a workaround for the 460075 Cortex-A8 (r2p0) erratum. It configures the L2 cache auxiliary control register so that the Write Allocate mode for the L2 cache is disabled. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-30[ARM] 5490/1: ARM errata: Processor deadlock when a false hazard is createdCatalin Marinas
This patch adds a workaround for the 458693 Cortex-A8 (r2p0) erratum. It sets the corresponding bits in the auxiliary control register so that the PLD instruction becomes a NOP. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-30[ARM] 5487/1: ARM errata: Stale prediction on replaced interworking branchCatalin Marinas
This patch adds the workaround for the 430973 Cortex-A8 (r1p0..r1p2) erratum. The BTAC/BTB is now flushed at every context switch. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-30[ARM] 5488/1: ARM errata: Invalidation of the Instruction Cache operation ↵Catalin Marinas
can fail This patch implements the recommended workaround for erratum 411920 (ARM1136, ARM1156, ARM1176). Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-04-28Merge branch 'fix' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
2009-04-27arm: Use __INIT macro instead of .text.init.Tim Abbott
arm is placing some code in the .text.init section, but it does not reference that section in its linker scripts. This change moves this code from the .text.init section to the .init.text section, which is presumably where it belongs. Signed-off-by: Tim Abbott <tabbott@mit.edu> Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-27Merge branch 'for-rmk' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
2009-04-27davinci: DM644x: NAND: update partitioningDavid Brownell
Update NAND partitioning for the dm6446 evm, unmasking the hidden data at the beginning and letting the kernel be updated from Linux. - This is boot-compatible with TI's software (U-Boot 1.20 and both the 2.6.10 and 2.6.18 kernels), in terms of startup and loading kernels from flash. - In the same way, it's also boot-compatible with mainline U-Boot, which stores U-Boot params in block 0 not block 16. - It's not quite compatible with systems that previously used NAND partitions to hold (filesystem) data. The compatibilities are a bit different based on which kernel was used previously + Users of TI/MV kernels no longer see mtd2 "params" (mainline u-boot env is in a different place) * Filesystem is now mtd2 ... vs mtd3 + Users of GIT kernels now see mtd0 and mtd1 partitions * Filesystem partition starts 640 KBytes earlier * Filesystem is now mtd2 ... vs mtd0 * Linux now *uses* the flash-resident BBT * Removes annoying slowdown/hiccup during boot * Potentially ~64KB less space available with TI/MV kernels If you *used* NAND partitions from Linux, there is no solution that's fully compatible with all previous kernels in those respects ... ergo this "best compromise". It'd be good to back back up the filesystem data; or, carry your own backwards-compatibility patch for awhile. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: update DM644x support in preparation for more SoCsKevin Hilman
Rework DM644x code into SoC specific and board specific parts. This is also to generalize the structure a bit so it's easier to add support for new SoCs in the DaVinci family. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: DM644x: rename board fileKevin Hilman
Rename DM6446 EVM board file, no functional changes. Code is updated and reworked in following patch. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: update pin-multiplexing supportKevin Hilman
Update MUX support to be more general and useful across multiple SoCs in the DaVinci family. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: serial: generalize for more SoCsKevin Hilman
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: DM355 IRQ Definitionss-paulraj@ti.com
Adding IRQ defintions for DaVinci DM355 and default interrupt priorities for DM355 Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: DM646x: add interrupt number and prioritiesSudhakar Rajashekhara
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: PSC: Clear bits in MDCTL reg before setting new bitsMark A. Greer
Clear any set bits in the 'NEXT' field of the MDCTL register in the Power and Sleep Controller (PSC) before setting any new bits. This also allows some minor cleanup by removing some no longer needed lines of code. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: gpio bugfixesDavid Brownell
Update the DaVinci GPIO code to work better on non-dm6446 parts, notably the dm355: - Only handle the number of GPIOs the chip actually has. So for example on dm6467, GPIO-42 is the last GPIO, and trying to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446. - Enable GPIO interrupts on each 16-bit GPIO-irq bank ... previously, only the first five were enabled, so GPIO-80 and above (on dm355) wouldn't trigger IRQs. - Use the right IRQ for each GPIO bank. The wrong values were used for dm355 chips, so GPIO IRQs got routed incorrectly. - Handle up to four pairs of 16-bit GPIO banks ... previously only three were handled, so accessing GPIO-96 and up (e.g. on dm355) would oops. - Update several comments that were dm6446-specific. Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs on the DM355 EVM. One thing this doesn't do is handle the way some of the GPIO numbers on dm6467 are reserved but aren't valid as GPIOs. Some bitmap logic could fix that if needed. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: add EDMA driverKevin Hilman
Original code for 2.6.10 and 2.6.28 series done by Texas Instruments and MontaVista, but major updates and rework done by Troy Kisky and David Brownell. Cc: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27davinci: timers: use clk_get_rate()Kevin Hilman
Use clock framework instead of hard-coded CLOCK_TICK_RATE for determining timer tick frequencies. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-04-27[ARM] pxa/littleton: add missing da9034 touchscreen supportEric Miao
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-04-27[ARM] pxa/zylonite: configure GPIO18/19 correctly, used by 2 GPIO expandersEric Miao
Signed-off-by: Eric Miao <eric.miao@marvell.com>
2009-04-27[ARM] pxa/zylonite: fix the issue of unused SDATA_IN_1 pin get AC97 not workingEric Miao
GPIO17_SDATA_IN_1 and GPIO36_SDATA_IN_1 are originally designed for the 2nd codec but unused on the board, yet they are initialized incorrectly by the bootloader as the SDATA_IN_1 alternate function, thus causing AC97 fail to work. Fix this issue by configuring these pins as normal GPIO to avoid the noise from these pins being treated as signals from the 2nd codec. Signed-off-by: Eric Miao <eric.miao@marvell.com>