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This symbol is required by locomo backlight driver, exporting this
allows the driver to be built as a module.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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GPIO3/GPIO4 are a bit special on pxa27x, since it depends on PCFR/PI2C_EN
bit, add their definitions here with comments.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Stefan Schmidt <stefan@datenfreihafen.org>
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PXA935 has changed its implementor ID from Intel to Marvell, this
patch modifies arch/arm/boot/compressed/head.S and proc-xsc3.S to
support a smooth bootup.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Let's put these devices into a central place even if they are now
processor specific, as they might be re-used in later processors.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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for the reference of __REG() within <mach/hardware.h>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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The optimal change would be to move the AC97 register definitions into
the AC97 driver, unfortunately, the registers are shared between several
files. Move them into a dedicated regs-ac97.h first.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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There two are internal registers that are used to control the power
management of the Internal Memory (i.e. Internal SRAM). They are
referenced nowhere and removed here to simplify pxa-regs.h a bit.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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We now have generic PWM API for PXA, the PWM registers definitions are
now used nowhere, and it is not encouraged to manipulate them directly
by driver code.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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pxa_gpio_{get,set}_value() are not used anymore, remove them from hardware.h.
Declaration of pxa_gpio_mode() is still being referenced and thus moved into
pxa2xx-gpio.h
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Signed-off-by: Eric Miao <eric.miao@marvell.com>
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Original patch from Marek Vasut, the problems with PXA26x are:
1. there are additional 4 GPIOs 86,87,88,89 have their direction bits
inverted in GPDR2, as well as their alternate function bits being
'1' for their GPIO functionality in GAFRx
2. there is no easy way to decide if the processor is a pxa26x or a
pxa250/pxa255 at run-time, so the assumption here is the pxa26x
will be treated as one of the pxa25x variants, and board code
should have a better knowledge of the processor it is featured
Introduce pxa26x_init_irq() for the second purpose, and treat the
additional GPIOs > 85 on PXA25x specially.
Kconfig option CONFIG_CPU_PXA26x is introduced to optimize the code
a bit when PXA26x support isn't needed. Board config options have
to select this to enable the support for PXA26x.
__gpio_is_inverted() will be optimized way when CONFIG_CPU_PXA26x
isn't selected.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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This reverts commit da1a3dc0ebb4f9209a1939eaa6b18901e0cd7bc0.
The originally proposed way in the above commit is incorrect. And
there is no easy way to distinguish between pxa25x and pxa26x at
run-time.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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The 'gpio_nr' can really be inferred by 'pxa_last_gpio', and since we
already have that variable, remove the unnecessary 'gpio_nr' now.
Also, fix the incorrect GPIO number passed in pxa27x_init_irq().
Note: pxa_last_gpio should be initialized earlier, and this is true
since it's been assigned in machine_desc->init_irq().
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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PXA SoC have several GPIOs muxed on only one wakeup source.
Add support for these wakeup sources which were missing
in mfp core support.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
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The spi master driver must have num_chipselect set to allow the bus to
initialise. Pass this through the platform data.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch fixes bad formatting found in
mach-sa1100 files.
What it does is to replace/delete things like
excessive spaces (start || endline). The code
looks the same just alot less junk.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add debounce support for ep93xx gpio interrupts.
On the EP93xx, GPIO ports A, B, and F can be used to generate
interrupts. For each port, if interrupts are enabled, it is
possible to debouce the input signal. Debouncing is implemented
by passing the input signal through a 2-bit shift register clocked
by a 128Hz clock.
This patch adds a platform specific way to enable the debouce
feature for these input ports.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Allow the ep93xx platform init code to register the built-in i2c bus.
The EP93xx processor has two GPIO pins dedicated for an I2C bus. This
patch registers the platform supplied i2c_board_info and the necessary
platform_device information for the i2c-gpio driver to use these pins.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add Cirrus Logic EDB9307A Dev Board to arch/arm/mach-ep93xx
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
This patch adds the detection routines to recognize the different
AT91CAP9 revisions (based on the PMC subsystem version number), and
uses them to:
- activate a workaround for the external interrupts levels
(on revB CPUs)
- set the UDPHS_BYPASS bit (on revB CPUs)
- set AT91_GPBR register address to the correct offset
(0xfffffd50 on revB, 0xfffffd60 on revC)
For debugging usage, the CPU revision can be found in /proc/cpuinfo
on the 'Revision' line.
This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch)
where it has been tested for the last 6 months.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add support for the Adeneo NeoCore 926 board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Convert the SAM9 and CAP9 board-specific files to make use of the
sam9_smc_configure() method to configure the memory-controller for
external peripherals.
The following boards have been modified:
cam60 : NAND
cap9adk : NAND, NOR
qil-a9260 : NAND
sam9-l9260 : NAND
sam9260ek : NAND
sam9261ek : DM9000 Ethernet, NAND
sam9263 : NAND
sam9g20ek : NAND
sam9rlek : NAND
usb-a9260 : NAND
usb-a9263 .: NAND
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In at91_add_device_nand(), do not configure the Static Memory
controller with specific timing values.
The *_devices.c files are board independent, and the SMC timing values
are specific to the NAND devices that are installed on the board.
The board-specific files are now responsible for configuring the
Static Memory controller (if the don't want to leave it up to a
bootloader).
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add a structure 'sam9_smc_config' and function sam9_smc_configure() to
allow the board-specific files to specify the configuration of the
Static Memory Controller per chip-select. This allows the board file
to specify timings for NAND flash, NOR flash or other external
peripherals.
This functionality can be used for all the SAM9 and CAP9 processors.
(the AT91RM9200 has a different memory-controller)
This patch is based on similar code in the AVR32 architecture.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This seems to be missing from the arm:devel branch, though the other
RealView configurations were modified accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The original file was based on 2.6.19-rc3. Apart from the new symbols,
the explicitly enabled eatures are AEABI, REALVIEW_HIGH_PHYS_OFFSET and
MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The original file was based on 2.6.14-rc2. Apart from the new symbols,
the explicitly enabled features are AACI, MMC, AEABI,
MACH_REALVIEW_PB1176 and MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This patch adds smc911x.c device configuration to the RealView
platforms. At some point it may be changed to the new smsc911x.c driver
(once complete testing was done).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This patch moves the Ethernet device registration from individual
realview_*.c files to core.c.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Some of the calls weren't necessary and some others were duplicated.
This patch tidies up the platsmp.c file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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All the cases where the local timer for a CPU is accessed happen on the
corresponding current CPU, hence no need to access the per-CPU local
timer mappings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This patch adds the necessary definitions and Kconfig entries to enable
Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.
Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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The MCR for flushing the whole D cache is undefined on ARMv7 CPUs.
Signed-off-by: Harry Fearnhamm <Harry.Fearnhamm@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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This patch adds support for RealView/PB-A8, a platform based on
Cortex-A8 with support for PCI-E and compact flash.
Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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RealView boards like PB11MPCore have 512MB of RAM available contiguously
at 0x70000000. Half of the memory is mirrored at 0x00000000 for
backwards compatibility. This patch adds the
CONFIG_REALVIEW_HIGH_PHYS_OFFSET option option to change the physical
base address so that the full amount of RAM is available to Linux. Note
that the EB board has 256MB of RAM also mirrored at 0x70000000, the only
board without this feature being PB1176.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
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Update to use the asm/sections.h header rather than declaring these
symbols ourselves. Change __data_start to _data to conform with the
naming found within asm/sections.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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lh7a40x only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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