aboutsummaryrefslogtreecommitdiff
path: root/arch/mips/mm/sc-mips.c
AgeCommit message (Collapse)Author
2009-09-30MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.Kevin Cernekee
This extends commit a8ca8b64e3fdfec17679cba0ca5ce6e3ffed092d to cover MIPSxx-style board cache code. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29[MIPS] MIPS32/MIPS64 S-cache fix and cleanupAtsushi Nemoto
Use blast_scache_range, blast_inv_scache_range for mips32/mips64 scache routine. Also initialize waybit for MIPS32/MIPS64 S-cache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29[MIPS] MIPS32/MIPS64 secondary cache managementChris Dearman
Signed-off-by: Chris Dearman <chris@mips.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-02 05:16:28 +0000