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2007-02-06[MIPS] Move some kernel globals from asm file to C file.Atsushi Nemoto
This get rid of some undesirable hole in BSS section due to random order of placement. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] Setup min_low_pfn/max_low_pfn correctlyFranck Bui-Huu
This patch makes a better usage of these two globals. 'min_low_pfn' is now correctly setup for all configs, which allow us to rely on it in boot memory code init. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-06[MIPS] prom_free_prom_memory cleanupAtsushi Nemoto
Current prom_free_prom_memory() implementations are almost same as free_init_pages(), or no-op. Make free_init_pages() extern (again) and make prom_free_prom_memory() use it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-24[MIPS] Fix reported amount of freed memory - it's in kB not bytesThiemo Seufer
While at it, change message on DEC for consistency. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-19[MIPS] Delete duplicate call to load_irq_save.Ralf Baechle
This call may have resulted to local_tlb_flush_range returning with interrupts disabled resulting in excessive interrupt latency. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-01-08[MIPS] TX49: Fix use of CDEX build_store_reg()Atsushi Nemoto
The commit a923660d786a53e78834b19062f7af2535f7f8ad accidently prevents TX49 from using CDEX. Use build_dst_pref() only if prefetch for store was really available. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-13[PATCH] MIPS: Fix COW D-cache aliasing on forkAtsushi Nemoto
Provide a custom copy_user_highpage() to deal with aliasing issues on MIPS. It uses kmap_coherent() to map an user page for kernel with same color. Rewrite copy_to_user_page() and copy_from_user_page() with the new interfaces to avoid extra cache flushing. The main part of this patch was originally written by Ralf Baechle; Atushi Nemoto did the the debugging. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-12[MIPS] paging_init(): use highend_pfn/highstart_pfnFranck Bui-Huu
This patch makes paging_init() use highend_pfn/highstart_pfn globals. It removes the need of 'high' local which was needed only by HIGHMEM config. More important perhaps, it fixes a bug when HIGHMEM is set but there's actually no physical highmem (highend_pfn = 0) Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-10[MIPS] Export local_flush_data_cache_page for sake of IDE.Ralf Baechle
On a CPU with aliases the IDE core needs to flush caches in the special IDE variants of insw, insl etc. If IDE support is built as a module this will only work if local_flush_data_cache_page happens is exported as a module. As per policy export local_flush_data_cache_page as GPL symbol only. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-12-08[PATCH] Generic ioremap_page_range: mips conversionHaavard Skinnemoen
Convert MIPS to use generic ioremap_page_range() [yoichi_yuasa@tripeaks.co.jp: build fix] Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07[PATCH] Pass struct dev pointer to dma_cache_sync()Ralf Baechle
Pass struct dev pointer to dma_cache_sync() dma_cache_sync() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_cache_sync to take a struct device pointer as first argument and fix all its callers to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07[PATCH] Add struct dev pointer to dma_is_consistent()Ralf Baechle
dma_is_consistent() is ill-designed in that it does not have a struct device pointer argument which makes proper support for systems that consist of a mix of coherent and non-coherent DMA devices hard. Change dma_is_consistent to take a struct device pointer as first argument and fix the sole caller to pass it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07[PATCH] mm: pagefault_{disable,enable}()Peter Zijlstra
Introduce pagefault_{disable,enable}() and use these where previously we did manual preempt increments/decrements to make the pagefault handler do the atomic thing. Currently they still rely on the increased preempt count, but do not rely on the disabled preemption, this might go away in the future. (NOTE: the extra barrier() in pagefault_disable might fix some holes on machines which have too many registers for their own good) [heiko.carstens@de.ibm.com: s390 fix] Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Acked-by: Nick Piggin <npiggin@suse.de> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-11-30[MIPS] Avoid dupliate D-cache flush on R400C / R4400 SC and MC variants.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Remove redundant r4k_blast_icache() callsAtsushi Nemoto
r4k_flush_cache_all() and r4k_flush_cache_mm() case: these are noop if the CPU did not have dc_aliases. It would mean we do not need to care about icache here. r4k_flush_cache_range case: if r4k_flush_cache_mm() did not need to care about icache, it would be same for this function. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Load modules to CKSEG0 if CONFIG_BUILD_ELF64=nAtsushi Nemoto
This is a patch to load 64-bit modules to CKSEG0 so that can be compiled with -msym32 option. This makes each module ~10% smaller. * introduce MODULE_START and MODULE_END * custom module_alloc() * PGD for modules * change XTLB refill handler synthesizer * enable -msym32 for modules again (revert ca78b1a5c6a6e70e052d3ea253828e49b5d07c8a) New XTLB refill handler looks like this: 80000080 dmfc0 k0,C0_BADVADDR 80000084 bltz k0,800000e4 # goto l_module_alloc 80000088 lui k1,0x8046 # %high(pgd_current) 8000008c ld k1,24600(k1) # %low(pgd_current) 80000090 dsrl k0,k0,0x1b # l_vmalloc_done: 80000094 andi k0,k0,0x1ff8 80000098 daddu k1,k1,k0 8000009c dmfc0 k0,C0_BADVADDR 800000a0 ld k1,0(k1) 800000a4 dsrl k0,k0,0x12 800000a8 andi k0,k0,0xff8 800000ac daddu k1,k1,k0 800000b0 dmfc0 k0,C0_XCONTEXT 800000b4 ld k1,0(k1) 800000b8 andi k0,k0,0xff0 800000bc daddu k1,k1,k0 800000c0 ld k0,0(k1) 800000c4 ld k1,8(k1) 800000c8 dsrl k0,k0,0x6 800000cc mtc0 k0,C0_ENTRYLO0 800000d0 dsrl k1,k1,0x6 800000d4 mtc0 k1,C0_ENTRYL01 800000d8 nop 800000dc tlbwr 800000e0 eret 800000e4 dsll k1,k0,0x2 # l_module_alloc: 800000e8 bgez k1,80000008 # goto l_vmalloc 800000ec lui k1,0xc000 800000f0 dsubu k0,k0,k1 800000f4 lui k1,0x8046 # %high(module_pg_dir) 800000f8 beq zero,zero,80000000 800000fc nop 80000000 beq zero,zero,80000090 # goto l_vmalloc_done 80000004 daddiu k1,k1,0x4000 80000008 dsll32 k1,k1,0x0 # l_vmalloc: 8000000c dsubu k0,k0,k1 80000010 beq zero,zero,80000090 # goto l_vmalloc_done 80000014 lui k1,0x8046 # %high(swapper_pg_dir) Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] Make free_init_pages() arguments to be physical addressesFranck Bui-Huu
It allows caller of this function to not care about CKSEG0/XKPHYS address mixes. It's now automatically done by free_init_pages(). We can now safely remove hack needed by 64 bit kernels with CONFIG_BUILD_ELF64=n in free_initmem(). Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] setup.c: clean up initrd related codeFranck Bui-Huu
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-30[MIPS] page.h: remove __pa() usages.Franck Bui-Huu
__pa() was used by virt_to_page() and virt_addr_valid(). These latter are used when kernel is initialised so __pa() is not appropriate, we use virt_to_phys() instead. Futhermore __pa() is going to take care of CKSEG0/XKPHYS address mix for 64 bit kernels. This makes __pa() more complex than virt_to_phys() and this extra work is not needed by virt_to_page() and virt_addr_valid(). Eventually it consolidates virt_to_phys() prototype by making its argument 'const'. this avoids some warnings that was due to some virt_to_page() usages which pass const pointer. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-22[MIPS] Hack for SB1 cache issuesThiemo Seufer
Removing flush_icache_page a while ago broke SB1 which was using an empty flush_data_cache_page function. This glues things well enough so a more efficient but also more intrusive solution can be found later. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-06[MIPS] SB1: On bootup only flush cache on local CPU.Ralf Baechle
This fixes a warning on bootup warning in smp_call_function. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-01[MIPS] 16K & 64K page size fixesRalf Baechle
Derived from Peter Watkins <treestem@gmail.com>'s work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30[MIPS] Make SB1 cache flushes not to use on_each_cpuManish Lachwani
This fixes the start_kernel(): bug: interrupts were enabled early messages. Signed-off-by: Manish Lachwani <mlachwani@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-30[MIPS] Fix warning about unused definition in c-sb1.cYoichi Yuasa
arch/mips/mm/c-sb1.c: In function `sb1_cache_init': arch/mips/mm/c-sb1.c:447: warning: unused variable `handle_vec2_sb1' Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-21[MIPS] Fix aliasing bug in copy_to_user_page / copy_from_user_pageRalf Baechle
The current implementation uses a sequence of a cacheflush and a copy. This is racy in case of a multithreaded debuggee and renders GDB virtually unusable. Aside this fixes a performance hog rendering access to /proc/cmdline very slow and resulting in a enough cache stalls for the 34K AP/SP programming model to make the bare metal code on the non-Linux VPE miss RT deadlines. The main part of this patch was originally written by Ralf Baechle; Atushi Nemoto did the the debugging. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-19[MIPS] Fix iounmap argument to const volatile.Ralf Baechle
With the existing prototype the following code: const void __iomem *io = ioremap(); x = readb(io); iounmap(io); did result in a warning. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivialLinus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/bunk/trivial: (39 commits) Add missing maintainer countries in CREDITS Fix bytes <-> kilobytes typo in Kconfig for ramdisk fix a typo in Documentation/pi-futex.txt BUG_ON conversion for fs/xfs/ BUG_ON() conversion in fs/nfsd/ BUG_ON conversion for fs/reiserfs BUG_ON cleanups in arch/i386 BUG_ON cleanup in drivers/net/tokenring/ BUG_ON cleanup for drivers/md/ kerneldoc-typo in led-class.c debugfs: spelling fix rcutorture: Fix incorrect description of default for nreaders parameter parport: Remove space in function calls Michal Wronski: update contact info Spelling fix: "control" instead of "cotrol" reboot parameter in Documentation/kernel-parameters.txt Fix copy&waste bug in comment in scripts/kernel-doc remove duplicate "until" from kernel/workqueue.c ite_gpio fix tabbage fix file specification in comments ... Fixed trivial path conflicts due to removed files: arch/mips/dec/boot/decstation.c, drivers/char/ite_gpio.c
2006-10-03Attack of "the the"s in archMatt LaPlante
The patch below corrects multiple occurances of "the the" typos across several files, both in source comments and KConfig files. There is no actual code changed, only text. Note this only affects the /arch directory, and I believe I could find many more elsewhere. :) Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-10-03[MIPS] Fix size of zones_size and zholes_size arrayAtsushi Nemoto
Commit f06a96844a577c43249fce25809a4fae07407f46 broke MIPS. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-01[MIPS] Stacktrace build-fix and improvementAtsushi Nemoto
Fix build error due to stacktrace API change. Now save_stack_trace() tries to save all kernel context, including interrupts and exception. Also some asm code are changed a bit so that we can detect the end of current context easily. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-01[MIPS] Remove __flush_icache_pageAtsushi Nemoto
__flash_icache_page is unused, so kill it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-29[PATCH] pidspace: is_init()Sukadev Bhattiprolu
This is an updated version of Eric Biederman's is_init() patch. (http://lkml.org/lkml/2006/2/6/280). It applies cleanly to 2.6.18-rc3 and replaces a few more instances of ->pid == 1 with is_init(). Further, is_init() checks pid and thus removes dependency on Eric's other patches for now. Eric's original description: There are a lot of places in the kernel where we test for init because we give it special properties. Most significantly init must not die. This results in code all over the kernel test ->pid == 1. Introduce is_init to capture this case. With multiple pid spaces for all of the cases affected we are looking for only the first process on the system, not some other process that has pid == 1. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Serge Hallyn <serue@us.ibm.com> Cc: Cedric Le Goater <clg@fr.ibm.com> Cc: <lxc-devel@lists.sourceforge.net> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-27[MIPS] Replace BARRIER with more appropriate hazard barrier.Ralf Baechle
This is the unchanged part 2 of Chris' hazard cleanup. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] c-r4k: Convert init functions from inline to __init.Ralf Baechle
With more recent compilers inline doesn't necessarily means a function will always be inlined. So leave that decission to the compiler and make the function as __init. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Make PROT_WRITE imply PROT_READ.Ralf Baechle
2006-09-27[MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.Atsushi Nemoto
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged I-caches, but this does not work for flushing other task's icache. This is for example triggered by copy_to_user_page() called from ptrace(2). Use indexed flush for such cases. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Retire flush_icache_page from mm use.Ralf Baechle
On the 34K the redundant cache operations were causing excessive stalls resulting in realtime code running on the second VPE missing its deadline. For all other platforms this patch is just a significant performance improvment as illustrated by below benchmark numbers. Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 25Kf 2.6.18-rc4 533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K 25Kf 2.6.18-rc4-p 533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K 4Kc 2.6.18-rc4 80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K 4Kc 2.6.18-rc4-p 80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K 34Kc 2.6.18-rc4 40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K 34Kc 2.6.18-rc4-p 40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K BCM1480 2.6.18-rc4 700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K BCM1480 2.6.18-rc4-p 700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385 TX49-16K 2.6.18-rc3 197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K TX49-16K 2.6.18-rc3-p 197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K TX49-32K 2.6.18-rc3 396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K TX49-32K 2.6.18-rc3-p 396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K Original patch by me with enhancements by Atsushi Nemoto. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-09-27[MIPS] c-r4k: Typo fix.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-26[PATCH] reduce MAX_NR_ZONES: fix MAX_NR_ZONES array initializationsChristoph Lameter
Fix array initialization in lots of arches The number of zones may now be reduced from 4 to 2 for many arches. Fix the array initialization for the zones array for all architectures so that it is not initializing a fixed number of elements. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-13[MIPS] sparsemem: fix crash in show_memAtsushi Nemoto
With sparsemem, pfn should be checked by pfn_valid() before pfn_to_page(). Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] Print out TLB handler assembly for debugging.Thiemo Seufer
Small update, using pr_debug and pr_info. Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] vr41xx: Replace magic number for P4K bit with symbol.Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] vr41xx: Changed workaround to recommended methodYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] Do not count pages in holes with sparsememAtsushi Nemoto
With some memory model other than FLATMEM, the single node can contains some holes so there might be many invalid pages. For example, with two 256M memory and one 256M hole, some variables (num_physpage, totalpages, nr_kernel_pages, nr_all_pages, etc.) will indicate that there are 768MB on this system. This is not desired because, for example, alloc_large_system_hash() allocates too many entries. Use free_area_init_node() with counted zholes_size[] instead of free_area_init(). For num_physpages, use number of ram pages instead of max_low_pfn. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-07-13[MIPS] Use the proper technical term for naming some of the cache macros.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-29[MIPS] 74K: Assume it will also have an AR bit in config7Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29[MIPS] Treat CPUs with AR bit as physically indexed.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-06-29[MIPS] MIPS32/MIPS64 S-cache fix and cleanupAtsushi Nemoto
Use blast_scache_range, blast_inv_scache_range for mips32/mips64 scache routine. Also initialize waybit for MIPS32/MIPS64 S-cache. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>