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2007-10-29[MIPS] tb0219: Update copyright message.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] MT: Fix bug in multithreaded kernels.Ralf Baechle
When GDB writes a breakpoint into address area of inferior process the kernel needs to invalidate the modified memory in the inferior which is done by calling flush_cache_page which in turns calls r4k_flush_cache_page and local_r4k_flush_cache_page for VSMP or SMTC kernel via r4k_on_each_cpu(). As the VSMP and SMTC SMP kernels for 34K are running on a single shared caches it is possible to get away without interprocessor function calls. This optimization is implemented in r4k_on_each_cpu, so local_r4k_flush_cache_page is only ever called on the local CPU. This is where the following code in local_r4k_flush_cache_page() strikes: /* * If ownes no valid ASID yet, cannot possibly have gotten * this page into the cache. */ if (cpu_context(smp_processor_id(), mm) == 0) return; On VSMP and SMTC had a function of cpu_context() for each CPU(TC). So in case another CPU than the CPU executing local_r4k_cache_flush_page has not accessed the mm but one of the other CPUs has there may be data to be flushed in the cache yet local_r4k_cache_flush_page will falsely return leaving the I-cache inconsistent for the breakpoint. While the issue was discovered with GDB it also exists in local_r4k_flush_cache_range() and local_r4k_flush_cache(). Fixed by introducing a new function has_valid_asid which on MT kernels returns true if a mm is active on any processor in the system. This is relativly expensive since for memory acccesses in that loop cache misses have to be assumed but it seems the most viable solution for 2.6.23 and older -stable kernels. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Remove CONFIG_TS_AU1X00_ADS7846 from defconfigs.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29Author: Ralf Baechle <ralf@linux-mips.org>Ralf Baechle
[MIPS] MSP71xx: Fix bitrot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] sb1250: Enable GenBus IDE in defconfig.Maciej W. Rozycki
Enable the onboard GenBus IDE interface in the default configuration. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] vmlinux.ld.S: correctly indent .data sectionFranck Bui-Huu
Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] c-r3k: Implement flush_cache_range()Maciej W. Rozycki
Contrary to the belief of some, the R3000 and related processors did have caches, both a data and an instruction cache. Here is an implementation of r3k_flush_cache_page(), which is the processor-specific back-end for flush_cache_range(), done according to the spec in Documentation/cachetlb.txt. While at it, remove an unused local function: get_phys_page(), do some trivial formatting fixes and modernise debugging facilities. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Store sign-extend register values for PTRACE_GETREGSAtsushi Nemoto
A comment on ptrace_getregs() states "Registers are sign extended to fill the available space." but it is not true. Fix code to match the comment. Also fix casts on each caller to get rid of some warnings. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Register platform devicesFlorian Fainelli
This patch separates the platform devices registration for the MTX-1 specific devices: GPIO leds and watchdog. [Minor fixup and formatting change -- Ralf] Signed-off-by: Florian Fainelli <florian.fainelli@telecomint.eu> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Add len and addr validation for MAP_FIXED mappings.David Daney
Mmap with MAP_FIXED was not validating the addr and len parameters. This leads to the failure of GCC's gcc.c-torture/execute/loop-2[fg].c testcases when using the o32 ABI on a 64 bit kernel. These testcases try to mmap 65536 bytes at 0x7fff8000 and then access all the memory. In 2.6.18 and 2.6.23.1 (and likely other versions as well) the kernel maps the requested memory, but since half of it is above 0x80000000 a SIGBUS is generated when it is accessed. This patch moves the len validation above the MAP_FIXED processing so that it is always validated. It also adds validation to the addr parameter for MAP_FIXED mappings. Signed-off-by: David Daney <ddaney@avtrex.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IRIX: Fix off-by-one error in signal compat code.Ralf Baechle
Based on original patch by Roel Kluin <12o3l@tiscali.nl>. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Replace plat_timer_setup with modern APIs.Ralf Baechle
plat_timer_setup is no longer getting called. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Fix cut'n'paste bug in Sibyte clockevent driver.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Make c0_compare_int_usable fasterAtsushi Nemoto
Try increasingly longer time periods starting of at 0x10 cycles. This should be fast on hardware and work nicely with emulators. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Fix cevt-r4k.c for 64-bit kernelAtsushi Nemoto
The expression "(long)(read_c0_count() - cnt)" can never be a negative value on 64-bit kernel. Cast to "int" before comparison. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Sibyte: Delete {sb1250,bcm1480}_steal_irq().Ralf Baechle
They break the timer interrupt initialization and only seem to be a kludge for initialization happening in the wrong order. Further testing done by Thiemo confirms the suspicion that the other invocations also seem to have useless. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] txx9tmr clockevent/clocksource driverAtsushi Nemoto
Convert jmr3927_clock_event_device to more generic txx9tmr_clock_event_device which supports one-shot mode. The txx9tmr_clock_event_device can be used for TX49 too if the cp0 timer interrupt was not available. Convert jmr3927_hpt_read to txx9_clocksource driver which does not depends jiffies anymore. The txx9_clocksource itself can be used for TX49, but normally TX49 uses higher precision clocksource_mips. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Add mips_hpt_frequency check to mips_clockevent_init().Yoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IP32: Fixes after interrupt renumbering.Ralf Baechle
And general untangling. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] IP27: Fix slice logic to work for arbitrary number of slices.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] SNI: Convert a20r timer to clockevent device.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Merge eXcite plat_timer_setup into plat_time_init.Ralf Baechle
Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how to handle the alternate timer interrupt of the RM9000. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Merge lasat plat_timer_setup into plat_time_init.Ralf Baechle
Since the cp0 compare interrupt handler isn't initialized by the time plat_time_init is called don't set IE_IRQ5 anymore, cevt-r4k.c will do that a little later itself. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Remove wrppmc's definition of plat_timer_setup.Ralf Baechle
The only thing it used to do is now done by cevt-r4k.c. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Cause platform definitions of plat_timer_setup to cause error.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Convert from plat_timer_setup to plat_time_init.Ralf Baechle
The old plat_timer_setup hook is no longer getting called so the Alchemy time initialization was getting skipped. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] vpe: Use p_paddr instead of p_vaddr loader.Ralf Baechle
This subtle difference makes ELF overlays work. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Cleanup random difference between the lmo and kernel.org tree.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: set clock before clockevent_delta2ns() in GT641xx.Yoichi Yuasa
clockevent_delta2ns() use the shift and mult value, so clockevent_set_clock() should be called first. Pointed out by Atsushi Nemoto. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] time: Use non-interrupt locks in GT641xx clockevent driverYoichi Yuasa
set_next_event() and set_mode() are always called with interrupt disabled. irqsave and irqrestore are not necessary for spinlock. Pointed out by Atsushi Nemoto. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: micro-optimizatize time code.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] Alchemy: Nuke homebrew setup_irq(), it's broken and unnecessary.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-29[MIPS] SMTC: Allow control over TC assignment to vpe0.Kevin D. Kissell
Modify the SMTC initialization code to allow boot-time specification not only of how many VPEs and TCs to use, but also how many TCs out of the allowed pool are to be bound to VPE 0. The new boot option is "vpe0tcs=N", where N is an integer. Using it in combination with the existing options allows arbitrary assignments across the 2 VPEs of a 34K. e.g. "maxtcs=3 vpe0tcs=1" forces VPE0 to have 1 TC, while VPE1 has 2, and "maxtcs=4 vpe0tcs=3" forces VPE0 to have 3 TCs, while VPE1 gets 1. If no vpe0tcs option is specified, the traditional algorithm of evenly dividing TCs between available VPEs, with the odd "slop" going to VPE0, is retained. The reason for doing this is to allow a finer balancing of TCs which can handle I/O interrupts on Malta (those on VPE 0) and those which cannot. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-23mips: sg_page() falloutJens Axboe
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2007-10-22Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] time: Make c0_compare_int_usable more bullet proof [MIPS] Kbuild: Use the new cc-cross-prefix feature. [MIPS] Fix include wrapper symbol to something sane. [MIPS] Malta: Delete dead code. [MIPS] time: Add GT641xx timer0 clockevent driver [MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code. [MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code. [MIPS] time: Fix calculation in clockevent_set_clock()
2007-10-22[MIPS] time: Make c0_compare_int_usable more bullet proofAtsushi Nemoto
Use write_c0_compare(read_c0_count()) to clear interrupt. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] Kbuild: Use the new cc-cross-prefix feature.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] Malta: Delete dead code.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] time: Add GT641xx timer0 clockevent driverYoichi Yuasa
And make use of it for Cobalt. A few others such as the Malta could make use of it as well. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] time: SMP-proofing of Sibyte clockevent/clocksource code.Ralf Baechle
The BCM148 has 4 cores but there are also just 4 generic timers available so use the ZBbus cycle counter instead of it. In addition the ZBbus counter also offers a much higher resolution and 64-bit counting so I'm considering a later complete conversion to it once I figure out if all members of the Sibyte SOC family support it - the docs seem to agree but the headers files seem to disagree ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] time: SMP/NUMA-proofing of IP27 HUB RT timer code.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22[MIPS] time: Fix calculation in clockevent_set_clock()Atsushi Nemoto
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-10-22Update arch/ to use sg helpersJens Axboe
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
2007-10-20typo fixesMatt LaPlante
Most of these fixes were already submitted for old kernel versions, and were approved, but for some reason they never made it into the releases. Because this is a consolidation of a couple old missed patches, it touches both Kconfigs and documentation texts. Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-19Fix misspellings of "system", "controller", "interrupt" and "necessary".Robert P. J. Day
Fix the various misspellings of "system", controller", "interrupt" and "[un]necessary". Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
2007-10-19Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: [MIPS] Delete totally outdated Documentation/mips/time.README [MIPS] Kill duplicated setup_irq() for cp0 timer [MIPS] Sibyte: Finish conversion to modern time APIs. [MIPS] time: Helpers to compute clocksource/event shift and mult values. [MIPS] SMTC: Build fix. [MIPS] time: Delete dead code. [MIPS] MIPSsim: Strip defconfig file to the bones.
2007-10-19Combine instrumentation menus in kernel/Kconfig.instrumentationMathieu Desnoyers
Quoting Randy: "It seems sad that this patch sources Kconfig.marker, a 7-line file, 20-something times. Yes, you (we) don't want to put those 7 lines into 20-something different files, so sourcing is the right thing. However, what you did for avr32 seems more on the right track to me: make _one_ Instrumentation support menu that includes PROFILING, OPROFILE, KPROBES, and MARKERS and then use (source) that in all of the arches." Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Acked-by: Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19Use helpers to obtain task pid in printks (arch code)Alexey Dobriyan
One of the easiest things to isolate is the pid printed in kernel log. There was a patch, that made this for arch-independent code, this one makes so for arch/xxx files. It took some time to cross-compile it, but hopefully these are all the printks in arch code. Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org> Signed-off-by: Pavel Emelyanov <xemul@openvz.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19remove asm/bitops.h includesJiri Slaby
remove asm/bitops.h includes including asm/bitops directly may cause compile errors. don't include it and include linux/bitops instead. next patch will deny including asm header directly. Cc: Adrian Bunk <bunk@kernel.org> Signed-off-by: Jiri Slaby <jirislaby@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-10-19pid namespaces: define is_global_init() and is_container_init()Serge E. Hallyn
is_init() is an ambiguous name for the pid==1 check. Split it into is_global_init() and is_container_init(). A cgroup init has it's tsk->pid == 1. A global init also has it's tsk->pid == 1 and it's active pid namespace is the init_pid_ns. But rather than check the active pid namespace, compare the task structure with 'init_pid_ns.child_reaper', which is initialized during boot to the /sbin/init process and never changes. Changelog: 2.6.22-rc4-mm2-pidns1: - Use 'init_pid_ns.child_reaper' to determine if a given task is the global init (/sbin/init) process. This would improve performance and remove dependence on the task_pid(). 2.6.21-mm2-pidns2: - [Sukadev Bhattiprolu] Changed is_container_init() calls in {powerpc, ppc,avr32}/traps.c for the _exception() call to is_global_init(). This way, we kill only the cgroup if the cgroup's init has a bug rather than force a kernel panic. [akpm@linux-foundation.org: fix comment] [sukadev@us.ibm.com: Use is_global_init() in arch/m32r/mm/fault.c] [bunk@stusta.de: kernel/pid.c: remove unused exports] [sukadev@us.ibm.com: Fix capability.c to work with threaded init] Signed-off-by: Serge E. Hallyn <serue@us.ibm.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com> Acked-by: Pavel Emelianov <xemul@openvz.org> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Cedric Le Goater <clg@fr.ibm.com> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Herbert Poetzel <herbert@13thfloor.at> Cc: Kirill Korotaev <dev@sw.ru> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>