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path: root/arch/powerpc/platforms/pasemi/pci.c
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2007-09-14[POWERPC] pasemi: Add workaround for erratum 5945Olof Johansson
Erratum 5945 causes some of the registers on the PCIe root ports to not read correctly. Do a small dance to avoid this: Write an unused register, read the value and write it back. Thankfully this is not in a hot code path. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-09-14[POWERPC] pasemi: Add pasemi_pci_getcfgaddr()Olof Johansson
Add pasemi_pci_getcfgaddr(), to get the remapped address of a specific config register for a PCI device. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17[POWERPC] Remove gratuitous reads from pasemi pci config space methodsNathan Lynch
The pasemi pci configuration space write method reads the written location immediately after the write is performed, presumably in order to flush the write. However, configuration space writes are not allowed to be posted, making these reads gratuitous. Furthermore, this behavior potentially causes us to violate the PCI PM spec when changing between e.g. D0 and D3 states, because a delay of up to 10ms may be required before the OS accesses configuration space after the write which initiates the transition. Remove the unnecessary reads from pa_pxp_write_config. Signed-off-by: Nathan Lynch <ntl@pobox.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-17[POWERPC] pa_pxp_ops: Use named structure member initializersNathan Lynch
Signed-off-by: Nathan Lynch <ntl@pobox.com> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-06-29[POWERPC] rename add_bridge to avoid namespace clashesArnd Bergmann
Many platforms currently define their own add_bridge function, some of them globally. This breaks some multiplatform configurations. Prefixing each of these functions with the platform name avoids this problem. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2007-06-14[POWERPC] Rewrite IO allocation & mapping on powerpc64Benjamin Herrenschmidt
This rewrites pretty much from scratch the handling of MMIO and PIO space allocations on powerpc64. The main goals are: - Get rid of imalloc and use more common code where possible - Simplify the current mess so that PIO space is allocated and mapped in a single place for PCI bridges - Handle allocation constraints of PIO for all bridges including hot plugged ones within the 2GB space reserved for IO ports, so that devices on hotplugged busses will now work with drivers that assume IO ports fit in an int. - Cleanup and separate tracking of the ISA space in the reserved low 64K of IO space. No ISA -> Nothing mapped there. I booted a cell blade with IDE on PIO and MMIO and a dual G5 so far, that's it :-) With this patch, all allocations are done using the code in mm/vmalloc.c, though we use the low level __get_vm_area with explicit start/stop constraints in order to manage separate areas for vmalloc/vmap, ioremap, and PCI IOs. This greatly simplifies a lot of things, as you can see in the diffstat of that patch :-) A new pair of functions pcibios_map/unmap_io_space() now replace all of the previous code that used to manipulate PCI IOs space. The allocation is done at mapping time, which is now called from scan_phb's, just before the devices are probed (instead of after, which is by itself a bug fix). The only other caller is the PCI hotplug code for hot adding PCI-PCI bridges (slots). imalloc is gone, as is the "sub-allocation" thing, but I do beleive that hotplug should still work in the sense that the space allocation is always done by the PHB, but if you unmap a child bus of this PHB (which seems to be possible), then the code should properly tear down all the HPTE mappings for that area of the PHB allocated IO space. I now always reserve the first 64K of IO space for the bridge with the ISA bus on it. I have moved the code for tracking ISA in a separate file which should also make it smarter if we ever are capable of hot unplugging or re-plugging an ISA bridge. This should have a side effect on platforms like powermac where VGA IOs will no longer work. This is done on purpose though as they would have worked semi-randomly before. The idea at this point is to isolate drivers that might need to access those and fix them by providing a proper function to obtain an offset to the legacy IOs of a given bus. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-08pasemi_mac: Move the IRQ mapping from the PCI layer to the driverOlof Johansson
Fixes for ethernet IRQ mapping, to be done in the driver instead of in the platform setup code. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-24[POWERPC] pasemi: Allow 8KB config space for I/O bridgeOlof Johansson
Device 0 function 0 on the root bus is really a two-function bus agent, but only the first function is visible. Because of this, we need to allow config accesses into the second range. Modify the check for valid offsets accordingly. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-02-07[POWERPC] pasemi: Configure DMA controller interruptsOlof Johansson
The DMA controller on PWRficient is somewhat special -- has a PCI header so it looks like it's on the root PCI (-Express) root bus, but it uses more than the default number of interrupts (and they are hardwired). We need to wire up all interrupts for the DMA controller. The generic IRQ code will only map the primary interrupt from the PCI header (128), so add 129->211 by hand. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Make pci_read_irq_line the defaultBenjamin Herrenschmidt
This patch reworks the way IRQs are fixed up on PCI for arch powerpc. It makes pci_read_irq_line() called by default in the PCI code for devices that are probed, and add an optional per-device fixup in ppc_md for platforms that really need to correct what they obtain from pci_read_irq_line(). It also removes ppc_md.irq_bus_setup which was only used by pSeries and should not be needed anymore. I've also removed the pSeries s7a workaround as it can't work with the current interrupt code anyway. I'm trying to get one of these machines working so I can test a proper fix for that problem. I also haven't updated the old-style fixup code from 85xx_cds.c because it's actually buggy :) It assigns pci_dev->irq hard coded numbers which is no good with the new IRQ mapping code. It should at least use irq_create_mapping(NULL, hard_coded_number); and possibly also set_irq_type() to set them as level low. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-10-09[PATCH] trivial iomem annotations (arch/powerpc/platfroms/parsemi/pci.c)Al Viro
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-13[POWERPC] powerpc: PA Semi PWRficient platform supportOlof Johansson
Base patch for PA6T and PA6T-1682M. This introduces the arch/powerpc/platform/pasemi directory, together with basic implementations for various setup. Much of this was based on other platform code, i.e. Maple, etc. Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Paul Mackerras <paulus@samba.org>