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2007-12-23[POWERPC] 4xx: rework UIC cascade irq handlingValentine Barshak
This is a UIC cascade handler rework to use set_irq_chained_handler() for cascade, just like othe ppc platforms do. With current implementation we have additional redirection for irq handler and we call generic_handle_irq twice (once for the primary uic and the other time for handling cascade interrupt). This causes Ingo's realtime support patch to stop working on 4xx. Not sure of any other possible problems though, but with set_irq_chained_handler() we can abolish "struct irqaction cascade" from the chip descriptor and call generic_handle_irq() once, directly for cascade irq. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: make UIC use generic level irq handlerValentine Barshak
This patch makes PowerPC 4xx UIC use generic level irq handler instead of a custom handle_uic_irq() function. We ack only edge irqs in mask_ack callback, since acking a level irq on UIC has no effect if the interrupt is still asserted by the device, even if the interrupt is already masked. So, to really de-assert the interrupt we need to de-assert the external source first *and* ack it on UIC then. The handle_level_irq() function masks and ack's the interrupt with mask_ack callback prior to calling the actual ISR and unmasks it at the end. So, to use it with UIC interrupts we need to ack level irqs in the unmask callback instead, after the ISR has de-asserted the external interrupt source. Even if we ack the interrupt that we didn't handle (unmask/ack it at the end of the handler, while next irq is already pending) it will not de-assert the irq, untill we de-assert its exteral source. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: 440GRx Rainier default configValentine Barshak
PowerPC 440GRx Rainier default config. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: 440GRx Rainier board support.Valentine Barshak
PowerPC 440GRx Rainier board support. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: 440GRx Rainier DTS.Valentine Barshak
PowerPC 440GRx Rainier DTS. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: 440GRx Rainier bootwrapper.Valentine Barshak
Bootwrapper code for PowerPC 440GRx Rainier board. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: 440EPx Sequoia USB OHCI DTS entryValentine Barshak
Add the 440EPx Sequoia USB OHCI device tree entry. Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Add 440SPe revA runtime detection to PCIeStefan Roese
This patch adds runtime detection of the 440SPe revision A chips. These chips are equipped with a slighly different PCIe core and need special/ different initialization. The compatible node is changed to "plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that can be equipped with both PPC revisions like the AMCC Yucca. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] pci32: 4xx embedded platforms want to reassign all PCI resourcesBenjamin Herrenschmidt
This makes 4xx embedded platforms re-assign all PCI resources as we pretty much never care about what the various firmwares have done on these, it's generally not compatible with the way the kernel will map the bridges. We still need to also enable bus renumbering on some of them, but I will do that from a separate patch after I've fixed 4xx PCIe to handle all bus numbers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: PCI-E Link setup improvementsBenjamin Herrenschmidt
This improves the way the 4xx PCI-E code handles checking for a link and adds explicit testing of CRS result codes on config space accesses. This should make it more reliable. Also, bridges with no link are now still created, though config space accesses beyond the root complex are filtered. This is one step toward eventually supporting hotplug. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: remove bogus "ranges" property in Bamboo EBC nodeBenjamin Herrenschmidt
This removes a bogus empty "ranges" property in the EBC device node of the Bamboo board device-tree. The "ranges" property should be created by the wrapper code when it is implemented. Until then, remove the empty property since it incorrectly implies that there is a 1:1 address mapping between the EBC and the OPB. This also fixes a warning from newer DTCs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Base support for 440SPe "Katmai" eval boardBenjamin Herrenschmidt
This adds base support for the Katmai board, including PCI-X and PCI-Express (but no RTC, nvram, etc... yet). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Rework clock probing in boot wrapperBenjamin Herrenschmidt
This reworks the boot wrapper library function that probes the chip clocks. Better separate the base function that is used on 440GX,SPe,EP,... from the uart fixups as those need different device-tree path on different processors. Also, rework the function itself based on the arch/ppc code from Eugene Surovegin which I find more readable, and which handles one more bypass case. Also handle the subtle difference between 440EP/EPx and 440SPe/GX, on the former, PerClk is derived from the PLB clock while on the later, it's derived from the OPB. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Add CPR0 accessors to boot wrapperBenjamin Herrenschmidt
This adds macros to the boot wrapper to access the CPR registers from the boot wrappers. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Add mfspr/mtspr inline macros to 4xx bootwrapperBenjamin Herrenschmidt
The 4xx bootwrapper occasionally needs to access SPR registers, this adds mfspr/mtspr wrappers to it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Adds decoding of 440SPE memory size to boot wrapper libraryBenjamin Herrenschmidt
This adds a function to the bootwrapper 4xx library to decode memory size on 440SPE processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Wire up 440EP USB controller support to Bamboo boardBenjamin Herrenschmidt
This adds the definition of the on-chip OHCI controller to the Bamboo board's device-tree. This is enough to get it probed and working, though a separate patch fixing a bug in the OHCI driver is needed to make it reliable. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Wire up PCI on Bamboo boardBenjamin Herrenschmidt
This adds the device-tree bits & call to ppc4xx_pci_find_bridges() to make PCI work on the Bamboo board Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Base support for 440GX Taishan eval boardHugh Blemings
This patch adds base support for the AMCC Taishan 440GX evaluation board. Signed-off-by: Hugh Blemings <hugh@blemings.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Add PCI to Walnut platformBenjamin Herrenschmidt
This wires up the 4xx PCI support & device-tree bits for the 405GP based Walnut platform. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: EP405 boards support for arch/powerpcBenjamin Herrenschmidt
Brings EP405 support to arch/powerpc. The IRQ routing for the CPLD comes from a device-tree property, PCI is working to the point where I can see the video card, USB device, and south bridge. This should work with both EP405 and EP405PC. I've not totally figured out how IRQs are wired on this hardware though, thus at this stage, expect only USB interrupts working, pretty much the same as what arch/ppc did. Also, the flash, nvram, rtc and temp control still have to be wired. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: Add early udbg support for 40x processorsBenjamin Herrenschmidt
This adds some basic real mode based early udbg support for 40x in order to debug things more easily Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: PCI support for Ebony boardBenjamin Herrenschmidt
This wires up the 4xx PCI support & device tree bits for 440GP based Ebony platform. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: PLB to PCI Express supportBenjamin Herrenschmidt
This adds to the previous 2 patches the support for the 4xx PCI Express cells as found in the 440SPe revA, revB and 405EX. Unfortunately, due to significant differences between these, and other interesting "features" of those pieces of HW, the code isn't as simple as it is for PCI and PCI-X and some of the functions differ significantly between the 3 implementations. Thus, not only this code can only support those 3 implementations for now and will refuse to operate on any other, but there are added ifdef's to avoid the bloat of building a fairly large amount of code on platforms that don't need it. Also, this code currently only supports fully initializing root complex nodes, not endpoint. Some more code will have to be lifted from the arch/ppc implementation to add the endpoint support, though it's mostly differences in memory mapping, and the question on how to represent endpoint mode PCI in the device-tree is thus open. Many thanks to Stefan Roese for testing & fixing up the 405EX bits ! Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: PLB to PCI 2.x supportBenjamin Herrenschmidt
This adds to the previous patch the support for the 4xx PCI 2.x bridges. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] 4xx: PLB to PCI-X supportBenjamin Herrenschmidt
This adds base support code for the 4xx PCI-X bridge. It also provides placeholders for the PCI and PCI-E version but they aren't supported with this patch. The bridges are configured based on device-tree properties. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23[POWERPC] Reworking machine check handling and Fix 440/440ABenjamin Herrenschmidt
This adds a cputable function pointer for the CPU-side machine check handling. The semantic is still the same as the old one, the one in ppc_md. overrides the one in cputable, though ultimately we'll want to change that so the CPU gets first. This removes CONFIG_440A which was a problem for multiplatform kernels and instead fixes up the IVOR at runtime from a setup_cpu function. The "A" version of the machine check also tweaks the regs->trap value to differenciate the 2 versions at the C level. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-21Merge branch 'linux-2.6'Paul Mackerras
2007-12-21[POWERPC] Make non-PCI build work againStephen Rothwell
Maple and pasemi both require PCI as does CONFIG_OF_PLATFORM_PCI. The default setting of CONFIG_ISA_DMA_API is set to match the protection around the relevant routines in asm/dma.h. I also had to remove the PMAC platform from the combined build. The precis is that to build a 64 bit kernel with no PCI, you can only include pSeries and iSeries. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Constify the of_device_id passed to of_platform_bus_probeStephen Rothwell
This will allow us to declare const all the statically declared arrrays of these. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] The builtin matches for ibmebus.c can be __initdataStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Add EHEA and EHCA as modules in the ppc64_defconfigStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Fix possible NULL deref in ppc32 PCIBenjamin Herrenschmidt
The 32-bit PCI code tests if "bus" is non-NULL after calling pci_scan_bus_parented() in one place but not another before dereferencing it. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] Implement arch disable/enable irq hooks.Scott Wood
These hooks ensure that a decrementer interrupt is not pending when suspending; otherwise, problems may occur on 6xx/7xx/7xxx-based systems (except for powermacs, which use a separate suspend path). For example, with deep sleep on the 831x, a pending decrementer will cause a system freeze because the SoC thinks the decrementer interrupt would have woken the system, but the core must have interrupts disabled due to the setup required for deep sleep. Changed via-pmu.c to use the new ppc_md hooks, and made the arch_* functions call the generic_* functions unconditionally. -- paulus Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: Don't leak kernel stack through an empty {i,m}box_info readJeremy Kerr
Based on an original patch from Arnd Bergmann <arnd.bergmann@de.ibm.com> If there's no entry in the mailbox, then a read on the _info file will return data from an uninitialised variable. This change returns EOF if there's no mailbox info available instead. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: DMA Restart after SIGSEGVAndre Detsch
This fixes the behavior of spufs when a spu tries a DMA operation based on a wrong / unavailable address. Instead of just generating a SIGBUS signal, spufs now generates a SIGSEGV signal and restarts the problematic DMA operation after the execution of the application's signal handler. This allows applications to employ user-level paging systems. Although the restart_dma function is called before the application's signal handler, the operation is not actually performed at this time, since the spu context is already stopped. The operation only takes place when spu_run is restarted (which happens automatically). Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: Use separate timer for /proc/spu_loadavg calculationAegis Lin
The original spusched_timer was designed to take effect only when a context is waiting in the runqueue. This change adds an additional lower-freq timer has been added to purely handle the spu_load updates. The new timer will be triggered per LOAD_FREQ ticks. Signed-off-by: Aegis Lin <aegislin@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: make state_mutex interruptibleChristoph Hellwig
Make most places that use spu_acquire/spu_acquire_saved interruptible, this allows getting out of the spufs code when e.g. pressing ctrl+c. There are a few places where we get called e.g. from spufs teardown routines were we can't simply err out so these are left with a comment. For now I've also not touched the poll routines because it's open what libspe would expect in terms of interrupted system calls. Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: add enchanced simple attr macrosChristoph Hellwig
The simple attr macros currently used by spufs can't deal with the handlers returning errors, which is required to make the state_mutex interruptible. This adds a local copy that allows for an error return from the get/set handlers. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: decouple spu scheduler from spufs_spu_run (asynchronous ↵Luke Browning
scheduling) Change spufs_spu_run so that the context is queued directly to the scheduler and the controlling thread advances directly to spufs_wait() for spe errors and exceptions. nosched contexts are treated the same as before. Fixes from Christoph Hellwig <hch@lst.de> Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: don't set reserved bits in spu interrupt statusMasato Noguchi
This changes the spu context switch code to not write to reserved bits of spu interrupt status register. The architecture book says the reserved fields should be set to zero. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: spu_find_victim may choose wrong victimLuke Browning
Need to re-check priority after dropping lock. Otherwise, a more favored context may be preempted. Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: reorganize spu_run_initLuke Browning
This cleans up spu_run_init so that it does all of the spu initialization for spufs_run_spu. It initializes the spu context as much as possible before it activates the spu and writes the runcntl register. Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: rework class 0 and 1 interrupt handlingJeremy Kerr
Based on original patches from Arnd Bergmann <arnd.bergman@de.ibm.com>; and Luke Browning <lukebr@linux.vnet.ibm.com> Currently, spu contexts need to be loaded to the SPU in order to take class 0 and class 1 exceptions. This change makes the actual interrupt-handlers much simpler (ie, set the exception information in the context save area), and defers the handling code to the spufs_handle_class[01] functions, called from spufs_run_spu. This should improve the concurrency of the spu scheduling leading to greater SPU utilization when SPUs are overcommited. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: use #defines for SPU class [012] exception statusJeremy Kerr
Add a few #defines for the class 0, 1 and 2 interrupt status bits, and use them instead of magic numbers when we're setting or checking for these interrupts. Also, add a #define for the class 2 mailbox threshold interrupt mask. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: fix incorrect interrupt status clearing in backing mbox ↵Jeremy Kerr
stat poll When doing a poll on the mbox stat file of a swapped-out context, we clear the class 0 interrupt status, rather than the class 2 interrupt status. This change corrects the poll operation to clear the correct interrupt. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: add backing ops for privcntl registerLuke Browning
This change encapsulates the spu_privcntl_RW register so that it can be written through backing ops. This is necessary so that spu contexts can be initialized and queued to the scheduler in spufs_run_spu. Signed-off-by: Luke Browning <lukebr@linux.vnet.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: block fault handlers in spu_acquire_runnableArnd Bergmann
This change disables the logic that faults-in spu contexts under the covers from the page fault handler. When a fault requires a runnable context, the handler will block until the context is scheduled by other means. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: move fault, lscsa_alloc and switch code to spufs moduleJeremy Kerr
Currently, part of the spufs code (switch.o, lscsa_alloc.o and fault.o) is compiled directly into the kernel. This change moves these components of spufs into the kernel. The lscsa and switch objects are fairly straightforward to move in. For the fault.o module, we split the fault-handling code into two parts: a/p/p/c/spu_fault.c and a/p/p/c/spufs/fault.c. The former is for the in-kernel spu_handle_mm_fault function, and we move the rest of the fault-handling code into spufs. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-12-21[POWERPC] spufs: fix typos in sched.c commentsJulio M. Merino Vidal
Fix a few typos in the spufs scheduler comments Signed-off-by: Julio M. Merino Vidal <jmerino@ac.upc.edu> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Paul Mackerras <paulus@samba.org>