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2007-07-24Merge branch 'for_paulus' of ↵Linus Torvalds
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc * 'for_paulus' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc: (25 commits) [POWERPC] 85xx: Added needed MPC85xx PCI device IDs [POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDs [POWERPC] 85xxCDS: MPC8548 DTS cleanup. [POWERPC] 85xxCDS: Misc 8548 PCI Corrections. [POWERPC] 85xxCDS: Delay 8259 cascade hookup. [POWERPC] 85xxCDS: Make sure restart resets the PCI bus. [POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line. [POWERPC] FSL: Add support for PCI-X controllers [POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHB [POWERPC] Provide ability to setup P2P bridge registers from struct resource [POWERPC] Add basic PCI/PCI Express support for 8544DS board [POWERPC] Make endianess of cfg_addr for indirect pci ops runtime [POWERPC] Removed setup_indirect_pci_nomap [POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDS [POWERPC] 85xx: Added 8568 PCIe support [POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connected [POWERPC] Add basic PCI node for mpc8568mds board [POWERPC] Use Freescale pci/pcie common code for 85xx boards [POWERPC] Update PCI nodes in the 83xx/85xx boards device tree [POWERPC] Add 8548 CDS PCI express controller node and PCI-X device node ...
2007-07-24spusched: fix mismerge in spufs.hChristoph Hellwig
spufs.h now has two enums for the sched_flags leading to identical values for SPU_SCHED_WAS_ACTIVE and SPU_SCHED_NOTIFY_ACTIVE. Merge them into a single enum as they were in the IBM development tree. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-24[POWERPC] 85xx: Added needed MPC85xx PCI device IDsKumar Gala
Added the MPC85xx PCI device IDs that we need for the quirks we have. Also, fixed the MPC8567E, MPC8567 device IDs which had the wrong value. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24[POWERPC] Add Freescale PCI VENDOR ID and 8641 device IDsJon Loeliger
Also add 8641/8641D device IDs as well. All of which already exist or have been submitted to The Linux PCI ID Repository at: http://pci-ids.ucw.cz/ CC-to: pci-ids@ucw.cz Signed-off-by: Jon Loeliger <jdl@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24[POWERPC] 85xxCDS: MPC8548 DTS cleanup.Randy Vinson
Added the P2P bridge present on the Arcadia base board and moved the VIA Southbridge behind the bridge to reflect its actual position in the bus organization. Added the RTC that's in the VIA Southbridge and expanded the ranges array for the SOC node to allow proper address translation of the RTC registers. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24[POWERPC] 85xxCDS: Misc 8548 PCI Corrections.Randy Vinson
Setting the host bridge @8000 as primary. Also fixing a bug in setting the USB interrupt numbers. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-24[POWERPC] 85xxCDS: Delay 8259 cascade hookup.Randy Vinson
The interrupts of an E100 card inserted in PCI slot 4 may be on at bootup. The resulting interrupt flood interacts with the 8259 cascade handler and prevents proper boot up. There is a quirk for the E100 that will disable the E100's interrupts but to use it, the 8259 cascade hookup must be delayed until after the quirk has run. This patch delays the 8259 cascade hookup by registering a device_initcall() which runs after the PCI quirk for the E100. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] 85xxCDS: Make sure restart resets the PCI bus.Randy Vinson
The current 85xxCDS restart code fails to reset the PCI bus which can lead to odd behavior after the restart. This patch uses the VIA Super Southbridge to perform a PCI reset which will reset the entire system. NOTE: Since the VIA chip is behind a PCI-to-PCI bridge which can be disabled with a switch setting, it may not be possible to perform the PCI bus reset. In this case, the code defaults to the previous restart mechanism. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] 85xxCDS: Allow 8259 cascade to share an MPIC interrupt line.Randy Vinson
The Freescale MPC8555CDS and MPC8548CDS reference hardware has a legacy 8259 interrupt controller pair contained within a VIA VT82C686B Southbridge on the main carrier board. The processor complex plugs into the carrier card using a PCI slot which limits the available interrupts to the INTA-INTD PCI interrupts. The output of the 8259 cascade pair is routed through a gate array and connected to the PCI INTA interrupt line. The normal interrupt chaining hook (set_irq_chained_handler) does not allow sharing of the chained interrupt which prevents the use of PCI INTA by PCI devices. This patch allows the 8259 cascade pair to share their interrupt line with PCI devices. NOTE: The addition of the .end routine for the MPIC is not strictly necessary for this patch. It's there so this code will run from within the threaded interrupt context used by the Real Time patch. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] FSL: Add support for PCI-X controllersKumar Gala
Some set of 85xx platforms have PCI-X controllers. The old arch/ppc code setup these controllers and we haven't moved it over to arch/powerpc. We use the PCI-X Capabilties to know if we are in PCI-X mode instead of the Global Utilities PORDEVSR. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Make sure virtual P2P bridge registers are setup on PCIe PHBKumar Gala
For the Freescale PCIe PHBs Not all firmwares setup the virtual P2P bridge registers properly. Make sure they get setup based on what the struct pci_controller got from the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Provide ability to setup P2P bridge registers from struct resourceKumar Gala
We need the ability to set P2P bridge registers to properly setup the virtual P2P bridges that exist in PCIe controllers for some of the embedded setups. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Add basic PCI/PCI Express support for 8544DS boardRoy Zang
Add basic support for the PCIe PHB and enable the ULI bridge. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Make endianess of cfg_addr for indirect pci ops runtimeKumar Gala
Make it so we do a runtime check to know if we need to write cfg_addr as big or little endian. This is needed if we want to allow 86xx support to co-exist in the same kernel as other 6xx PPCs. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Removed setup_indirect_pci_nomapKumar Gala
We don't use setup_indirect_pci_nomap in arch/powerpc and it appears the users that needed it from arch/ppc are now using setup_indirect_pci. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] 85xx: Add quirk to ignore bogus FPGA on CDSKumar Gala
The newer Arcadia boards for CDS have an FPGA that shows up on PCI however isn't a real PCI device. Add a quirk to just ignore the FPGA. This is based on the following patch from Andy & York: http://ozlabs.org/pipermail/linuxppc-dev/2007-February/032042.html Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] 85xx: Added 8568 PCIe supportKumar Gala
Added the PCIe device node to the 8568 dts and the needed quirk entries. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Fixup resources on pci_bus for PCIe PHB when no device is connectedKumar Gala
On the 85xx/86xx PCIe controllers if there is no device connected to the PHB we will still allocate a pci_bus for downstream bus of the virtual P2P bridge. However the resources allocated to the downstream bus are not correct and so we just mimic the resources from the upstream pci_bus. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Add basic PCI node for mpc8568mds boardRoy Zang
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Use Freescale pci/pcie common code for 85xx boardsRoy Zang
Switch the 85xx platform over to using the FSL generic PCI code. This gets ups PCIe support in addition to base PCI support. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Update PCI nodes in the 83xx/85xx boards device treeRoy Zang
Updated the 83xx & 85xx device tree PCI related compartible property. Used the following compatible properties: PCI "fsl,mpc8349-pci" PCI "fsl,mpc8540-pci" PCI-X: "fsl,mpc8540-pcix" PCIe: "fsl,mpc8548-pcie" Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Add 8548 CDS PCI express controller node and PCI-X device nodeRoy Zang
Add 8548 CDS PCI express controller node and PCI-X device node. The current dts file is suitable for 8548 Rev 2.0 board with Arcadia 3.1. This kind of board combination is the most popular. Used the following compatible properties: PCI "fsl,mpc8540-pci" PCI-X: "fsl,mpc8540-pcix" PCIe: "fsl,mpc8548-pcie" Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] FSL: Cleanup how we detect if we are a PCIe controllerKumar Gala
Use the PCI capabilities to determine if we are PCIe PHB. Also use PPC_INDIRECT_TYPE_NO_PCIE_LINK since the Freescale PCIe controllers will lock the system if they don't have link and you try to do a config access to anything but the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Added indirect quirk to handle PCIe PHB that have issue w/no linkKumar Gala
Added PPC_INDIRECT_TYPE_NO_PCIE_LINK flag to the indirect pci handling code to ensure that we don't talk to any device other than the PHB if we don't have PCIe link. Some controllers will lockup if they try to do a config cycle to any device on the bus except the PHB. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Add the ability to find PCI capabilities early onKumar Gala
Added early_find_capability that wraps pci_bus_find_capability and uses fake_pci_bus() to allow us to call it before we've fully setup the pci_controller. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Rewrite Freescale PCI/PCIe support for 8{3,5,6}xxZang Roy-r61911
Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and PCIe on 85xx/86xx. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-23[POWERPC] Create common fsl pci/e files based on 86xx platformsRoy Zang
Move arch/powerpc/platforms/86xx/pci.c -> arch/powerpc/sysdev/fsl_pci.c arch/powerpc/sysdev/fsl_pcie.h -> arch/powerpc/sysdev/fsl_pci.h as the base to unify 83xx/85xx/86xx pci and pcie. Add CONFIG_FSL_PCI to build fsl_pci.c for Freescale pci and pcie option. The code still works for 86xx platforms. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-22Merge branch 'merge' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Clean up duplicate includes in drivers/macintosh/ [POWERPC] Quiet section mismatch warning on pcibios_setup [POWERPC] init and exit markings for hvc_iseries [POWERPC] Quiet section mismatch in hvc_rtas.c [POWERPC] Constify of_platform_driver match_table [POWERPC] hvcs: Make some things static and const [POWERPC] Constify of_platform_driver name [POWERPC] MPIC protected sources [POWERPC] of_detach_node()'s device node argument cannot be const [POWERPC] Fix ARCH=ppc builds [POWERPC] mv64x60: Use mutex instead of semaphore [POWERPC] Allow smp_call_function_single() to current cpu [POWERPC] Allow exec faults on readable areas on classic 32-bit PowerPC [POWERPC] Fix future firmware feature fixups function failure [POWERPC] fix showing xmon help [POWERPC] Make xmon_write accept a const buffer [POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option. [POWERPC] cell: CONFIG_SPE_BASE is a typo
2007-07-22Fix ppc64 mismergeAl Viro
Fix a mismerge in commit 8b6f50ef1d5cc86b278eb42bc91630fad455fb10: "spufs: make signal-notification files readonly for NOSCHED contexts", where structs got duplicated. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Acked-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-22[POWERPC] Quiet section mismatch warning on pcibios_setupStephen Rothwell
WARNING: vmlinux.o(.text+0x1cefcc): Section mismatch: reference to .init.text:.pcibios_setup (between '.pci_setup' and '.pci_init') pci_setup() is marked __devinit and calls pcibios_setup. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] MPIC protected sourcesBenjamin Herrenschmidt
Some HW platforms, such as the new cell blades, requires some MPIC sources to be left alone by the operating system. This implements support for a "protected-sources" property in the mpic controller node containing a list of source numbers to be protected against operating system interference. For those interested in the gory details, the MPIC on the southbridge of those blades has some of the processor outputs routed to the cell, and at least one routed as a GPIO to the service processor. It will be used in the GA product for routing some of the southbridge error interrupts to the service processor which implements some of the RAS stuff, such as checkstopping when fatal errors occurs before they can propagate. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] of_detach_node()'s device node argument cannot be constSegher Boessenkool
...since it modifies it (when it sets the OF_DETACHED flag). Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] Allow smp_call_function_single() to current cpuAvi Kivity
This removes the requirement for callers to get_cpu() to check in simple cases. i386 and x86_64 already received a similar treatment. Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] Allow exec faults on readable areas on classic 32-bit PowerPCPaul Mackerras
Classic 32-bit PowerPC CPUs, and the early 64-bit PowerPC CPUs, don't provide a way to prevent execution from readable pages, that is, the MMU doesn't distinguish between data reads and instruction reads, although a different exception is taken for faults in data accesses and instruction accesses. Commit 9ba4ace39fdfe22268daca9f28c5df384ae462cf, in the course of fixing another bug, added a check that meant that a page fault due to an instruction access would fail if the vma did not have the VM_EXEC flag set. This gives an inconsistent enforcement on these CPUs of the no-execute status of the vma (since reading from the page is sufficient to allow subsequent execution from it), and causes old versions of ppc32 glibc (2.2 and earlier) to fail, since they rely on executing the word before the GOT but don't have it marked executable. This fixes the problem by allowing execution from readable (or writable) areas on CPUs which do not provide separate control over data and instruction reads. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Jon Loeliger <jdl@freescale.com>
2007-07-22[POWERPC] Fix future firmware feature fixups function failureMichael Neuling
Move firmware feature initialisation from pSeries_init_early to the earlier pSeries_probe_hypertas so they are initialised before firmware feature fixups are applied. Currently firmware feature sections are only used for iSeries which initialises the these features much earlier. This is a bug in waiting on pSeries. Also adds some whitespace fixups. Signed-off-by: Michael Neuling <mikey@neuling.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] fix showing xmon helpIshizaki Kou
In some configuration, xmon help string is larger than xmon_printf buffer. We need not to use printf. This patch adds xmon_puts and change to use it to show help string. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] Make xmon_write accept a const bufferIshizaki Kou
Because xmon_write doesn't change the buffer, we should add 'const' qualifier to the argument which points it. Signed-off-by: Kou Ishizaki <kou.ishizaki@toshiba.co.jp> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] Fix misspelled "CONFIG_CHECK_CACHE_COHERENCY" Kconfig option.Robert P. J. Day
Signed-off-by: Robert P. J. Day <rpjday@mindspring.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-22[POWERPC] cell: CONFIG_SPE_BASE is a typoGeert Uytterhoeven
The config symbol for SPE support is called CONFIG_SPU_BASE, not CONFIG_SPE_BASE. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-07-21spufs: make signal-notification files readonly for NOSCHED contextsJeremy Kerr
Reading from the signal{1,2} files requires a spu_acquire_saved, so make these files write-only for contexts created with SPU_CREATE_NOSCHED. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21PS3: Fix build with 32-bit toolchainsGeoff Levand
The PS3 bootwrapper files use instructions only available on 64-bit CPUs. Add the code generation directive '.machine "ppc64"' for toolchains configured for 32-bit CPUs. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21ps3: FLASH ROM Storage DriverGeert Uytterhoeven
Add a FLASH ROM Storage Driver for the PS3: - Implemented as a misc character device driver - Uses a fixed 256 KiB buffer allocated from boot memory as the hypervisor requires the writing of aligned 256 KiB blocks Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21ps3: BD/DVD/CD-ROM Storage DriverGeert Uytterhoeven
Add a BD/DVD/CD-ROM Storage Driver for the PS3: - Implemented as a SCSI device driver - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor doesn't support scatter-gather Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Cc: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21ps3: Disk Storage DriverGeert Uytterhoeven
Add a Disk Storage Driver for the PS3: - Implemented as a block device driver with a dynamic major - Disk names (and partitions) are of the format ps3d%c(%u) - Uses software scatter-gather with a 64 KiB bounce buffer as the hypervisor doesn't support scatter-gather Cc: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Acked-by: Jens Axboe <jens.axboe@oracle.com> Cc: James Bottomley <James.Bottomley@steeleye.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-21powerpc: tlb_32.c build fixMariusz Kozlowski
allnoconfig results in this: CC arch/powerpc/mm/tlb_32.o In file included from include/asm/tlb.h:60, from arch/powerpc/mm/tlb_32.c:30: include/asm-generic/tlb.h: In function 'tlb_flush_mmu': include/asm-generic/tlb.h:76: error: implicit declaration of function 'release_pages' include/asm-generic/tlb.h: In function 'tlb_remove_page': include/asm-generic/tlb.h:105: error: implicit declaration of function 'page_cache_release' Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-07-20[CELL] spufs: rework list management and associated lockingChristoph Hellwig
This sorts out the various lists and related locks in the spu code. In detail: - the per-node free_spus and active_list are gone. Instead struct spu gained an alloc_state member telling whether the spu is free or not - the per-node spus array is now locked by a per-node mutex, which takes over from the global spu_lock and the per-node active_mutex - the spu_alloc* and spu_free function are gone as the state change is now done inline in the spufs code. This allows some more sharing of code for the affinity vs normal case and more efficient locking - some little refactoring in the affinity code for this locking scheme Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20[CELL] oprofile: add support to OProfile for profiling CELL BE SPUsBob Nelson
From: Maynard Johnson <mpjohn@us.ibm.com> This patch updates the existing arch/powerpc/oprofile/op_model_cell.c to add in the SPU profiling capabilities. In addition, a 'cell' subdirectory was added to arch/powerpc/oprofile to hold Cell-specific SPU profiling code. Exports spu_set_profile_private_kref and spu_get_profile_private_kref which are used by OProfile to store private profile information in spufs data structures. Also incorporated several fixes from other patches (rrn). Check pointer returned from kzalloc. Eliminated unnecessary cast. Better error handling and cleanup in the related area. 64-bit unsigned long parameter was being demoted to 32-bit unsigned int and eventually promoted back to unsigned long. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org>
2007-07-20[CELL] oprofile: enable SPU switch notification to detect currently active ↵Bob Nelson
SPU tasks From: Maynard Johnson <mpjohn@us.ibm.com> This patch adds to the capability of spu_switch_event_register so that the caller is also notified of currently active SPU tasks. Exports spu_switch_event_register and spu_switch_event_unregister so that OProfile can get access to the notifications provided. Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Bob Nelson <rrnelson@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Acked-by: Paul Mackerras <paulus@samba.org>
2007-07-20[CELL] spu_base: locking cleanupChristoph Hellwig
Sort out the locking mess in spu_base and document the current rules. As an added benefit spu_alloc* and spu_free don't block anymore. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2007-07-20[CELL] cell: indexing of SPUs based on firmware vicinity propertiesArnd Bergmann
This patch links spus according to their physical position using information provided by the firmware through a special vicinity device-tree property. This property is present in current version of Malta firmware. Example of vicinity properties for a node in Malta: Node: Vicinity property contains phandles of: spe@0 [ spe@100000 , mic-tm@50a000 ] spe@100000 [ spe@0 , spe@200000 ] spe@200000 [ spe@100000 , spe@300000 ] spe@300000 [ spe@200000 , bif0@512000 ] spe@80000 [ spe@180000 , mic-tm@50a000 ] spe@180000 [ spe@80000 , spe@280000 ] spe@280000 [ spe@180000 , spe@380000 ] spe@380000 [ spe@280000 , bif0@512000 ] Only spe@* have a vicinity property (e.g., bif0@512000 and mic-tm@50a000 do not have it). Signed-off-by: Andre Detsch <adetsch@br.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>