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That's HAVE_PERF_COUNTERS not HAVE_PERF_COUNTER. This was right
initially but I seem to have screwed it up while re-typing it out
by hand on another machine when I checked it in. Hmph.
Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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SH7786 is roughly identical to SH-X3 proto SMP, though there are only 2
CPUs. This just wraps in to the existing SH-X3 SMP code with some minor
changes for SH7786, including wiring up the IPIs properly, enabling
IRQ_PER_CPU, and so forth.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Crib the x86 cpu_idle_wait() implementation and shove it in with the
idle code, subsequently enabling ARCH_HAS_CPU_IDLE_WAIT.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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'sh/platform-updates' and 'sh/perf_counter'
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This enables support for the generic software-based perf counters.
Hardware counter support could be added in the future, but the lack
of a performance counter IRQ makes this rather dubious.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This plugs in GENERIC_CSUM support on sh64, and kills off all of the old
references.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the dependent patches are merged, we are ready to enable
sparseirq support. This simply adds the Kconfig option, and then converts
from the _cpu to the _node allocation routines to follow the upstream
sparseirq API changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch rewrites the sh7722 clock framework code.
The new code makes use of the recently merged div4,
div6 and mstp32 helper code. Both extal and dll are
supported as input clocks to the pll.
While at it, now when all SuperH Mobile processors
are converted, fix CONFIG_SH_CLK_CPG_LEGACY to depend
on CONFIG_ARCH_SHMOBILE.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch rewrites the sh7366 clock framework code.
The new code makes use of the recently merged div4,
div6 and mstp32 helper code. Both extal and dll are
supported as input clocks to the pll.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch rewrites the sh7343 clock framework code.
The new code makes use of the recently merged div4,
div6 and mstp32 helper code. Both extal and dll are
supported as input clocks to the pll.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch contains V3 of the sh7724 clock framework
rewrite. The new code makes use of the recently merged
div4, div6 and mstp32 helper code. Both extal and fll are
supported as input clocks to the pll. The div6 clocks are
fed through a divide-by-3 block.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch contains V2 of the sh7723 clock framework
rewrite. The new code makes use of the recently merged
div4, div6 and mstp32 helper code. Both extal and dll
are supported as input clocks to the pll.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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CONFIG_SH_PCLK_FREQ=33333333 is correct for sh7724.
sh7724 master clock is 33333333, but peripheral is 41666666.
This bug came to light because sh-sci driver had changed clk
from "module_clk" to "peripheral_clk"
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This tidies up the boot_cpu_data.flags probing on SH-4A. All of them have
a few things in common, which we can blindly set, rather than having each
subtype have to set the same flags. We can also make assumptions about
cache ways and the validity of PTEA, so this also kills off CPU_HAS_PTEA
as a config option. There was also a bug in the FPU probing, which is now
tidied up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds a new SH_CLK_CPG for parts that have CPG support.
SH_CLK_CPG_LEGACY is made to depend on this, and still needs to be set
for platforms that want clock-cpg to register the legacy clocks. With
this new config item in place, it is now possible to start layering more
generic CPG code in place while other platforms transition off of the
legacy clocks.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This updates the SH7785 CPU code as well as the SH7785LCR board support
code for making use of the newly refactored clock framework. Support for
the legacy CPG clocks is dropped at this point, with the extal frequency
fed in from the board code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This moves out the old legacy CPG clocks to their own file, and converts
over the existing users. With these clocks going away and each CPU
dealing with them on their own, CPUs can gradually move over to the new
interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now with all of the TMU users moved over to the new TMU driver, and the
old TMU driver killed off, the left-over infrastructure can go along
with it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes the old TMU driver (CONFIG_SH_TMU/timer-tmu.c)
As replacement, select the sh_tmu driver with CONFIG_SH_TIMER_TMU
and configure timer channel using platform data.
If multiple TMU channels are enabled using platform data, use the
earlytimer parameter on the kernel command line to select channel.
For instance, use "earlytimer=sh_tmu.0" to select the first channel.
To verify which timer is being used, look at printouts or the timer
irq count in /proc/interrupts.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds CMT platform data for sh7720 and sh7721.
All 5 32-bit CMT channels unfortunately share a single IRQ.
Both clockevent and clocksource support is enabled.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Consolidate these in a single place in the Kconfig menus. At the same
time, disable their interactivity and set them according to the board
config defaults.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The RTC_LIB helpers are used in arch/sh/kernel/time.c, which was
previously only the case for the 32-bit variant. Now that this has
become the common implementation, move the RTC_LIB select to reflect
that. Fixes up the sh64 build.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that everything has converted over to generic timekeeping, we need an
alternate method for keeping the RTC updated for those platforms that are
still using the rtc_sh_get/set_time pairs, presently limited to SH-03 and
the Dreamcast. This wires up the GENERIC_CMOS_UPDATE hooks for those to
maintain the same behaviour.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds sh_tmu support to the SH-5 subtypes, which subsequently allows
us to kill off time_64.c and use the now generic time_32.c. As a bonus,
SH-5 now supports highres timers and tickless for the first time.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The TMU block is supported on all SH-3 and SH-4 subtypes, so just select
it there, rather than conditionalizing it per subtype.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds TMU platform data for sh7785. Both clockevent
and clocksource support is enabled.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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sh64 is still using this, so re-enable it temporarily while SH-5 gets
converted to use the generic code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the rest of the timers that didn't support clockevents have been
rewritten, both of these can be enabled by default.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds TMU platform data for sh7722. Only clockevent
mode is enabled for now, clocksource requires this patch:
"clocksource: setup mult_orig in clocksource_enable()"
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds a TMU driver for the SuperH architecture.
The TMU driver is a platform driver with early platform
support to allow using a TMU channel as clockevent or
clocksource during system bootup or later.
Clocksource or clockevent can be selected.
Both periodic and oneshot clockevents are supported.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes the old MTU2 driver (CONFIG_SH_MTU2/timer-mtu2.c)
As replacement, select the sh_cmt driver with CONFIG_SH_TIMER_MTU2
and configure timer channel using platform data.
If multiple MTU channels are enabled using platform data, use the
earlytimer parameter on the kernel command line to select channel.
For instance, use "earlytimer=sh_mtu2.0" to select the first channel.
To verify which timer is being used, look at printouts or the timer
irq count in /proc/interrupts.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds MTU2 platform data for the following cpus:
- sh7201 (3/5 channels)
- sh7203/sh7263 (2/4 channels)
- sh7206 (3/5 channels)
- MXG (3/5 channels)
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch adds a MTU2 driver for the SuperH architecture.
The MTU2 driver is a platform driver with early platform
support to allow using a MTU2 channel as only clockevent
during system bootup.
Clocksource on sh2a is currently unsupported due to code
generation issues with 64-bit math, so at this point only
periodic clockevent support is in place.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Convert sh to use GENERIC_TIME via the arch_getoffset() infrastructure.
Signed-off-by: John Stultz <johnstul@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This patch removes the old CMT driver (CONFIG_SH_CMT/timer-cmt.c)
As replacement, select the sh_cmt driver with CONFIG_SH_TIMER_CMT
and configure timer channel using platform data.
If multiple CMT channels are enabled using platform data, use the
earlytimer parameter on the kernel command line to select channel.
For instance, use "earlytimer=sh_cmt.0" to select the first channel.
To verify which timer is being used, look at printouts or the timer
irq count in /proc/interrupts.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds rtc-generic support for SUPERH32.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This is an SH-Mobile CPU, so select ARCH_SHMOBILE. This enables all of
the PM functionality, amongst other things.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements initial support for the SH-Mobile R2R CPU.
Based on Rev 0.11 of the initial SH7724 hardware manual.
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds in support for building with ARCH=sh64 using the sh SRCARCH.
This tidies up the randconfig generation somewhat to make sure that we
don't end up with impossible configurations, and without having to rely
on things like KCONFIG_ALLCONFIG to detect the proper CPU support subset.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This wires up support for the generic DMA API debugging.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (23 commits)
sh: sh7785lcr: Map whole PCI address space.
sh: Fix up DSP context save/restore.
sh: Fix up number of on-chip DMA channels on SH7091.
sh: update defconfigs.
sh: Kill off broken direct-mapped cache mode.
sh: Wire up ARCH_HAS_DEFAULT_IDLE for cpuidle.
sh: Add a command line option for disabling I/O trapping.
sh: Select ARCH_HIBERNATION_POSSIBLE.
sh: migor: Fix up CEU use flags.
input: migor_ts: add wakeup support
rtc: rtc-sh: use set_irq_wake()
input: sh_keysc: use enable/disable_irq_wake()
sh: intc: set_irq_wake() support
sh: intc: install enable, disable and shutdown callbacks
clocksource: sh_cmt: use remove_irq() and remove clockevent workaround
sh: ap325 and Migo-R use new sh_mobile_ceu_info flags
sh: Fix up -Wformat-security whining.
sh: ap325rxa: Add ov772x support, again.
sh: Sanitize asm/mmu.h for assembly use.
sh: Tidy up sh7786 pinmux table.
...
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cpuidle wants ARCH_HAS_DEFAULT_IDLE defined in order to use the
default idle loop. So, make it accessible and enable it for all
sh machines.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the requisite patches have gone in, this can safely be enabled
across the board for all of the 32-bit SH platforms.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Kexec is not likely to work on NON-MMU CPU because this added
depend on MMU for kexec.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Add kexec jump support to the SuperH architecture.
Similar to the x86 implementation, with the following
exceptions:
- Instead of separating the assembly code flow into
two parts for regular kexec and kexec jump we use a
single code path. In the assembly snippet regular
kexec is just kexec jump that never comes back.
- Instead of using a swap page when moving data between
pages the page copy assembly routine has been modified
to exchange the data between the pages using registers.
- We walk the page list twice in machine_kexec() to
do and undo physical to virtual address conversion.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores
that implement the PTAEX register and respective functionality. Presently
only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs).
The main change is in how the PTE is written out when loading the entry
in to the TLB, as well as in how the TLB entry is selectively flushed.
While SH-X2 extended mode splits out the memory-mapped U and I-TLB data
arrays for extra bits, extended ASID mode splits out the address arrays.
While we don't use the memory-mapped data array access, the address
array accesses are necessary for selective TLB flushes, so these are
implemented newly and replace the generic SH-4 implementation.
With this, TLB flushes in switch_mm() are almost non-existent on newer
parts.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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