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2007-03-05sh: Revert lazy dcache writeback changes.Paul Mundt
These ended up causing too many problems on older parts, revert for now.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-14sh: Revert TLB miss fast-path changes that broke PTEA parts.Paul Mundt
This ended up causing problems for older parts (particularly ones using PTEA). Revert this for now, it can be added back in once it's had some more testing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Kill dead/unused ISA code from __ioremap().Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Switch to local TLB flush variants in additional callsites.Paul Mundt
Convert some of the global flush users over to using the local variants that don't need to use the global routines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Local TLB flushing variants for SMP prep.Paul Mundt
Rename the existing flush routines to local_ variants for use by the IPI-backed global flush routines on SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Fixup cpu_data references for the non-boot CPUs.Paul Mundt
There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Use a per-cpu ASID cache.Paul Mundt
Previously this was implemented using a global cache, cache this per-CPU instead and bump up the number of context IDs to match NR_CPUS. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: add SH7760 IPR IRQ dataManuel Lauss
Add SH7760 IPR IRQ data; makes 2.6.20-rc bootable again. Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Don't set reserved _PAGE_WT bit on SH-3.Paul Mundt
Only SH-4 needs to set _PAGE_WT when using write-through caching, don't attempt to set it on SH-3 where it ends up being a reserved bit. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: Lazy dcache writeback optimizations.Paul Mundt
This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-13sh: shmin updates.Takashi YOSHII
This fixes up shmin (and SH7706/SH7708) IPR support for some of the recent API changes. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2007-02-12[PATCH] mark struct file_operations const 2Arjan van de Ven
Many struct file_operations in the kernel can be "const". Marking them const moves these to the .rodata section, which avoids false sharing with potential dirty data. In addition it'll catch accidental writes at compile time to these shared resources. [akpm@osdl.org: sparc64 fix] Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-11[PATCH] optional ZONE_DMA: remove ZONE_DMA remains from sh/sh64Christoph Lameter
sh / sh64: Remove ZONE_DMA remains. Both arches do not need ZONE_DMA Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2006-12-12sh: SH-MobileR SH7722 CPU support.Paul Mundt
This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12sh: Convert remaining remap_area_pages() users to ioremap_page_range().Paul Mundt
A couple of these were missed. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-12sh: Trivial build fixes for SH-2 support.Yoshinori Sato
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-08[PATCH] Generic ioremap_page_range: sh conversionHaavard Skinnemoen
Convert SH to use generic ioremap_page_range() Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07[PATCH] slab: remove kmem_cache_tChristoph Lameter
Replace all uses of kmem_cache_t with struct kmem_cache. The patch was generated using the following script: #!/bin/sh # # Replace one string by another in all the kernel sources. # set -e for file in `find * -name "*.c" -o -name "*.h"|xargs grep -l $1`; do quilt add $file sed -e "1,\$s/$1/$2/g" $file >/tmp/$$ mv /tmp/$$ $file quilt refresh done The script was run like this sh replace kmem_cache_t "struct kmem_cache" Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-07[PATCH] shared page table for hugetlb pageChen, Kenneth W
Following up with the work on shared page table done by Dave McCracken. This set of patch target shared page table for hugetlb memory only. The shared page table is particular useful in the situation of large number of independent processes sharing large shared memory segments. In the normal page case, the amount of memory saved from process' page table is quite significant. For hugetlb, the saving on page table memory is not the primary objective (as hugetlb itself already cuts down page table overhead significantly), instead, the purpose of using shared page table on hugetlb is to allow faster TLB refill and smaller cache pollution upon TLB miss. With PT sharing, pte entries are shared among hundreds of processes, the cache consumption used by all the page table is smaller and in return, application gets much higher cache hit ratio. One other effect is that cache hit ratio with hardware page walker hitting on pte in cache will be higher and this helps to reduce tlb miss latency. These two effects contribute to higher application performance. Signed-off-by: Ken Chen <kenneth.w.chen@intel.com> Acked-by: Hugh Dickins <hugh@veritas.com> Cc: Dave McCracken <dmccr@us.ibm.com> Cc: William Lee Irwin III <wli@holomorphy.com> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: David Gibson <david@gibson.dropbear.id.au> Cc: Adam Litke <agl@us.ibm.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-12-06sh: sh775x/titan fixes for irq header changes.Jamie Lenehan
The following moves the creation of IPR interupts into setup-7750.c and updates a few other things to make it all work after the "Drop CPU subtype IRQ headers" commit. It boots and runs fine on my titan board. - adds an ipr_idx to the ipr_data and uses a function in the subtype code to calculate the address of the IPR registers - adds a function to enable individual interrupt mode for externals in the subtype code and calls that from the titan board code instead of doing it directly. - I changed the shift in the ipr_data to be the actual # of bits to shift, instead of the numnber / 4 - made it easier to match with the manual. Signed-off-by: Jamie Lenehan <lenehan@twibble.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: stacktrace/lockdep/irqflags tracing support.Paul Mundt
Wire up all of the essentials for lockdep.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Get the PGD right in oops case with 64-bit PTEs.Paul Mundt
Previously this was using a static pgd shift in the reporting code, simply flip this to PGDIR_SHIFT which does the right thing depending on varying PTE magnitudes on the SH-X2 MMU. While we're at it, and since it's been recently added, use get_TTB() for fetching the TTB, rather than the open coded instructions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Fixup various PAGE_SIZE == 4096 assumptions.Paul Mundt
There were a number of places that made evil PAGE_SIZE == 4k assumptions that ended up breaking when trying to play with 8k and 64k page sizes, this fixes those up. The most significant change is the way we load THREAD_SIZE, previously this was done via: mov #(THREAD_SIZE >> 8), reg shll8 reg to avoid a memory access and allow the immediate load. With a 64k PAGE_SIZE, we're out of range for the immediate load size without resorting to special instructions available in later ISAs (movi20s and so on). The "workaround" for this is to bump up the shift to 10 and insert a shll2, which gives a bit more flexibility while still being much cheaper than a memory access. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: TLB miss fast-path optimizations.Stuart Menefy
Handle simple TLB miss faults which can be resolved completely from the page table in assembler. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: pmd rework.Stuart Menefy
Remove extra bits from the pmd structure and store a kernel logical address rather than a physical address. This allows it to be directly dereferenced. Another piece of wierdness inherited from x86. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Use MMU.TTB register as pointer to current pgd.Stuart Menefy
Add TTB accessor functions and give it a sensible default value. We will use this later for optimizing the fault path. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Set up correct siginfo structures for page faults.Stuart Menefy
Remove the previous saving of fault codes into the thread_struct as they are never used, and appeared to be inherited from x86. Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: p3map_sem sem2mutex conversion.Paul Mundt
Simple sem2mutex conversion for the p3map semaphores. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Preliminary support for SH-X2 MMU.Paul Mundt
This adds some preliminary support for the SH-X2 MMU, used by newer SH-4A parts (particularly SH7785). This MMU implements a 'compat' mode with SH-X MMUs and an 'extended' mode for SH-X2 extended features. Extended features include additional page sizes (8kB, 4MB, 64MB), as well as the addition of page execute permissions. The extended mode attributes are placed in a second data array, which requires us to switch to 64-bit PTEs when in X2 mode. With the addition of the exec perms, we also overhaul the mmap prots somewhat, now that it's possible to handle them more intelligently. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Hook SH7785 in to the build system.Paul Mundt
Simple 7785 placeholders to start hooking up other bits of code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-12-06sh: Add support for SH7206 and SH7619 CPU subtypes.Yoshinori Sato
This implements initial support for the SH7206 (SH-2A) and SH7619 (SH-2) MMU-less CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-10sh: Zero-out coherent buffer in consistent_alloc().Paul Mundt
Be sure to zero out the buffer, this was causing occasional problems under heavier PCI tests. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-10-03sh: build fixes for defconfigs.Paul Mundt
Get all of the defconfigs building again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-29[PATCH] pidspace: is_init()Sukadev Bhattiprolu
This is an updated version of Eric Biederman's is_init() patch. (http://lkml.org/lkml/2006/2/6/280). It applies cleanly to 2.6.18-rc3 and replaces a few more instances of ->pid == 1 with is_init(). Further, is_init() checks pid and thus removes dependency on Eric's other patches for now. Eric's original description: There are a lot of places in the kernel where we test for init because we give it special properties. Most significantly init must not die. This results in code all over the kernel test ->pid == 1. Introduce is_init to capture this case. With multiple pid spaces for all of the cases affected we are looking for only the first process on the system, not some other process that has pid == 1. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Sukadev Bhattiprolu <sukadev@us.ibm.com> Cc: Dave Hansen <haveblue@us.ibm.com> Cc: Serge Hallyn <serue@us.ibm.com> Cc: Cedric Le Goater <clg@fr.ibm.com> Cc: <lxc-devel@lists.sourceforge.net> Acked-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-29[PATCH] make PROT_WRITE imply PROT_READJason Baron
Make PROT_WRITE imply PROT_READ for a number of architectures which don't support write only in hardware. While looking at this, I noticed that some architectures which do not support write only mappings already take the exact same approach. For example, in arch/alpha/mm/fault.c: " if (cause < 0) { if (!(vma->vm_flags & VM_EXEC)) goto bad_area; } else if (!cause) { /* Allow reads even for write-only mappings */ if (!(vma->vm_flags & (VM_READ | VM_WRITE))) goto bad_area; } else { if (!(vma->vm_flags & VM_WRITE)) goto bad_area; } " Thus, this patch brings other architectures which do not support write only mappings in-line and consistent with the rest. I've verified the patch on ia64, x86_64 and x86. Additional discussion: Several architectures, including x86, can not support write-only mappings. The pte for x86 reserves a single bit for protection and its two states are read only or read/write. Thus, write only is not supported in h/w. Currently, if i 'mmap' a page write-only, the first read attempt on that page creates a page fault and will SEGV. That check is enforced in arch/blah/mm/fault.c. However, if i first write that page it will fault in and the pte will be set to read/write. Thus, any subsequent reads to the page will succeed. It is this inconsistency in behavior that this patch is attempting to address. Furthermore, if the page is swapped out, and then brought back the first read will also cause a SEGV. Thus, any arbitrary read on a page can potentially result in a SEGV. According to the SuSv3 spec, "if the application requests only PROT_WRITE, the implementation may also allow read access." Also as mentioned, some archtectures, such as alpha, shown above already take the approach that i am suggesting. The counter-argument to this raised by Arjan, is that the kernel is enforcing the write only mapping the best it can given the h/w limitations. This is true, however Alan Cox, and myself would argue that the inconsitency in behavior, that is applications can sometimes work/sometimes fails is highly undesireable. If you read through the thread, i think people, came to an agreement on the last patch i posted, as nobody has objected to it... Signed-off-by: Jason Baron <jbaron@redhat.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Hugh Dickins <hugh@veritas.com> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Andi Kleen <ak@muc.de> Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk> Cc: Arjan van de Ven <arjan@linux.intel.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Ian Molton <spyro@f2s.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-27sh: Fix occasional flush_cache_4096() stack corruption.Paul Mundt
IRQs disabling in flush_cache_4096 for cache purge. Under certain workloads we would get an IRQ in the middle of a purge operation, and the cachelines would remain in an inconsistent state, leading to occasional stack corruption. Signed-off-by: Takeo Takahashi <takahashi.takeo@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Initial vsyscall page support.Paul Mundt
This implements initial support for the vsyscall page on SH. At the moment we leave it configurable due to having nommu to support from the same code base. We hook it up for the signal trampoline return at present, with more to be added later, once uClibc catches up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Selective flush_cache_mm() flushing.Paul Mundt
flush_cache_mm() wraps in to flush_cache_all(), which is rather excessive given that the number of PTEs within the specified context are generally quite low. Optimize for walking the mm's VMA list and selectively flushing the VMA ranges from the dcache. Invalidate the icache only if a VMA sets VM_EXEC. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Enable /proc/kcore support.Paul Mundt
This was previously unimplemented.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Add support for cacheline poking through debugfs.Paul Mundt
A simple debugging aid for easier visibility of the respective cachelines. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Add support for SH7706/SH7710/SH7343 CPUs.Paul Mundt
This adds support for the aforementioned CPU subtypes, and cleans up some build issues encountered as a result. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: __addr_ok() and other misc nommu fixups.Yoshinori Sato
A few more outstanding nommu fixups.. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Various nommu fixes.Yoshinori Sato
This fixes up some of the various outstanding nommu bugs on SH. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Make PAGE_OFFSET configurable.Paul Mundt
nommu needs to be able to shift PAGE_OFFSET, so we switch it to a non-user-visible CONFIG_PAGE_OFFSET and use that in the few places where it matters. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: More cosmetic cleanups and trivial fixes.Paul Mundt
Nothing exciting here, just trivial fixes.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Inhibit mapping PCI apertures through page tables.Paul Mundt
Inhibit mapping through page tables in __ioremap() for PCI memory apertures on SH7751 and SH7780-style PCI controllers, translation is not possible for these areas. For other users that map a small window in P1/P2 space, ioremap() traps that already, and should never make it to __ioremap(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: SE73180 updates for IRQ changes.Paul Mundt
SE73180 can use the generic support, we just need to wire up the IRQ demuxing. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: Fix split ptlock for user mappings in __do_page_fault().Paul Mundt
There was a bug that got introduced when the split ptlock changes went in where mm could be unintialized for user mappings, this fixes it up.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: ioremap() overhaul.Paul Mundt
ioremap() overhaul. Add support for transparent PMB mapping, get rid of p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the machvec, as everyone can use the generic ioremap() API instead. For PCI memory apertures and other special cases, use the pci_iomap() API, as boards are already required to get the mapping right there. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2006-09-27sh: page table alloc cleanups and page fault optimizations.Paul Mundt
Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt <lethal@linux-sh.org>