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Fix the problem that cannot work 29-bit mode when use sh7785lcr_defconfig.
Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This has the consequence of changing the section name use for head
code from ".text.head" to ".head.text". Since this commit changes all
users in the architecture, this change should be harmless.
Signed-off-by: Tim Abbott <tabbott@mit.edu>
Cc: Paul Mundt <lethal@linux-sh.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
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Pass clocksource pointer to the read() callback for clocksources. This
allows us to share the callback between multiple instances.
[hugh@veritas.com: fix powerpc build of clocksource pass clocksource mods]
[akpm@linux-foundation.org: cleanup]
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Acked-by: John Stultz <johnstul@us.ibm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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mmap2 uses a fixed page shift of 12, regardless of the PAGE_SIZE setting.
Fix up the mmap2 code to add some sanity checks on the mapping, and to
update pgoff accordingly.
Error handling bits based on 4280e3126f641898f0ed1a931645373d3489e2a6
("frv: fix mmap2 error handling").
Signed-off-by: Toshinobu Sugioka <sugioka@itonet.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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pci-new.c is now in a state to replace the old pci.c, rename it
accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the pci-auto cruft is gone, pci-lib can go away.
Roll it back in to pci-new.c where it originally split off from.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The se7751 was still doing the PCI fixups in its own board directory,
so we move it over to arch/sh/drivers/pci/ with the rest of the board
fixups. It has bitrotted significantly over the years, so will still
likely need a bit of work to bring back up to date.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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None of these contain pci_ops, only IRQ routing bits, rename them
accordingly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This follows the similar sort of scheme that the refactored SH7780 code
uses, using a 64MB CS3 mapping to handle the window0 case, and simply
discarding window1. This vastly simplifies the code, and allows most of
the board-specific setup to go die.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that ops-cayman.c only contains IRQ routing fixups, rename it.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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These fixups seem to have bitrotted a bit since their introduction in the
2.4 days. As we never had much use for them in the first place, and
nothing is using them any more, kill them off the rest of the way.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This wasn't really being used for anything useful, so just stub it in
pci-lib.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Some old boards are still using this in their I/O routines, kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This isn't a real BAR, so prevent any attempts to move it, as we don't
wish to encourage a bus luck by overzealous PCI initialization code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This is a verbatim copy of the r2d one, use that instead.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Nothing is using this any more, so kill it off.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This moves the remaining common bits in to pci-lib. Thereby reducing
pci.c/pci-new.c to simple bus fixups and controller registration.
As more platforms are moved over, the old code will disappear completely
and the pci-new bits will be rolled in to pci-lib, eventually replacing
pci.c completely.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the io and mem offsets are tracked accordingly, the pci-new
version of the bus<->resource mappers can be used generically. This
moves them in to pci-lib.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements a per-hose offset for I/O and mem resources.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This moves off of the board_pci_channels[] approach for bus registration
and over to a cleaner register_pci_controller(), all derived from the
MIPS code.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Not all PCI channels have non-translatable memory windows, this is a
special property of the on-chip PCIC with its 0xfd00... mapping, handle
this explicitly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This consolidates the pci_iomap() definitions and reworks how the I/O
port base is handled. PCI channels can register their own I/O map base,
or if none is provided, the system-wide generic I/O base is used instead.
Functionally nothing changes, while this allows us to kill off lots of
I/O address special casing and lookups.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This is left over cruft that hasn't been used by anything in a long time,
kill off bits that weren't purged previously.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This introduces a saner pcibios_align_resource() that can be used
regardless of whether pci-auto or pci-new are being used, and
consolidates it in pci-lib.c.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Derived from the MIPS version, now uses pgprot_noncached().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This splits off a 'pci-new.c' which is aimed at gradually replacing the
pci-auto backend and the arch/sh/drivers/pci/pci.c core respectively.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The new PCI code wants its own bus<->resource mappings instead of the
generic equivalents, so drop the asm-generic include in preparation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Follows the SH7722/SH7723 changes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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rtc-sh takes care of this now, so no need to have this always enabled.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Use plat_early_device_setup() to register Early Platform Data
for SuperH Mobile processors.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add a plat_early_device_setup() function to allow
processor-specific code to register Early Platform Data.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Extend the 32-bit SuperH timer code to register and probe
the earlytimer class of Early Platform Drivers.
This registers the sh_cmt driver if compiled-in.
Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This starts moving out the common initialization bits from the various
fixup paths in to the shared init path.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Now that the platform code is a bit leaner, we can start consolidating
the various IRQ routing implementations. There are effectively only 2
variants, and the others can use those directly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map
whole PCI address space.") changed around the semantics of how various
chip-selects are made accessible to PCI. Now that there is a single
large mapping covering from CS0-CS6, there is no longer any need to
do multi-window mapping. Subsequently, all of the differing
implementations can be consolidated in to pci-sh7780.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This consolidates all of the PCI I/O and memory window definitions across
the pci-sh7780 users in pci-sh7780 itself. No functional changes, in that
every platform had exactly the same implementation.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Presently the I/O port base isn't being set anywhere, which allows things
like generic_inl() to blow up. Fix this up to point at the PCI IO window.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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The SH7780 PCIC contains a read-only cache line size register that we can
derive pci_cache_line_size from. So, make sure that the software idea of
the cache line size actually matches the host controller's idea.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Don't use pci_write_reg() for these, as it defaults to 32-bit. Rather
than using the helper, use __raw_writeb() directly.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This reworks how the host controller is probed, and makes it a bit more
verbose in the event a new type of controller is detected. Additionally,
we also log the revision information.
This now uses the proper access sizes for the vendor/device registers,
rather than relying on a larger access that encapsulated both of them.
Not all devices support 32-bit read cycles for these registers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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