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2008-04-17x86: switch to proc_create()Alexey Dobriyan
Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up traps_32.cIngo Molnar
Before: total: 86 errors, 29 warnings, 1248 lines checked After: total: 0 errors, 17 warnings, 1281 lines checked No code changed: arch/x86/kernel/traps_32.o: text data bss dec hex filename 8711 2168 72 10951 2ac7 traps_32.o.before 8711 2168 72 10951 2ac7 traps_32.o.after (md5 sums differ because some stack offset positions changed.) Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, transmeta.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities in arch/x86/kernel/cpu/intel.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, cyrix.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, common.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, centaur.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, amd.cIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up cpu capabilities accesses, genericIngo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: remove wrong setting about CONSTANT_TSC for intel cpuYinghai Lu
early_init_intel() on 64-bit is introduced by commit 2b16a2353814a513cdb5c5c739b76a19d7ea39ce Author: Andi Kleen <ak@suse.de> Date: Wed Jan 30 13:32:40 2008 +0100 x86: move X86_FEATURE_CONSTANT_TSC into early cpu feature detection sets CONSTANT_TSC for intel cpus - but it is already set in init_intel(). don't need to set that two times in early_init_intel() and init_intel(). this patch removes the init_intel() one. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: apic_is_clustered_box for vsmpYinghai Lu
quad core 8 socket system will have apic id lifting.the apic id range could be [4, 0x23]. and apic_is_clustered_box will think that need to three clusters and that is larger than 2. So it is treated as a clustered_box. and will get: Marking TSC unstable due to TSCs unsynchronized even if the CPUs have X86_FEATURE_CONSTANT_TSC set. this quick fix will check if the cpu is from AMD. but vsmp still needs that checking... this patch is fix to make sure that vsmp not to be passed. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/common.cPaolo Ciarrocchi
Before: total: 55 errors, 6 warnings, 727 lines checked After: total: 0 errors, 3 warnings, 734 lines checked No code changed: arch/x86/kernel/cpu/common.o: text data bss dec hex filename 3500 4611 44 8155 1fdb common.o.before 3500 4611 44 8155 1fdb common.o.after md5: e37091f11fbeb682c0db152ac3022a38 common.o.before.asm e37091f11fbeb682c0db152ac3022a38 common.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/msr.cPaolo Ciarrocchi
Before: total: 2 errors, 0 warnings, 231 lines checked After: total: 0 errors, 0 warnings, 231 lines checked No code changed: arch/x86/kernel/msr.o: text data bss dec hex filename 1199 12 4 1215 4bf msr.o.before 1199 12 4 1215 4bf msr.o.after md5: 604be0d07d829bc52a9346babd084bdc msr.o.before.asm 604be0d07d829bc52a9346babd084bdc msr.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/cyrix.cPaolo Ciarrocchi
Before: total: 46 errors, 10 warnings, 450 lines checked After: total: 1 errors, 10 warnings, 449 lines checked No code changed: arch/x86/kernel/cpu/cyrix.o: text data bss dec hex filename 2048 908 4 2960 b90 cyrix.o.before 2048 908 4 2960 b90 cyrix.o.after md5: 9add5e69dbd788f91ff24eea8462dad7 cyrix.o.before.asm 9add5e69dbd788f91ff24eea8462dad7 cyrix.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mcheck/mce_32.cPaolo Ciarrocchi
Before: total: 10 errors, 3 warnings, 90 lines checked After: total: 0 errors, 3 warnings, 90 lines checked No code changed: arch/x86/kernel/cpu/mcheck/mce_32.o: text data bss dec hex filename 287 42 12 341 155 mce_32.o.before 287 42 12 341 155 mce_32.o.after md5: fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.before.asm fede5ff8e6bc3f62e8e691ca6c45eb39 mce_32.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mcheck/winchip.cPaolo Ciarrocchi
Before: total: 4 errors, 0 warnings, 36 lines checked After: total: 0 errors, 0 warnings, 36 lines checked No code changed: arch/x86/kernel/cpu/mcheck/winchip.o: text data bss dec hex filename 222 0 4 226 e2 winchip.o.before 222 0 4 226 e2 winchip.o.after md5: 9caefa12256c5f7d71ef324f6d01a2d5 winchip.o.before.asm 9caefa12256c5f7d71ef324f6d01a2d5 winchip.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mcheck/non-fatal.cPaolo Ciarrocchi
Before: total: 5 errors, 5 warnings, 91 lines checked After: total: 0 errors, 0 warnings, 94 lines checked No code changed: arch/x86/kernel/cpu/mcheck/non-fatal.o: text data bss dec hex filename 441 80 4 525 20d non-fatal.o.before 441 80 4 525 20d non-fatal.o.after md5: 137bc114d2020ad331d5e76444a2c7d3 non-fatal.o.before.asm 137bc114d2020ad331d5e76444a2c7d3 non-fatal.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/vm86_32.cPaolo Ciarrocchi
Before: total: 64 errors, 18 warnings, 840 lines checked After: total: 12 errors, 15 warnings, 844 lines checked No code changed: arch/x86/kernel/vm86_32.o: text data bss dec hex filename 4449 28 132 4609 1201 vm86_32.o.before 4449 28 132 4609 1201 vm86_32.o.after md5: e4e51ed7689d17f04148554a3c6d5bb6 vm86_32.o.before.asm e4e51ed7689d17f04148554a3c6d5bb6 vm86_32.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/amd.cPaolo Ciarrocchi
Before: total: 42 errors, 26 warnings, 350 lines checked After: total: 0 errors, 26 warnings, 352 lines checked No code changed: arch/x86/kernel/cpu/amd.o: text data bss dec hex filename 1936 328 0 2264 8d8 amd.o.before 1936 328 0 2264 8d8 amd.o.after md5: 873430a88faaf31bb4bbfe3a2a691e45 amd.o.before.asm 873430a88faaf31bb4bbfe3a2a691e45 amd.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/transmeta.cPaolo Ciarrocchi
Before: total: 13 errors, 3 warnings, 105 lines checked After: total: 0 errors, 3 warnings, 107 lines checked No code changed: arch/x86/kernel/cpu/transmeta.o: text data bss dec hex filename 713 324 0 1037 40d transmeta.o.before 713 324 0 1037 40d transmeta.o.after md5: 19abe2cafac617e1e2aadc4aa4e9923b transmeta.o.before.asm 19abe2cafac617e1e2aadc4aa4e9923b transmeta.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mtrr/state.cPaolo Ciarrocchi
Before: total: 6 errors, 5 warnings, 80 lines checked After: total: 0 errors, 4 warnings, 82 lines checked No code changed: arch/x86/kernel/cpu/mtrr/state.o: text data bss dec hex filename 313 0 4 317 13d state.o.before 313 0 4 317 13d state.o.after md5: a0fbd61096205f9180f0bf45ed386d61 state.o.before.asm a0fbd61096205f9180f0bf45ed386d61 state.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/mca_32.cPaolo Ciarrocchi
Before: total: 42 errors, 3 warnings, 469 lines checked After: total: 0 errors, 3 warnings, 479 lines checked No code changed: arch/x86/kernel/mca_32.o: text data bss dec hex filename 1832 288 5 2125 84d mca_32.o.before 1832 288 5 2125 84d mca_32.o.after md5: c0e45e2b743ce26349eb07dc53e80b94 mca_32.o.before.asm c0e45e2b743ce26349eb07dc53e80b94 mca_32.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/intel.cPaolo Ciarrocchi
Before: total: 37 errors, 16 warnings, 366 lines checked After: total: 0 errors, 15 warnings, 369 lines checked No code changed: arch/x86/kernel/cpu/intel.o: text data bss dec hex filename 1534 452 0 1986 7c2 intel.o.before 1534 452 0 1986 7c2 intel.o.after md5: 1ca348a06de6eb354c4b6ea715a57db5 intel.o.before.asm 1ca348a06de6eb354c4b6ea715a57db5 intel.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/summit_32.cPaolo Ciarrocchi
Before: total: 20 errors, 17 warnings, 180 lines checked After: total: 0 errors, 17 warnings, 183 lines checked No code changed: arch/x86/kernel/summit_32.o: text data bss dec hex filename 932 192 0 1124 464 summit_32.o.before 932 192 0 1124 464 summit_32.o.after md5: 217aa5f002f217e56ef9d8e5c74b60e0 summit_32.o.before.asm 217aa5f002f217e56ef9d8e5c74b60e0 summit_32.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: insert_resorce for lapic addr after e820_reserve_resourcesYinghai Lu
when comparing the e820 direct from BIOS, and the one by kexec: BIOS-provided physical RAM map: - BIOS-e820: 0000000000000000 - 0000000000097400 (usable) + BIOS-e820: 0000000000000100 - 0000000000097400 (usable) BIOS-e820: 0000000000097400 - 00000000000a0000 (reserved) BIOS-e820: 00000000000e6000 - 0000000000100000 (reserved) BIOS-e820: 0000000000100000 - 00000000dffa0000 (usable) - BIOS-e820: 00000000dffae000 - 00000000dffb0000 type 9 + BIOS-e820: 00000000dffae000 - 00000000dffb0000 (reserved) BIOS-e820: 00000000dffb0000 - 00000000dffbe000 (ACPI data) BIOS-e820: 00000000dffbe000 - 00000000dfff0000 (ACPI NVS) BIOS-e820: 00000000dfff0000 - 00000000e0000000 (reserved) BIOS-e820: 00000000fec00000 - 00000000fec01000 (reserved) - BIOS-e820: 00000000fee00000 - 00000000fee01000 (reserved) =======> that is the local apic address... somewhere we lost it BIOS-e820: 00000000ff700000 - 0000000100000000 (reserved) BIOS-e820: 0000000100000000 - 0000004020000000 (usable) found one entry about reserved is missing for the kernel by kexec. it turns out init_apic_mappings is called before e820_reserve_resources in setup_arch. but e820_reserve_resources is using request_resource. it will not handle the conflicts. there are three ways to fix it: 1. change request_resource in e820_reserve_resources to to insert_resource 2. move init_apic_mappings after e820_reserve_resources 3. use late_initcall to insert lapic resource. this patch is using method 3, that is less intrusive. in later version could consider to use method 1. before patch fed20000-ffffffff : PCI Bus #00 fee00000-fee00fff : Local APIC fefff000-feffffff : pnp 00:09 ff700000-ffffffff : reserved with patch will get map in first kernel fed20000-ffffffff : PCI Bus #00 fee00000-fee00fff : Local APIC fee00000-fee00fff : reserved fefff000-feffffff : pnp 00:09 ff700000-ffffffff : reserved Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: clean up e820_reserve_resources on 64-bitYinghai Lu
e820_resource_resources could use insert_resource instead of request_resource also move code_resource, data_resource, bss_resource, and crashk_res out of e820_reserve_resources. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: introduce kernel/head32.cEric W. Biederman
Copy x86_64 and add a head32.c so we can start moving early architecture initialization out of assembly. [ Sam Ravnborg <sam@ravnborg.org>: updated it to x86 ] Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Cc: H. Peter Anvin <hpa@zytor.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: make amd quad core 8 socket system not be clustered_box, #2Yinghai Lu
quad core 8 socket system will have apic id lifting.the apic id range could be [4, 0x23]. and apic_is_clustered_box will think that need to three clusters and that is large than 2. So it is treated as clustered_box. and will get Marking TSC unstable due to TSCs unsynchronized even the CPUs have X86_FEATURE_CONSTANT_TSC set. this patch will check if the cpu is from AMD. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: de-macro start_thread()Ingo Molnar
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/umc.cPaolo Ciarrocchi
Before: total: 3 errors, 1 warnings, 23 lines checked After: total: 0 errors, 0 warnings, 25 lines checked No code changed: arch/x86/kernel/cpu/umc.o: text data bss dec hex filename 24 616 0 640 280 umc.o.before 24 616 0 640 280 umc.o.after md5: e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.before.asm e8daa3eaed0963a0cdd2e83c2e1f9823 umc.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mcheck/p6.cPaolo Ciarrocchi
Before: total: 16 errors, 13 warnings, 122 lines checked After: total: 0 errors, 0 warnings, 122 lines checked No code changed: arch/x86/kernel/cpu/mcheck/p6.o: text data bss dec hex filename 1082 0 8 1090 442 p6.o.before 1082 0 8 1090 442 p6.o.after md5: 4e283fbc1b68240f1724d9725007d379 p6.o.before.asm 4e283fbc1b68240f1724d9725007d379 p6.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: unify cpu/proc|_64.cHiroshi Shimamoto
Now cpu/proc.c and cpu/proc_64.c are same. So cpu/proc_64.c can be removed. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: cosmetic unification cpu/proc|_64.cHiroshi Shimamoto
make cpu/proc.c and cpu/proc_64.c same. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: add power management line in /proc/cpuinfoHiroshi Shimamoto
Change /proc/cpuinfo on 32-bit, it will look like on 64-bit. 'power management' line is added and power management information will be printed at the line. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: make cpu/proc|_64.c similarHiroshi Shimamoto
clean up for unification. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: split cpuinfo from setup_64.c into cpu/proc_64.cHiroshi Shimamoto
x86 /proc/cpuinfo code can be unified. This is the first step of unification. Signed-off-by: Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/nexgen.cPaolo Ciarrocchi
arch/x86/kernel/cpu/nexgen.o: text data bss dec hex filename 111 316 0 427 1ab nexgen.o.before 111 316 0 427 1ab nexgen.o.after md5: e796efefea9ebc6644338bad226599ee nexgen.o.before.asm e796efefea9ebc6644338bad226599ee nexgen.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/x8664_ksyms_64.cPaolo Ciarrocchi
arch/x86/kernel/x8664_ksyms_64.o: text data bss dec hex filename 0 0 0 0 0 x8664_ksyms_64.o.before 0 0 0 0 0 x8664_ksyms_64.o.after md5: 2dd2d82a2b440a3c29b9ac9ce3221994 x8664_ksyms_64.o.before.asm 2dd2d82a2b440a3c29b9ac9ce3221994 x8664_ksyms_64.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/cpu/mcheck/p5.cPaolo Ciarrocchi
The patch make the file errors free. Only 4 "WARNING: line over 80 characters" left. arch/x86/kernel/cpu/mcheck/p5.o: text data bss dec hex filename 452 0 4 456 1c8 p5.o.before 452 0 4 456 1c8 p5.o.after md5: 50c945ef150aa95bf0481cc3e1dc3315 p5.o.before.asm 50c945ef150aa95bf0481cc3e1dc3315 p5.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: coding style fixes to arch/x86/kernel/syscall_64.cPaolo Ciarrocchi
After the patch: total: 0 errors, 1 warnings, 29 lines checked no code changed: arch/x86/kernel/syscall_64.o: text data bss dec hex filename 2304 0 0 2304 900 syscall_64.o.before 2304 0 0 2304 900 syscall_64.o.after md5: 0fdbb875cde8892296585226b92f4333 syscall_64.o.before.asm 0fdbb875cde8892296585226b92f4333 syscall_64.o.after.asm Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-04-17x86: more coding style fixes in centaur.cIngo Molnar
no code changed: arch/x86/kernel/cpu/centaur.o: text data bss dec hex filename 1031 324 0 1355 54b centaur.o.before 1031 324 0 1355 54b centaur.o.after md5: 4f306a7f980b58eb69c4bdcfcde565f1 centaur.o.before.asm 4f306a7f980b58eb69c4bdcfcde565f1 centaur.o.after.asm Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: coding style fixes for arch/x86/kernel/cpu/centaur.cPaolo Ciarrocchi
Kills more than 150 errors/warnings Signed-off-by: Paolo Ciarrocchi <paolo.ciarrocchi@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: fix cmos read and write to not use inb_p and outb_pDavid P. Reed
fix code to access CMOS rtc registers so that it does not use inb_p and outb_p routines, which are deprecated. Extensive research on all known CMOS RTC chipset timing shows that there is no need for a delay in accessing the registers of these chips even on old machines. These chipa are never on an expansion bus, but have always been "motherboard" resources, either in the processor chipset or explicitly on the motherboard, and they are not part of the ISA/LPC or PCI buses, so delays should not be based on bus timing. The reason to fix it: 1) port 80 writes often hang some laptops that use ENE EC chipsets, esp. those designed and manufactured by Quanta for HP; 2) RTC accesses are timing sensitive, and extra microseconds may matter; 3) the new "io_delay" function is calibrated by expansion bus timing needs, thus is not appropriate for access to CMOS rtc registers. Signed-off-by: David P. Reed <dpreed@reed.com> Acked-by: Alan Cox <alan@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: use ELF section to list CPU vendor specific codeThomas Petazzoni
Replace the hardcoded list of initialization functions for each CPU vendor by a list in an ELF section, which is read at initialization in arch/x86/kernel/cpu/cpu.c to fill the cpu_devs[] array. The ELF section, named .x86cpuvendor.init, is reclaimed after boot, and contains entries of type "struct cpu_vendor_dev" which associates a vendor number with a pointer to a "struct cpu_dev" structure. This first modification allows to remove all the VENDOR_init_cpu() functions. This patch also removes the hardcoded calls to early_init_amd() and early_init_intel(). Instead, we add a "c_early_init" member to the cpu_dev structure, which is then called if not NULL by the generic CPU initialization code. Unfortunately, in early_cpu_detect(), this_cpu is not yet set, so we have to use the cpu_devs[] array directly. This patch is part of the Linux Tiny project, and is needed for further patch that will allow to disable compilation of unused CPU support code. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86, vsmp: use the paravirt helpersGlauber Costa
Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com> Acked-by: Shai Fultheim <shai@scalemp.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: introduce vsmp paravirt helpersGlauber Costa
Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com> Acked-by: Shai Fultheim <shai@scalemp.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: call vsmp_init explicitlyGlauber Costa
It becomes to early for ioremap, so we use early_ioremap Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com> Acked-by: Shai Fultheim <shai@scalemp.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: make vsmp_init void, instead of static intGlauber Costa
Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com> Acked-by: Shai Fultheim <shai@scalemp.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: change vsmp compile dependencyGlauber Costa
Change Makefile so vsmp_64.o object is dependent on PARAVIRT, rather than X86_VSMP Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ravikiran Thirumalai <kiran@scalemp.com> Acked-by: Shai Fultheim <shai@scalemp.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2008-04-17x86: apic: extended interrupt LVT support for AMDRobert Richter
Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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