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APM probing code for the new x86 setup code. This implements the
same functionality as the assembly version.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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A20 handling code for the new x86 setup code. This implements the same
algorithms as the assembly version.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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strcmp(), memcpy(), memset(), as well as routines to copy to and from
other segments (as pointed to by fs and gs).
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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A simple collection of bitops for the new x86 setup code.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Top header file for the new x86 setup code.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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gcc for i386 can be used with the assembly prefix ".code16gcc" to generate
16-bit (real-mode) code. This header file provides the assembly prefix.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Add CONFIG_PHYSICAL_ALIGN (currently as a hardcoded constant) to provide
consistency with i386. This value is manifest in the bzImage header.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Make struct boot_params a real structure, and remove the handling of
some obsolete fields, in particular hd*_info, which was only used by
the ST-506 driver, and likely to be wrong for that driver on any
modern BIOS.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Make definitions for struct e820entry and struct e820map
consistent between i386 and x86-64.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The relocatable kernel code needs a scratch field for the decompressor
to determine its own location. It was using a location inside
struct screen_info; reserve a free location and document it as scratch
instead.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Some Intel features are spread around in different CPUID leafs like 0x5,
0x6 and 0xA. Make this feature detection code common across i386 and
x86_64.
Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature
will be enabled automatically by current acpi-cpufreq driver.
Refer to Intel Software Developer's Manual for more details about the feature.
Thanks to hpa (H Peter Anvin) for the making the actual code detecting the
scattered features data-driven.
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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The X86_MINIMUM_CPU_MODEL name isn't really right, so change it to
X86_MINIMUM_CPU_FAMILY. Also, the default minimum should be 3, not 0.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Unify the handling of the CPU features vectors between i386 and x86-64.
This also adopts the collapsing of features which are required at
compile-time into constant tests from x86-64 to i386.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
[MIPS] PNX8550: Cleanup proc code.
[MIPS] WRPPMC: Fix build.
[MIPS] Yosemite: Fix modpost warnings.
[MIPS] Change names of local variables to silence sparse
[MIPS] SB1: Fix modpost warning.
[MIPS] PNX: Fix modpost warnings.
[MIPS] Alchemy: Fix modpost warnings.
[MIPS] Non-FPAFF: Fix warning.
[MIPS] DEC: Fix modpost warning.
[MIPS] MIPSsim: Enable MIPSsim virtual network driver.
[MIPS] Delete Ocelot 3 support.
[MIPS] remove LASAT Networks platforms support
[MIPS] Early check for SMTC kernel on non-MT processor
[MIPS] Add debugfs files to show fpuemu statistics
[MIPS] Add some debugfs files to debug unaligned accesses
[MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
[MIPS] tc35815: Load MAC address via platform_device
[MIPS] Move FPU affinity code into separate file.
[MIPS] Make ioremap() work on TX39/49 special unmapped segment
[MIPS] rbtx4938: Update and minimize defconfig
...
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Here's a slightly cleaner way of creating the /proc structure for the
pnx8850. mostly, it creates a directory with default mode 555, since the
one you're creating is mode 444, which is somewhat unusual for a directory
under /proc.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Using another systems defines is a safe way to get your code broken by
accident when that system is removed.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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MODPOST vmlinux
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x974): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x980): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x978): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x984): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x98c): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
WARNING: arch/mips/pmc-sierra/yosemite/built-in.o(.text+0x990): Section mismatch: reference to .init.data: (between 'prom_boot_secondary' and 'prom_cpus_done')
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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MODPOST vmlinux
WARNING: arch/mips/mm/built-in.o(.text+0x1978): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
WARNING: arch/mips/mm/built-in.o(.text+0x1988): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp')
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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MODPOST vmlinux
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd40): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
WARNING: arch/mips/philips/pnx8550/common/built-in.o(.text+0xd44): Section mismatch: reference to .init.data: (after 'pnx8550_platform_init')
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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MODPOST vmlinux
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1750): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
WARNING: arch/mips/au1000/common/built-in.o(.text+0x1754): Section mismatch: reference to .init.data: (between 'au1xxx_platform_init' and '__fixup_bigphys_addr')
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Export contents of struct mips_fpu_emulator_stats via debugfs.
There is no way to read these statistics for now but they (at least
the "emulated" count) might be sometimes useful for performance tuning
on FPU-less CPUs.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Currently a number of unaligned instructions is counted but not used.
Add /debug/mips/unaligned_instructions file to show the value.
And add /debug/mips/unaligned_action to control behavior upon an
unaligned access. Possible actions are:
0: silently fixup the unaligned access.
1: send SIGBUS.
2: dump registers, process name, etc. and fixup.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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* Fix pci ops for secondary PCIC
* Do not reserve 1MB for PCI MEM region (leave PCIBIOS_MIN_MEM zero)
* Use platform_device to provide ethernet addresses for internal NICs.
(background: TX49XX SoCs include PCI NIC (TC35815 compatible)
connected via its internal PCI bus, but the NIC's PROM interface is
not connected to SEEPROM. So we must provide its ethernet address
by another way.)
* Check return value of early_read_config_word()
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Gets rid of some of the CONFIG_MIPS_MT_FPAFF #ifdefery.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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TX39XX and TX49XX have "reserved" segment in CKSEG3 area.
0xff000000-0xff3fffff on TX49XX and 0xff000000-0xfffeffff on TX39XX
are reserved (unmapped, uncached). Controllers on these SoCs are
placed in this segment.
This patch add plat_ioremap() and plat_iounmap() to override default
behavior and implement these hooks for TX39/TX49.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Use rtc-rs5c348 and at25 spi protocol driver and spi_txx9 spi
controller driver instead of platform dependent codes.
This patch also removes dependencies to old RTC interfaces such as
rtc_mips_get_time, etc.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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GPIO 0..15 are for TX4938 PIO pins, GPIO 16..18 are for FPGA-driven
chipselect signals for SPI devices.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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- use RTC_CLASS instead of GEN_RTC
- get rid of ds1216 in favour of a RTC_CLASS driver
- use correct console device for older RM400
- use physical addresses for 82596 device
- use 128 byte L1 cache line size (this is needed because most of the
SNI caches are using 128 L2 cache lines)
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Patch to add default configuration for the PMC-Sierra
MSP71xx devices.
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Patch to add PCI support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Patch to add mips common support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Patch to add core platform support for the PMC-Sierra MSP71xx devices.
Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Songmao Tian <tiansm@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Fuxin Zhang <zhangfx@lemote.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
delete mode 100644 arch/mips/configs/ocelot_c_defconfig
delete mode 100644 arch/mips/momentum/ocelot_c/Makefile
delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c
delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c
delete mode 100644 arch/mips/momentum/ocelot_c/irq.c
delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h
delete mode 100644 arch/mips/momentum/ocelot_c/platform.c
delete mode 100644 arch/mips/momentum/ocelot_c/prom.c
delete mode 100644 arch/mips/momentum/ocelot_c/reset.c
delete mode 100644 arch/mips/momentum/ocelot_c/setup.c
delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c
delete mode 100644 arch/mips/pci/fixup-ocelot-c.c
delete mode 100644 arch/mips/pci/pci-ocelot-c.c
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This is to break the code of people who think they are supposed to scribble
into the pci device structure - it's off limits.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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This is an optimised implementation of early printk() for the DECstation.
After the recent conversion to a MIPS-specific generic routine using a
character-by-character output the performance dropped significantly.
This change reverts to the previous speed -- even at 9600 bps of the
serial console the difference is visible with a naked eye; I presume for a
framebuffer it is even worse (it may depend on exactly which one is used
though).
Additionally the change includes a fix for a problem that the old
implementation had -- the format used would not actually limit the length
of the string output. This new implementation uses a local buffer to deal
with it -- even with this additional copying it is much faster than the
generic function.
Plus this driver is registered much earlier than the generic one,
allowing one to see critical messages, such as one about an incorrect CPU
setting used, that are produced beforehand. :-)
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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There are no I/O ports on the DECstation whatsoever in any configuration
as neither the CPU nor the peripheral buses used have a concept of such.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Enable Cobalt button support and change ATA driver from BLK_DEV_VIA82CXXX
to PATA_VIA..
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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Remove unused dump_tlb functions and cleanup some includes.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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