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2009-09-20x86, mtrr: Convert loop to a while based construct, avoid naked semicolonJoe Perches
Perhaps this is a more readable/standard form. Signed-off-by: Joe Perches <joe@perches.com> LKML-Reference: <1252945687.3937.14.camel@Joe-Laptop.home> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-19Revert 'x86: Fix system crash when loading with "reservetop" parameter'Yinghai Lu
After close looking, commit 8126dec3 will break: 1. some cpu feature in early stage too, like cpu_has_x2apic 2. will break built-in-command line 3. will break other memmap= and mem= 4. early_dbgp and early_console that will use early_ioremap to access mmio (?) So revert it. Reported-by: Hugh Dickins <hugh.dickins@tiscali.co.uk>, Cc: Linus Torvalds <torvalds@linux-foundation.org>, Cc: Andrew Morton <akpm@linux-foundation.org>, LKML-Reference: <4AB51DFD.2000904@kernel.org> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-19x86, mce: Fix compile warning in case of CONFIG_SMP=nAndreas Herrmann
Fix following compile warning: arch/x86/kernel/cpu/mcheck/mce_amd.c: In function 'threshold_create_bank': arch/x86/kernel/cpu/mcheck/mce_amd.c:492: warning: unused variable 'c' which shows up when kernel is compiled with CONFIG_SMP=n. Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com> LKML-Reference: <20090915151727.GB21670@alberich.amd.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-19x86, apic: Use logical flat on intel with <= 8 logical cpusSuresh Siddha
On Intel platforms, we can use logical flat mode if there are <= 8 logical cpu's (irrespective of physical apic id values). This will enable simplified and efficient IPI and device interrupt routing on such platforms. Fix the relevant comments while we are at it. We can clean up default_setup_apic_routing() by using apic->probe() but that is a different item. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: "yinghai@kernel.org" <yinghai@kernel.org> LKML-Reference: <1253327399.3948.747.camel@sbs-t61.sc.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-18x86: SGI UV: Map MMIO-High memory rangeJack Steiner
UV depends on the MMRHI space being identity mapped. The patch: x86: Make 64-bit efi_ioremap use ioremap on MMIO regions changed this to make efi regions at a different address using ioremap. Add the identity mapping to uv_system_init. ( Note this code was previously present but was deleted when BIOS added the ranges to the EFI map - previous efi code identify mapped the ranges. ) Signed-off-by: Jack Steiner <steiner@sgi.com> LKML-Reference: <20090909154339.GA7946@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-18x86: SGI UV: Add volatile semantics to macros that access chipset registersJack Steiner
Add volatile-semantics to the SGI UV read/write macros that are used to access chipset memory mapped registers. No direct references to volatile are made. Instead the readq/writeq macros are used. Signed-off-by: Jack Steiner <steiner@sgi.com> Cc: linux-mm@kvack.org Cc: dwalker@fifo99.com Cc: cfriesen@nortel.com LKML-Reference: <20090910143149.GA14273@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-18x86: SGI UV: Fix IPI macrosJack Steiner
The UV BIOS has changed the way interrupt remapping is being done. This affects the id used for sending IPIs. The upper id bits no longer need to be masked off. Signed-off-by: Jack Steiner <steiner@sgi.com> Cc: <stable@kernel.org> LKML-Reference: <20090909154104.GA25083@sgi.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-18x86: apic: Convert BUG() to BUG_ON()Daniel Walker
This was done using Coccinelle's BUG_ON semantic patch. Signed-off-by: Daniel Walker <dwalker@fifo99.com> Cc: Julia Lawall <julia@diku.dk> LKML-Reference: <1252777220-30796-1-git-send-email-dwalker@fifo99.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-18x86: Remove final bits of CONFIG_X86_OLD_MCEAndi Kleen
Caught by Linus. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Andi Kleen <ak@linux.intel.com> Cc: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Cc: Huang Ying <ying.huang@intel.com> Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Cc: Borislav Petkov <borislav.petkov@amd.com> [ fixed up context conflict manually. ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-17Merge branch 'x86-mce-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-mce-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (21 commits) x86, mce: Fix compilation with !CONFIG_DEBUG_FS in mce-severity.c x86, mce: CE in last bank prevents panic by unknown MCE x86, mce: Fake panic support for MCE testing x86, mce: Move debugfs mce dir creating to mce.c x86, mce: Support specifying raise mode for software MCE injection x86, mce: Support specifying context for software mce injection x86, mce: fix reporting of Thermal Monitoring mechanism enabled x86, mce: remove never executed code x86, mce: add missing __cpuinit tags x86, mce: fix "mce" boot option handling for CONFIG_X86_NEW_MCE x86, mce: don't log boot MCEs on Pentium M (model == 13) CPUs x86: mce: Lower maximum number of banks to architecture limit x86: mce: macros to compute banks MSRs x86: mce: Move per bank data in a single datastructure x86: mce: Move code in mce.c x86: mce: Rename CONFIG_X86_NEW_MCE to CONFIG_X86_MCE x86: mce: Remove old i386 machine check code x86: mce: Update X86_MCE description in x86/Kconfig x86: mce: Make CONFIG_X86_ANCIENT_MCE dependent on CONFIG_X86_MCE x86, mce: use atomic_inc_return() instead of add by 1 ... Manually fixed up trivial conflicts: Documentation/feature-removal-schedule.txt arch/x86/kernel/cpu/mcheck/mce.c
2009-09-17Merge branch 'sched-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (37 commits) sched: Fix SD_POWERSAVING_BALANCE|SD_PREFER_LOCAL vs SD_WAKE_AFFINE sched: Stop buddies from hogging the system sched: Add new wakeup preemption mode: WAKEUP_RUNNING sched: Fix TASK_WAKING & loadaverage breakage sched: Disable wakeup balancing sched: Rename flags to wake_flags sched: Clean up the load_idx selection in select_task_rq_fair sched: Optimize cgroup vs wakeup a bit sched: x86: Name old_perf in a unique way sched: Implement a gentler fair-sleepers feature sched: Add SD_PREFER_LOCAL sched: Add a few SYNC hint knobs to play with sched: Fix sync wakeups again sched: Add WF_FORK sched: Rename sync arguments sched: Rename select_task_rq() argument sched: Feature to disable APERF/MPERF cpu_power x86: sched: Provide arch implementations using aperf/mperf x86: Add generic aperf/mperf code x86: Move APERF/MPERF into a X86_FEATURE ... Fix up trivial conflict in arch/x86/include/asm/processor.h due to nearby addition of amd_get_nb_id() declaration from the EDAC merge.
2009-09-17Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, pat: don't use rb-tree based lookup in reserve_memtype() x86: Increase MIN_GAP to include randomized stack
2009-09-17Merge branch 'tracing-core-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'tracing-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (44 commits) vsnprintf: remove duplicate comment of vsnprintf softirq: add BLOCK_IOPOLL to softirq_to_name oprofile: fix oprofile regression: select RING_BUFFER_ALLOW_SWAP tracing: switch function prints from %pf to %ps vsprintf: add %ps that is the same as %pS but is like %pf tracing: Fix minor bugs for __unregister_ftrace_function_probe tracing: remove notrace from __kprobes annotation tracing: optimize global_trace_clock cachelines MAINTAINERS: Update tracing tree details ftrace: document function and function graph implementation tracing: make testing syscall events a separate configuration tracing: remove some unused macros ftrace: add compile-time check on F_printk() tracing: fix F_printk() typos tracing: have TRACE_EVENT macro use __flags to not shadow parameter tracing: add static to generated TRACE_EVENT functions ring-buffer: typecast cmpxchg to fix PowerPC warning tracing: add filter event logic to special, mmiotrace and boot tracers tracing: remove trace_event_types.h tracing: use the new trace_entries.h to create format files ...
2009-09-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-2.6: sparc: Update defconfigs. sparc: Kill PROM console driver.
2009-09-17Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (51 commits) MIPS: BCM63xx: Add integrated ethernet mac support. MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs. MIPS: BCM63xx: Add Broadcom 63xx CPU definitions. MIPS: Octeon: Move some platform device registration to its own file. MIPS: Don't corrupt page tables on vmalloc fault. MIPS: Shrink the size of tlb handler MIPS: Alchemy: override loops_per_jiffy detection MIPS: hw_random: Add hardware RNG for Octeon SOCs. MIPS: Octeon: Add hardware RNG platform device. MIPS: Remove useless zero initializations. MIPS: Alchemy: get rid of allow_au1k_wait MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds. MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC. MIPS: Get rid of CONFIG_CPU_HAS_LLSC MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC MIPS: Rewrite clearing of ll_bit on context switch in C MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assembler MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file. MIPS: Clean up linker script using new linker script macros. MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE. ...
2009-09-17Merge branch 'x86/pat' into x86/urgentH. Peter Anvin
Merge reason: Suresh Siddha (1): x86, pat: don't use rb-tree based lookup in reserve_memtype() ... requires previous x86/pat commits already pushed to Linus. Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-09-17x86, pat: don't use rb-tree based lookup in reserve_memtype()Suresh Siddha
Recent enhancement of rb-tree based lookup exposed a bug with the lookup mechanism in the reserve_memtype() which ensures that there are no conflicting memtype requests for the memory range. memtype_rb_search() returns an entry which has a start address <= new start address. And from here we traverse the linear linked list to check if there any conflicts with the existing mappings. As the rbtree is based on the start address of the memory range, it is quite possible that we have several overlapped mappings whose start address is much less than new requested start but the end is >= new requested end. This results in conflicting memtype mappings. Same bug exists with the old code which uses cached_entry from where we traverse the linear linked list. But the new rb-tree code exposes this bug fairly easily. For now, don't use the memtype_rb_search() and always start the search from the head of linear linked list in reserve_memtype(). Linear linked list for most of the systems grow's to few 10's of entries(as we track memory type of RAM pages using struct page). So we should be ok for now. We still retain the rbtree and use it to speed up free_memtype() which doesn't have the same bug(as we know what exactly we are searching for in free_memtype). Also use list_for_each_entry_from() in free_memtype() so that we start the search from rb-tree lookup result. Reported-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> LKML-Reference: <1253136483.4119.12.camel@sbs-t61.sc.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-09-17oprofile: fix oprofile regression: select RING_BUFFER_ALLOW_SWAPChristian Borntraeger
commit 85bac32c4a52c592b857f2c360cc5ec93a097d70 ring-buffer: only enable ring_buffer_swap_cpu when needed broke oprofile (at least on s390, but likely on all platforms). this patch lets oprofile select RING_BUFER_ALLOW_SWAP to make ring_buffer_swap_cpu usable for oprofile. Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> LKML-Reference: <200909162156.49239.borntraeger@de.ibm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Robert Richter <robert.richter@amd.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2009-09-17Merge branch 'linus' into tracing/coreIngo Molnar
Merge reason: Pick up kernel/softirq.c update for dependent fix. Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-09-17MIPS: BCM63xx: Add integrated ethernet mac support.Maxime Bizon
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: BCM63xx: Add support for the Broadcom BCM63xx family of SOCs.Maxime Bizon
Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.Maxime Bizon
Todo: Nothing ever detects CPU_BCM6338 but the code tests for it anyway. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Octeon: Move some platform device registration to its own file.David Daney
There is a bunch of platform device registration in arch/mips/cavium-octeon/setup.c. We move it to its own file in preparation for adding more platform devices. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Don't corrupt page tables on vmalloc fault.David Daney
The code after the vmalloc_fault: label in do_page_fault() modifies user page tables, this is not correct for 64-bit kernels. For 64-bit kernels we should go straight to the no_context handler skipping vmalloc_fault. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Shrink the size of tlb handlerWu Fei
By combining swapper_pg_dir and module_pg_dir, several if conditions can be eliminated from the tlb exception handler. The reason they can be combined is that, the effective virtual address of vmalloc returned is at the bottom, and of module_alloc returned is at the top. It also fixes the bug in vmalloc(), which happens when its return address is not covered by the first pgd. Signed-off-by: Wu Fei <at.wufei@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Alchemy: override loops_per_jiffy detectionManuel Lauss
loops_per_jiffy depends on coreclk speed; preset it instead of letting the kernel waste precious microseconds trying to approximate it. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Octeon: Add hardware RNG platform device.David Daney
Add a platform device for the Octeon Random Number Generator (RNG). Signed-off-by: David Daney <ddaney@caviumnetworks.com> Acked-by: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Remove useless zero initializations.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Alchemy: get rid of allow_au1k_waitManuel Lauss
Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the Alchemy-specific wait code before timer initialization; if the C0 timer must be used for timekeeping the wait function is set to NULL which means no wait implementation is available. As a sideeffect, the 'wait instruction available' output in /proc/cpuinfo now correctly indicates whether 'wait' is usable. Run-tested on DB1200. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Octeon: Set kernel_uses_llsc to false on non-SMP builds.David Daney
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney
On some CPUs, it is more efficient to disable and enable interrupts in the kernel rather than use ll/sc for atomic operations. But if we were to set cpu_has_llsc to false, we would break the userspace futex interface (in asm/futex.h). We separate the two concepts, with a new predicate kernel_uses_llsc, that lets us disable the kernel's use of ll/sc while still allowing the futex code to use it. Also there were a couple of cases in bitops.h where we were using ll/sc unconditionally even if cpu_has_llsc were false. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Get rid of CONFIG_CPU_HAS_LLSCRalf Baechle
CONFIG_CPU_HAS_LLSC duplicated the function of cpu_has_llsc for no good reason and and the results if the one was enabled and the other disabled was very unobvious. Remove it now that there are no more remaining users. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSCRalf Baechle
All CPUs for Malta support LL/SC. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Rewrite clearing of ll_bit on context switch in CRalf Baechle
This also means there is now only one implementation not 3 left. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Rewrite sysmips(MIPS_ATOMIC_SET, ...) in C with inline assemblerRalf Baechle
This way it doesn't have to use CONFIG_CPU_HAS_LLSC anymore. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Consolidate all CONFIG_CPU_HAS_LLSC use in a single C file.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Clean up linker script using new linker script macros.Nelson Elhage
This patch results in fewer output sections and in some data being reordered, but should have no functional impact. Signed-off-by: Nelson Elhage <nelhage@ksplice.com> Signed-off-by: Tim Abbott <tabbott@ksplice.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Use PAGE_SIZE in assembly instead of _PAGE_SIZE.Nelson Elhage
Now that PAGE_SIZE is available to assembly directly, there is no need to separately expose it as _PAGE_SIZE through asm-offsets. In addition, remove _PAGE_SHIFT from asm-offsets, since it was never needed, and is not used anywhere. Signed-off-by: Nelson Elhage <nelhage@ksplice.com> Signed-off-by: Tim Abbott <tabbott@ksplice.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Convert to asm-generic/hardirq.hChristoph Hellwig
Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: AR7: Make board code register ar7_wdt as a platform deviceFlorian Fainelli
This patch makes the board code register the ar7_wdt driver as a platform device. We move the dynamic resource calculation here since the driver should not be aware of the AR7 SoC version it is running on. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Update the default config file for fuloong2eWu Zhangjin
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Add GCC 4.4 support for Loongson2EWu Zhangjin
Because only gcc >=4.4 have loongson-specific support, we need to choose the suitable -march argument for gcc <= 4.3 and gcc >= 4.4, and here, we use -march=loongson2e for loongson2e. Thanks goes to Arnaud Patard <apatard@mandriva.com> for suggestion of using cc-options(Documentation/kbuild/makefiles.txt). and thanks Zhang Le for introducing the new CPU_LOONGSON2E kernel option. NOTE: -mtune option is not need if -march and -mtune use the same value. Signed-off-by: Zhang Le <r0bertz@gentoo.org> Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Add a machtype kernel command line argumentWu Zhangjin
The difference between some loongson-based machines is very small, so, if there is no necessary to add new kernel config options to cope with this difference, it will be better to share the same kernel image file between them, benefit from this, the linux distribution developers only have a need to compile the kernel one time. This machtype kernel command line argument will be used later to share the same kernel image file between two different machines(menglong & yeeloong) made by lemote. Thanks very much to Zhang Le for cleaning up the machtype implementation. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Split common loongson source code outWu Zhangjin
To share common loongson source code between all of the loongson-based machines. there is a need to split it out of the fuloong-2e/ directory. at the same time, other according tuning is needed. the machine-specific parts are defined as macros in relative header file, pci.h, mem.h, machine.h. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Change naming methodsWu Zhangjin
To make source code of loongson sharable to the machines(such as gdium) made by the other companies, we rename arch/mips/lemote to arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to FULOONG2E to make it distinguishable to the future FULOONG2F. and also, some other relative tuning is needed. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Add oprofile supportWu Zhangjin
This kernel support is needed by the user-space tool:oprofile to profile linux kernel or applications via loongson2 performance counters. you can enable this driver via CONFIG_OPROFILE = y or m. On Loongson2 there are two performance counters, each one can count 16 events respectively. when anyone of the performance counter overflows, an interrupt will be generated and is routed to the IRQ MIPS_CPU_IRQ_BASE + 6. Signed-off-by: Yanhua <yanh@lemote.com> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: RTC: Enable legacy RTC driver on fulongWu Zhangjin
RTC_LIB is selected by MIPS by default, and therefore, the legacy RTC driver is disabled. but fortunately, RTC_LIB not works on fulong, so, enabling the legcy RTC driver is needed, otherwise, the tools like hwclock will not work. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: PCI: Clean up pcimap setupWu Zhangjin
Fixup the wrong original comment of pcimap, and make the source code more understandable. and also, some new extra consideration is added in. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: clean up the coding styleWu Zhangjin
With the help of script/checkpatch.pl, i have cleaned up the coding style. 1. remove un-needed header files and tune some comments. 2. remove some un-needed { } add a new header file loongson.h: 3. move some common header files to loongson.h 4. move some common extern declartions to loongson.h and this new header file is needed for future loongson2f support. Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-09-17MIPS: Loongson: Split the implementation of prom and setup partsWu Zhangjin
This patch split the old initilization and setup implementation to several file, one file one logic function. the other main changes include: 1. as the script/checkpatch.pl suggests, use strict_strtol instead of simple_strtol in arch/mips/lemote/lm2e/cmdline.c 2. use the existed macros in asm/mips-boards/bonito64.h as the arguments of set_io_port_base() and remove the un-needed ones in asm/mach-lemote/pci.h Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>