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2009-08-05OMAP4: UART: cleanup special case IRQ handlingKevin Hilman
Streamline the OMAP4 special IRQ assignments by putting inside normal init loop instead of having a separate loop. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP3: PM: Do not build suspend code if SUSPEND is not enabledKevin Hilman
Signed-off-by: Jouni Hogander <jouni.hogander@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP3: PM: prevent module wakeups from waking IVA2Kevin Hilman
By default, prevent functional wakeups from inside a module from waking up the IVA2. Let DSP Bridge code handle this when loaded. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP3: PM: Clear pending PRCM reset flags on initKevin Hilman
Any pending reset flags can prevent retention. Ensure they are all cleared during boot. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP3: PM: Ensure PRCM interrupts are cleared at bootKevin Hilman
Any pending PRCM interrupts can prevent retention. Ensure they are cleared during boot. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP3: PM: CM_REGADDR macros using wrong nameKevin Hilman
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-08-05OMAP2/3: PM: make PM __init calls staticKevin Hilman
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-07-30Merge branch 'next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: dmaengine: at_hdmac: add DMA slave transfers dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller dmaengine: dmatest: correct thread_count while using multiple thread per channel dmaengine: dmatest: add a maximum number of test iterations drivers/dma: Remove unnecessary semicolons drivers/dma/fsldma.c: Remove unnecessary semicolons dmaengine: move HIGHMEM64G restriction to ASYNC_TX_DMA fsldma: do not clear bandwidth control bits on the 83xx controller fsldma: enable external start for the 83xx controller fsldma: use PCI Read Multiple command
2009-07-30Merge branch 'merge' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc: Update defconfigs for embedded 6xx/7xxx, 8xx, 8{3,5,6}xxx powerpc/86xx: Update GE Fanuc sbc310 default configuration powerpc/86xx: Update defconfig for GE Fanuc's PPC9A cpm_uart: Don't use alloc_bootmem in cpm_uart_cpm2.c powerpc/83xx: Fix PCI IO base address on MPC837xE-RDB boards powerpc/85xx: Don't scan for TBI PHY addresses on MPC8569E-MDS boards powerpc/85xx: Fix ethernet link detection on MPC8569E-MDS boards powerpc/mm: Fix SMP issue with MMU context handling code
2009-07-30lguest: update commentryRusty Russell
Every so often, after code shuffles, I need to go through and unbitrot the Lguest Journey (see drivers/lguest/README). Since we now use RCU in a simple form in one place I took the opportunity to expand that explanation. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@redhat.com> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
2009-07-30lguest: fix comment styleRusty Russell
I don't really notice it (except to begrudge the extra vertical space), but Ingo does. And he pointed out that one excuse of lguest is as a teaching tool, it should set a good example. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@redhat.com>
2009-07-29powerpc: Update defconfigs for embedded 6xx/7xxx, 8xx, 8{3,5,6}xxxKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/86xx: Update GE Fanuc sbc310 default configurationMartyn Welch
General update of defconfig including the following notable changes: - Enable Highmem support. - Support for PCMCIA based daughter card. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/86xx: Update defconfig for GE Fanuc's PPC9AMartyn Welch
General update of defconfig including the following notable changes: - Enable GPIO access via sysfs on GE Fanuc's PPC9A. - Enable Highmem support. - Support for PCMCIA based daughter card. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/83xx: Fix PCI IO base address on MPC837xE-RDB boardsAnton Vorontsov
U-Boot maps PCI IO at 0xe0300000, while current dts files specify 0xe2000000. This leads to the following oops with CONFIG_8139TOO_PIO=y. 8139too Fast Ethernet driver 0.9.28 Machine check in kernel mode. Caused by (from SRR1=41000): Transfer error ack signal Oops: Machine check, sig: 7 [#1] MPC837x RDB [...] NIP [00000900] 0x900 LR [c0439df8] rtl8139_init_board+0x238/0x524 Call Trace: [cf831d90] [c0439dcc] rtl8139_init_board+0x20c/0x524 (unreliable) [cf831de0] [c043a15c] rtl8139_init_one+0x78/0x65c [cf831e40] [c0235250] pci_call_probe+0x20/0x30 [...] This patch fixes the issue by specifying the correct PCI IO base address. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/85xx: Don't scan for TBI PHY addresses on MPC8569E-MDS boardsAnton Vorontsov
Sometimes (e.g. when there are no UEMs attached to a board) fsl_pq_mdio_find_free() fails to find a spare address for a TBI PHY, this is because get_phy_id() returns bogus 0x0000ffff values (0xffffffff is expected), and therefore mdio bus probing fails with the following message: fsl-pq_mdio: probe of e0082120.mdio failed with error -16 And obviously ethernet doesn't work after this. This patch solves the problem by adding tbi-phy node into mdio node, so that we won't scan for spare addresses, we'll just use a fixed one. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/85xx: Fix ethernet link detection on MPC8569E-MDS boardsAnton Vorontsov
Linux isn't able to detect link changes on ethernet ports that were used by U-Boot. This is because U-Boot wrongly clears interrupt polarity bit (INTPOL, 0x400) in the extended status register (EXT_SR, 0x1b) of Marvell PHYs. There is no easy way for PHY drivers to know IRQ line polarity (we could extract it from the device tree and pass it to phydevs, but that'll be quite a lot of work), so for now just reset the PHYs to their default states. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29powerpc/mm: Fix SMP issue with MMU context handling codeKumar Gala
In switch_mmu_context() if we call steal_context_smp() to get a context to use we shouldn't fall through and than call steal_context_up(). Doing so can be problematic in that the 'mm' that steal_context_up() ends up using will not get marked dirty in the stale_map[] for other CPUs that might have used that mm. Thus we could end up with stale TLB entries in the other CPUs that can cause all kinda of havoc. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-29Merge branch 'drm-radeon-kms' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 * 'drm-radeon-kms' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6: (35 commits) drm/radeon: set fb aperture sizes for framebuffer handoff. drm/ttm: fix highuser vs dma32 confusion. drm/radeon: Fix size used for benchmarking BO copies. drm/radeon: Add radeon.test parameter for running BO GPU copy tests. drm/radeon/kms: allow interruptible waits for objects. drm/ttm: powerpc: Fix Highmem cache flushing. x86: Export kmap_atomic_prot() needed for TTM. drm/ttm: Fix ttm in-kernel copying of pages with non-standard caching attributes. drm/ttm: Fix an oops and sync object leak. drm/radeon/kms: vram sizing on certain r100 chips needs workaround. drm/radeon: Pay more attention to object placement requested by userspace. drm/radeon: Fall back to evicting BOs with memcpy if necessary. drm/radeon: Don't unreserve twice on failure to validate. drm/radeon/kms: fix bandwidth computation on avivo hardware drm/radeon/kms: add initial colortiling support. drm/radeon/kms: fix hotspot handling on pre-avivo chips drm/radeon/kms: enable frac fb divs on rs600/rs690/rs740 drm/radeon/kms: add PLL flag to prefer frequencies <= the target freq drm/radeon/kms: block RN50 from using 3D engine. drm/radeon/kms: fix VRAM sizing like DDX does it. ...
2009-07-29x86: Export kmap_atomic_prot() needed for TTM.Thomas Hellstrom
This functionality is needed to kmap_atomic() highmem pages that may potentially have or are about to set up other mappings with non-standard caching attributes. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-07-27mm: Remove duplicate definitions in MIPS and SHBenjamin Herrenschmidt
Those definitions are already provided by asm-generic Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-27Merge branch 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblazeLinus Torvalds
* 'fixes-for-linus' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Makefile cleanup microblaze: Typo fix for cpu param inconsistency microblaze: Add support for R_MICROBLAZE_64_NONE microblaze: Get module loading working microblaze: remove sys_ipc microblaze: Support unaligned address for put/get_user macros microblaze: Detect new Microblaze 7.20 versions microblaze: Fix do_page_fault for no context microblaze: Add _PAGE_FILE macros to pgtable.h microblaze: Fix put_user macro for 64bits arguments microblaze: Clear print messages for DTB passing via r7 microblaze: Not to clear r7 after copying DTB to kernel microblaze: Add messages about FDT blob microblaze: Final support for statically linked DTB microblaze: remove duplicated #include microblaze: Define tlb_flush macro
2009-07-27Merge branch 'x86-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86: geode: Mark mfgpt irq IRQF_TIMER to prevent resume failure x86, amd: Don't probe for extended APIC ID if APICs are disabled x86, mce: Rename incorrect macro name "CONFIG_X86_THRESHOLD" x86-64: Fix bad_srat() to clear all state x86, mce: Fix set_trigger() accessor x86: Fix movq immediate operand constraints in uaccess.h x86: Fix movq immediate operand constraints in uaccess_64.h x86: Add reboot fixup for SBC-fitPC2 x86: Include all of .data.* sections in _edata on 64-bit x86: Add quirk for Intel DG45ID board to avoid low memory corruption
2009-07-27Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6Linus Torvalds
* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6: [S390] zcrypt: fix scheduling of hrtimer ap_poll_timer [S390] vdso: clock_gettime of CLOCK_THREAD_CPUTIME_ID with noexec=on [S390] vdso: fix per cpu area allocation [S390] hibernation: fix register corruption on machine checks [S390] hibernation: fix lowcore handling
2009-07-27mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()Benjamin Herrenschmidt
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb() Upcoming paches to support the new 64-bit "BookE" powerpc architecture will need to have the virtual address corresponding to PTE page when freeing it, due to the way the HW table walker works. Basically, the TLB can be loaded with "large" pages that cover the whole virtual space (well, sort-of, half of it actually) represented by a PTE page, and which contain an "indirect" bit indicating that this TLB entry RPN points to an array of PTEs from which the TLB can then create direct entries. Thus, in order to invalidate those when PTE pages are deleted, we need the virtual address to pass to tlbilx or tlbivax instructions. The old trick of sticking it somewhere in the PTE page struct page sucks too much, the address is almost readily available in all call sites and almost everybody implemets these as macros, so we may as well add the argument everywhere. I added it to the pmd and pud variants for consistency. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV] Acked-by: Nick Piggin <npiggin@suse.de> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-07-27microblaze: Makefile cleanupSam Ravnborg
Reviewed the Makefile on request by Michal and this is the resulting changes. o Use ':=' for assignmnet so we do not re-evaluate for each use o Use $(shell echo xxx) to remove "" o Replaced CFLAGS_KERNEL with KBUILD_CFLAGS The settings are equally relevant for modules and the linked kernel o Dropped LDFLAGS_BLOB - it is no longer used o Refactored assignmnets to libs-y and core-y o Use MMU for the MMU specific extension. "MMUEXT" was hurting my eyes and I did not wanted it spread to m68k Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Typo fix for cpu param inconsistencyMichal Simek
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Add support for R_MICROBLAZE_64_NONEMichal Simek
For example reiserfs use this relocation type. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Get module loading workingJohn Williams
New reloc type R_MICROBLAZE_32_PCREL_LO requires a null handler (no work to do). Remove legacy hack for broken linker pre gcc-4.1.1, that required us to extract an offset from the code, add it to the addend, then rewrite the instruction. Fixup the invalid reloc type error output. Boot tested with the xilinx_emaclite ethernet driver. Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: remove sys_ipcArnd Bergmann
The ipc system call is now unused in microblaze, as the system call table points directly to the indidual system calls for IPC. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Support unaligned address for put/get_user macrosMichal Simek
This patch add support for cases where load/store instruction in put/get_user macro gets unaligned pointer to data and this address is not valid. I prevent all cases which can failed. I had to disable first stage of unaligned handler which is used only for noMMU kernel and the whole work is done when interrupt is enabled. You have enable HW support for detect unaligned access in Microblaze. This patch fixed three LTP tests: getpeername01, getsockname01, socketpair01 Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Detect new Microblaze 7.20 versionsMichal Simek
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Fix do_page_fault for no contextMichal Simek
Calling fixup when we are in kernel mode. This prevent fault for copy_to/from_user. This fault was find thanks to writev01/03/04 LTP tests. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Add _PAGE_FILE macros to pgtable.hMichal Simek
We need to define _PAGE_FILE macro and change pte functions. Microblaze use the same MMU as PowerPC that's why we define _PAGE_FILE in the same style. This change fixed remap_file_pages01 LTP test. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Fix put_user macro for 64bits argumentsMichal Simek
For 64bits arguments gcc caused that put_user macro works with wrong value because of optimalization. Adding volatile caused that gcc not optimized it. It is possible to use (as Blackfin do) two put_user macros with 32bits arguments but there is one more instruction which is due to duplication zero return value which is called put_user_asm macro. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Clear print messages for DTB passing via r7Michal Simek
It is necessary to zeroed r7 when r7 points to bad dtb - this caused that we have correct messages about compiled-in dtb or passing via r7 Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Not to clear r7 after copying DTB to kernelMichal Simek
I can't clear r7 because if I do it I lose information where DTB come from. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Add messages about FDT blobMichal Simek
Print accurate message about place where FDT blob is. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Final support for statically linked DTBJohn Williams
If r7 is zero at kernel boot, or does not point to a valid DTB, then we fall back to a DTB (assumed to be) linked statically in the kernel, instead of blindly copying bogus cruft into the kernel DTB memory region Signed-off-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: remove duplicated #includeHuang Weiyi
Remove duplicated #include('s) in arch/microblaze/include/asm/io.h Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-27microblaze: Define tlb_flush macroMichal Simek
This fix remove bug which we had till now in all Microblaze MMU code. Primary tested on mmap01 LTP test. We forget to flush invalid tlb which were changed - we used them and there were wrong old data which wasn't correct. Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-24[S390] vdso: clock_gettime of CLOCK_THREAD_CPUTIME_ID with noexec=onMartin Schwidefsky
The combination of noexec=on and a clock_gettime call with clock id CLOCK_THREAD_CPUTIME_ID is broken. The vdso code switches to the access register mode to get access to the per-cpu data structure to execute the magic ectg instruction. After the ectg instruction the code always switches back to the primary mode but for noexec=on the correct mode is the secondary mode. The effect of the bug is that the user space program looses the access to all mappings without PROT_EXEC, e.g. the stack. The problem is fixed by restoring the mode that has been active before the switch to the access register mode. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2009-07-24[S390] vdso: fix per cpu area allocationHeiko Carstens
vdso per cpu area allocation in smp_prepare_cpus() happens with GFP_KERNEL but irqs disabled. Triggers this one: Badness at kernel/lockdep.c:2280 Modules linked in: CPU: 0 Not tainted 2.6.30 #2 Process swapper (pid: 1, task: 000000003fe88000, ksp: 000000003fe87eb8) Krnl PSW : 0400c00180000000 0000000000083360 (lockdep_trace_alloc+0xec/0xf8) [...] Call Trace: ([<00000000000832b6>] lockdep_trace_alloc+0x42/0xf8) [<00000000000b1880>] __alloc_pages_internal+0x3e8/0x5c4 [<00000000000b1b4a>] __get_free_pages+0x3a/0xb0 [<0000000000026546>] vdso_alloc_per_cpu+0x6a/0x18c [<00000000005eff82>] smp_prepare_cpus+0x322/0x594 [<00000000005e8232>] kernel_init+0x76/0x398 [<000000000001bb1e>] kernel_thread_starter+0x6/0xc [<000000000001bb18>] kernel_thread_starter+0x0/0xc Fix this by moving the allocation out of the irqs disabled section. Reported-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2009-07-24[S390] hibernation: fix register corruption on machine checksHeiko Carstens
swsusp_arch_suspend() actually saves all cpu register contents on hibernation. Machine checks must be disabled since swsusp_arch_suspend() stores register contents to their lowcore save areas. That's the same place where register contents on machine checks would be saved. To avoid register corruption disable machine checks. We must also disable machine checks in the new psw mask for program checks, since swsusp_arch_suspend() may generate program checks. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2009-07-24[S390] hibernation: fix lowcore handlingHeiko Carstens
Our swsusp_arch_suspend() backend implementation disables prefixing by setting the contents of the prefix register to 0. However afterwards common code functions are called which might access percpu data structures. Since the lowcore contains e.g. the percpu base pointer this isn't a good idea. So fix this by copying the hibernating cpu's lowcore to absolute address zero. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2009-07-24x86: geode: Mark mfgpt irq IRQF_TIMER to prevent resume failureThomas Gleixner
Timer interrupts are excluded from being disabled during suspend. The clock events code manages the disabling of clock events on its own because the timer interrupt needs to be functional before the resume code reenables the device interrupts. The mfgpt timer request its interrupt without setting the IRQF_TIMER flag so suspend_device_irqs() disables it as well which results in a fatal resume failure. Adding IRQF_TIMER to the interupt flags when requesting the mrgpt timer interrupt solves the problem. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> LKML-Reference: <new-submission> Cc: Andres Salomon <dilinger@debian.org> Cc: stable@kernel.org
2009-07-22dmaengine: at_hdmac: add DMA slave transfersNicolas Ferre
This patch for at_hdmac adds the slave transfers capability to the Atmel DMA controller available on some AT91 SOCs. This allow peripheral to memory and memory to peripheral transfers with hardware handshaking. Slave structure for controller specific information is passed through channel private data. This at_dma_slave structure is defined in at_hdmac.h header file and relative hardware definition are moved to this file from at_hdmac_regs.h. Doing this we allow the channel configuration from platform definition code. This work is intensively based on dw_dmac and several slave implementations. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-07-22dmaengine: at_hdmac: new driver for the Atmel AHB DMA ControllerNicolas Ferre
This AHB DMA Controller (aka HDMA or DMAC on AT91 systems) is availlable on at91sam9rl chip. It will be used on other products in the future. This first release covers only the memory-to-memory tranfer type. This is the only tranfer type supported by this chip. On other products, it will be used also for peripheral DMA transfer (slave API support to come). I used dmatest client without problem in different configurations to test it. Full documentation for this controller can be found in the SAM9RL datasheet: http://www.atmel.com/dyn/products/product_card.asp?part_id=4243 Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2009-07-22Merge branch 'perf-counters-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf * 'perf-counters-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf: (31 commits) perf_counter tools: Give perf top inherit option perf_counter tools: Fix vmlinux symbol generation breakage perf_counter: Detect debugfs location perf_counter: Add tracepoint support to perf list, perf stat perf symbol: C++ demangling perf: avoid structure size confusion by using a fixed size perf_counter: Fix throttle/unthrottle event logging perf_counter: Improve perf stat and perf record option parsing perf_counter: PERF_SAMPLE_ID and inherited counters perf_counter: Plug more stack leaks perf: Fix stack data leak perf_counter: Remove unused variables perf_counter: Make call graph option consistent perf_counter: Add perf record option to log addresses perf_counter: Log vfork as a fork event perf_counter: Synthesize VDSO mmap event perf_counter: Make sure we dont leak kernel memory to userspace perf_counter tools: Fix index boundary check perf_counter: Fix the tracepoint channel to perfcounters perf_counter, x86: Extend perf_counter Pentium M support ...
2009-07-22x86, amd: Don't probe for extended APIC ID if APICs are disabledJeremy Fitzhardinge
If we've logically disabled apics, don't probe the PCI space for the AMD extended APIC ID. [ Impact: prevent boot crash under Xen. ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Reported-by: Bastian Blank <bastian@waldi.eu.org> Signed-off-by: H. Peter Anvin <hpa@zytor.com>