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2007-05-12[POWERPC] Add bootwrapper support for Motorola PrPMC2800 platformMark A. Greer
The Motorola PrPMC280 and PrPMC2800 processor modules sit on an F101 or PrPMC2800 baseboard, respectively. There are several variants of each type of processor module which can have different amounts of memory, amounts of FLASH, cpu frequencies, and an mv64360 or an mv64362. The bootwrapper code for that platform reads VPD from an I2C EEPROM to determine the processor module variant. From the variant, the amount of memory, etc. is determined and the device tree is updated accordingly. If the variant cannot be determined (e.g., corrupted VPD or a previously unknown variant), the property values already in the device tree are used. Also, the firmware for those platforms does not completely configure the mv64x60 host bridge so that configuration is done here. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add DTS file for the Motorola PrPMC2800 platformMark A. Greer
Add the device tree source file for the prpmc2800 line of processor PMCs. Several of the property values are updated by the bootwrapper but sane defaults have been chosen in case the bootwrapper can't determine the exact processor board variant. The defaults should allow the kernel to boot despite having non-optimal device tree property values. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Check cache coherency of kernel vs firmwareDale Farnsworth
check_cache_coherency() verifies that the cache coherency setting of the kernel (CONFIG_NOT_COHERENT_CACHE) matches that left by the firmware, as indicated by coherency-off device tree property. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add Marvell mv64x60 PCI bridge supportDale Farnsworth
This patch adds PCI bridge support for the Marvell mv64x60 chip. We also provide the ability to read/write the mv64x60 hotswap register via sysfs if the hs_reg_valid property is set in the device tree. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Create Marvell mv64x60 I2C platform_dataDale Farnsworth
This patch creates platform_device entries for the Marvell mv64x60 I2C ports, based on information contained in device tree. This driver (like the other mv64x60 drivers) are unusual in that it works on both the MIPS and PowerPC architectures. Because of that, the drivers do not support the normal PowerPC of_platform_bus_type. They support platform_bus_type instead. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Create Marvell mv64x60 ethernet platform_dataDale Farnsworth
This patch creates platform_device entries for the Marvell mv64x60 ethernet controller ports, based on information contained in the device tree. This driver (like the other mv64x60 drivers) are unusual in that it works on both the MIPS and PowerPC architectures. Because of that, the drivers do not support the normal PowerPC of_platform_bus_type. They support platform_bus_type instead. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Create Marvell mv64x60 MPSC (serial) platform_dataDale Farnsworth
This patch creates platform_device entries for the Marvell mv64x60 MPSC (multi-protocol serial controller) ports, based on information contained in the device tree. This driver (like the other mv64x60 drivers) are unusual in that it works on both the MIPS and PowerPC architectures. Because of that, the drivers do not support the normal PowerPC of_platform_bus_type. They support platform_bus_type instead. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add interrupt support for Marvell mv64x60 chipsDale Farnsworth
There are 3 interrupt groups each with its own status/mask registers. We use a separate struct irq_chip for each interrupt group and handle interrupts in two stages or levels: level 1 selects the appropriate struct irq_chip, and level 2 selects individual interrupts within that irq_chip. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add bootwrapper support for Marvell/mv64x60 I2CMark A. Greer
Some platforms support a variety processor modules with no method of determining which exact processor module is being used except by examining Vital Product Data (VPD). The modules may have different amounts of memory, clock frequencies, etc. so reading the VPD becomes necessary to correctly set properties in the device tree before its passed to the kernel. Often the VPD is stored in I2C EEPROMs so an I2C driver becomes necessary. This I2C driver is for the I2C controller that's embedded on the Marvel mv64x60 line of host bridges. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add bootwrapper support for Marvell MPSCMark A. Greer
The bootwrapper requires a serial driver to allow cmdline editing and information reporting on the console. This driver is required by platforms that boot a zImage and use the MPSC for the console. Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add bootwrapper support for Marvell/mv64x60 hostbridgeMark A. Greer
The mv64x60 host bridge has many windows between its various components (cpu, system memory, ethernet ctlr, MPSC, DMA ctlr, PCI MEM, PCI I/O). Unfortunately, the firmware on some of mv64x60-based platforms do not properly or completely configure those windows (e.g., MPSC->system memory windows not configured or CPU->PCI MEM space not configured). So, the missing configuration needs to be done in either the bootwrapper or in the kernel. To keep the kernel as clean as possible, it is done in the bootwrapper. Note that I/O controller configuration is NOT being done, its only the windows to allow the I/O controllers and other components to access memory, etc. that is being done--drivers assume that their controllers can already access system memory). Table of routines and the windows they configure: mv64x60_config_ctlr_windows() ENET->System Memory MPSC->System Memory IDMA->System Memory mv64x60_config_pci_windows() PCI MEM->System Memory PCI I/O->Bridge's Registers mv64x60_config_cpu2pci_window() CPU->PCI MEM CPU->PCI I/O Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add Makefile rules to wrap dts file in zImageMark A. Greer
Add 'zImage.dts' and 'zImage.dts_initrd' build rules that automatically compile and wrap a dts file from arch/powerpc/boot/dts into the zImage file. The resulting zImage will be arch/powerpc/boot/zImage.dts.<platform> and arch/powerpc/boot/zImage.dts_initrd.<platform>, respectively. Having separate rules allows the user to choose whether to include a device tree--and which device tree--at build time. This is useful when one Makefile target builds a zImage that runs on several platforms except for differing device trees. By just setting CONFIG_DEVICE_TREE and running "make zImage.dts" the exact zImage you want is built without Makefile bloat or manually running the wrapper script. The dts file is expected to be arch/powerpc/boot/dts/$(CONFIG_DEVICE_TREE) Signed-off-by: Mark A. Greer <mgreer@mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Spelling fixes: arch/ppc/Simon Arlott
Spelling fixes in arch/ppc/. Signed-off-by: Simon Arlott <simon@fire.lp0.eu> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] U-boot passes the initrd as start/end, not start/size.Scott Wood
The boot wrapper platform init code on 83xx and 85xx using the cuboot platform type was incorrectly assuming that u-boot supplied the size of the initrd, whereas it actually supplies the end address. This fixes it. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] PS3: Update ps3_defconfigGeoff Levand
Update ps3_defconfig. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] PS3: Fix request_irq warningGeoff Levand
Fix compiler warning: ps3/smp.c:122: warning: ignoring return value of 'request_irq' Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Don't complain if size-cells == 0 in prom_parse()Kim Phillips
An mdio bus scan was added with ucc_geth phylib migration patches, now machines complain on boot, saying: prom_parse: Bad cell count for /qe@e0100000/mdio@2120/ethernet-phy@00 prom_parse: Bad cell count for /qe@e0100000/mdio@2120/ethernet-phy@01 since size-cells can indeed be 0, this patch fixes the check. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Simplify smp_space_timerswill schmidt
Greatly simplify the function smp_space_timers. The stolen time calculation (per comment within the code) doesn't need the half-jiffy stagger any more. There isn't an issue with bouncing off global locks, so we really shouldn't need any sort of staggering at all. However, the last_jiffy value still needs to be set. This removes the extra stagger logic, and just sets the values. This change should benefit applications that rely on barrier synchronization, and will help cut down OS jitter. Boot tested across the board (G5,power3,power4,power5,970mp blade). Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Trivial ps3 warning fixesStephen Rothwell
Fixes warnings: arch/powerpc/platforms/ps3/system-bus.c: In function 'ps3_map_sg': arch/powerpc/platforms/ps3/system-bus.c:278: warning: unused variable 'i' arch/powerpc/platforms/ps3/system-bus.c:277: warning: unused variable 'dev' arch/powerpc/platforms/ps3/setup.c:103: warning: 'prealloc' defined but not used Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Add missed includeStephen Rothwell
fixes: arch/powerpc/platforms/pasemi/idle.c: In function 'pasemi_system_reset_exception': arch/powerpc/platforms/pasemi/idle.c:55: warning: implicit declaration of function 'do_IRQ' Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Remove unused variable in hpte_decode()Stephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-12[POWERPC] Assign correct variable in hpte_decode()Stephen Rothwell
This case will never be hit, but it should be corrected anyway. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-05-11Merge branch 'release' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6 * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6: [IA64] Quicklist support for IA64 [IA64] fix Kprobes reentrancy [IA64] SN: validate smp_affinity mask on intr redirect [IA64] drivers/char/snsc_event.c:206: warning: unused variable `p' [IA64] mca.c:121: warning: 'cpe_poll_timer' defined but not used [IA64] Fix - Section mismatch: reference to .init.data:mvec_name [IA64] more warning cleanups [IA64] Wire up epoll_pwait and utimensat [IA64] Fix warnings resulting from type-checking in dev_dbg() [IA64] typo s/kenrel/kernel/
2007-05-11x86_64: Don't call mtrr_bp_init from identify_cpuAndi Kleen
The code was ok, but triggered warnings for calling __init from __cpuinit. Instead call it from check_bugs instead. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11x86_64: off-by-two error in aperture.cAndrew Hastings
I'm using a custom BIOS to configure the northbridge GART at address 0x80000000, size 2G. Linux complains: "Aperture from northbridge cpu 0 beyond 4GB. Ignoring." I think there's an off-by-two error in arch/x86_64/kernel/aperture.c: AK: use correct types for i386 Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11i386: Fix compilation of verify_cpu.S on old binutilsAndi Kleen
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-ip22Linus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-ip22: Convert SGI IP22 and specific drivers to platform_device.
2007-05-11Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (28 commits) [MIPS] Rework cobalt_board_id [MIPS] Use RTC_CMOS for Cobalt [MIPS] Use platform_device for Cobalt UART [MIPS] Separate Alchemy processor based boards config [MIPS] Fix build error in atomic64_cmpxchg [MIPS] Run checksyscalls for N32 and O32 ABI [MIPS] tlbex: use __maybe_unused [MIPS] excite: use __maybe_unused [MIPS] Add extern cobalt_board_id [MIPS] Remove unused CONFIG_TOSHIBA_BOARDS [MIPS] Rename tb0229_defconfig to tb0219_defconfig [MIPS] Update tb0229_defconfig; add CONFIG_GPIO_TB0219. [MIPS] Add minimum defconfig for RBHMA4200 [MIPS] SB1: Build fix. [MIPS] Drop __devinit tag from allocate_irqno() and free_irqno() [MIPS] clocksource: use CLOCKSOURCE_MASK() macro [MIPS] Remove LIMITED_DMA support [MIPS] Remove Momenco Jaguar ATX support [MIPS] Remove Momenco Ocelot G support [MIPS] FPU hazard handling ...
2007-05-11Merge branch 'audit.b38' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit-current * 'audit.b38' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/audit-current: [PATCH] Abnormal End of Processes [PATCH] match audit name data [PATCH] complete message queue auditing [PATCH] audit inode for all xattr syscalls [PATCH] initialize name osid [PATCH] audit signal recipients [PATCH] add SIGNAL syscall class (v3) [PATCH] auditing ptrace
2007-05-11[IA64] Quicklist support for IA64Christoph Lameter
IA64 is the origin of the quicklist implementation. So cut out the pieces that are now in core code and modify the functions called. Signed-off-by: Christoph Lameter <clameter@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-05-11[IA64] fix Kprobes reentrancyAnil S Keshavamurthy
In case of reentrance i.e when a probe handler calls a functions which inturn has a probe, we save a previous kprobe information and just single step the reentrant probe without calling the actual probe handler. During this reentracy period, if an interrupt occurs and if probe happens to trigger in the inturrupt path, then we were corrupting the previous kprobe( as we were overriding the previous kprobe info) info their by crashing the system. This patch fixes this issues by having a an array of previous kprobe info struct(with the array size of 2). This similar technique is not needed on i386 and x86_64 because by default interrupts are turn off in the break/int3 exception handler. Signed-off-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-05-11[IA64] SN: validate smp_affinity mask on intr redirectJohn Keller
On SN, only allow one bit to be set in the smp_affinty mask when redirecting an interrupt. Currently setting multiple bits is allowed, but only the first bit is used in determining the CPU to redirect to. This has caused confusion among some customers. [akpm@linux-foundation.org: fixes] Signed-off-by: John Keller <jpk@sgi.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
2007-05-11Convert SGI IP22 and specific drivers to platform_device.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11signal/timer/event: eventfd wire up x86 archesDavide Libenzi
This patch wires the eventfd system call to the x86 architectures. Signed-off-by: Davide Libenzi <davidel@xmailserver.org> Cc: Michael Kerrisk <mtk-manpages@gmx.net> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11signal/timer/event: timerfd wire up x86 archesDavide Libenzi
This patch wires the timerfd system call to the x86 architectures. Signed-off-by: Davide Libenzi <davidel@xmailserver.org> Cc: Andi Kleen <ak@suse.de> Cc: Michael Kerrisk <mtk-manpages@gmx.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11signal/timer/event: signalfd wire up x86 archesDavide Libenzi
This patch wires the signalfd system call to the x86 architectures. Signed-off-by: Davide Libenzi <davidel@xmailserver.org> Cc: Michael Kerrisk <mtk-manpages@gmx.net> Cc: Andi Kleen <ak@suse.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11powerpc: fixup hard_irq_disable semanticsBenjamin Herrenschmidt
This patch renames the raw hard_irq_{enable,disable} into __hard_irq_{enable,disable} and introduces a higher level hard_irq_disable() function that can be used by any code to enforce that IRQs are fully disabled, not only lazy disabled. The difference with the __ versions is that it will update some per-processor fields so that the kernel keeps track and properly re-enables them in the next local_irq_disable(); This prepares powerpc for my next patch that introduces hard_irq_disable() generically. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11uml: shrink kernel stacksJeff Dike
Make kernel stacks be 1 page on i386 and 2 pages on x86_64. These match the host values. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11uml: iRQ stacksJeff Dike
Add a separate IRQ stack. This differs from i386 in having the entire interrupt run on a separate stack rather than starting on the normal kernel stack and switching over once some preparation has been done. The underlying mechanism, is of course, sigaltstack. Another difference is that interrupts that happen in userspace are handled on the normal kernel stack. These cause a wait wakeup instead of a signal delivery so there is no point in trying to switch stacks for these. There's no other stuff on the stack, so there is no extra stack consumption. This quirk makes it possible to have the entire interrupt run on a separate stack - process preemption (and calls to schedule()) happens on a normal kernel stack. If we enable CONFIG_PREEMPT, this will need to be rethought. The IRQ stack for CPU 0 is declared in the same way as the initial kernel stack. IRQ stacks for other CPUs will be allocated dynamically. An extra field was added to the thread_info structure. When the active thread_info is copied to the IRQ stack, the real_thread field points back to the original stack. This makes it easy to tell where to copy the thread_info struct back to when the interrupt is finished. It also serves as a marker of a nested interrupt. It is NULL for the first interrupt on the stack, and non-NULL for any nested interrupts. Care is taken to behave correctly if a second interrupt comes in when the thread_info structure is being set up or taken down. I could just disable interrupts here, but I don't feel like giving up any of the performance gained by not flipping signals on and off. If an interrupt comes in during these critical periods, the handler can't run because it has no idea what shape the stack is in. So, it sets a bit for its signal in a global mask and returns. The outer handler will deal with this signal itself. Atomicity is had with xchg. A nested interrupt that needs to bail out will xchg its signal mask into pending_mask and repeat in case yet another interrupt hit at the same time, until the mask stabilizes. The outermost interrupt will set up the thread_info and xchg a zero into pending_mask when it is done. At this point, nested interrupts will look at ->real_thread and see that no setup needs to be done. They can just continue normally. Similar care needs to be taken when exiting the outer handler. If another interrupt comes in while it is copying the thread_info, it will drop a bit into pending_mask. The outer handler will check this and if it is non-zero, will loop, set up the stack again, and handle the interrupt. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11uml: tidy IRQ codeJeff Dike
Some tidying of the irq code before introducing irq stacks. Mostly style fixes, but the timer handler calls the timer code directly rather than going through the generic sig_handler_common_skas. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11uml: use UM_THREAD_SIZE in userspace codeJeff Dike
Now that we have UM_THREAD_SIZE, we can replace the calculations in user-space code (an earlier patch took care of the kernel side of the house). Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11uml: remove task_protectionsJeff Dike
Replaced task_protections with stack_protections since they do the same thing, and task_protections was misnamed anyway. This needs THREAD_SIZE, so that's imported via common-offsets.h Also tidied up the code in the vicinity. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11m32r: fix tme_handler to check _PAGE_PRESENT bitHirokazu Takata
Fix the tlb-miss handler (tme_handler) to check _PAGE_PRESENT bit in order to handle file-mapped or swapped-out pages correctly. This patch is required to fix unexpected page errors for m32r. Signed-off-by: Hitoshi Yamamoto <hitoshiy@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11m32r: fix switch_to macro to push/pop frame pointer if neededHirokazu Takata
This patch fixes a rarely-happened but severe scheduling problem of the recent m32r kernel of 2.6.17-rc3 or later. In the following previous m32r patch, the switch_to macro was modified not to do unnecessary push/pop operations for tuning. > [PATCH] m32r: update switch_to macro for tuning > 4127272c38619c56f0c1aa01d01c7bd757db70a1 In this modification, only 'lr' and 'sp' registers are push/pop'ed, assuming that the m32r kernel is always compiled with -fomit-frame-pointer option. However, in 2.6 kernel, kernel/sched.c is irregularly compiled with -fno-omit-frame-pointer if CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER is not defined. -- kernel/Makefile -- : ifneq ($(CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER),y) # According to Alan Modra <alan@linuxcare.com.au>, the -fno-omit-frame-pointer is # needed for x86 only. Why this used to be enabled for all architectures is beyond # me. I suspect most platforms don't need this, but until we know that for sure # I turn this off for IA-64 only. Andreas Schwab says it's also needed on m68k # to get a correct value for the wait-channel (WCHAN in ps). --davidm CFLAGS_sched.o := $(PROFILING) -fno-omit-frame-pointer endif : --- Therefore, for the recent m32r kernel, we have to push/pop 'fp' (frame pointer) if CONFIG_FRAME_POINTER is defined or CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER is not defined. Signed-off-by: Hitoshi Yamamoto <hitoshiy@linux-m32r.org> Signed-off-by: Hirokazu Takata <takata@linux-m32r.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11h8300 syscall updateYoshinori Sato
h8300 systemcall entry table update. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11frv: gdb: use __maybe_unusedDavid Rientjes
Replace function instances of __attribute__((unused)) with __maybe_unused to suppress warnings. Cc: David Howells <dhowells@redhat.com> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11x86_64: display more intuitive error message if kernel is not 2MB alignedVivek Goyal
o x86_64 kernel needs to be compiled for 2MB aligned addresses. Currently we are using BUILD_BUG_ON() to warn the user if he has not done so. But looks like folks are not finding message very intutive and don't open the respective c file to find problem source. (Bug 8439) arch/x86_64/kernel/head64.c: In function 'x86_64_start_kernel': arch/x86_64/kernel/head64.c:70: error: size of array 'type name' is negative o Using preprocessor directive #error to print a better message if CONFIG_PHYSICAL_START is not aligned to 2MB boundary. Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com> Cc: Andi Kleen <ak@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-11[MIPS] Rework cobalt_board_idYoichi Yuasa
This patch has reworked cobalt_board_id. The cobalt_board_id is read from PCI config register. It should be in PCI routine. Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11[MIPS] Use RTC_CMOS for CobaltYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-05-11[MIPS] Use platform_device for Cobalt UARTYoichi Yuasa
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>