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2008-03-04CRIS v10: Include mm.h instead of vmstat.h in kernel/time.cJesper Nilsson
Commit 2f569afd9ced9ebec9a6eb3dbf6f83429be0a7b4 (CONFIG_HIGHPTE vs. sub-page page tables) introduced use of inc_zone_page_state and dec_zone_page_state in include/linux/mm.h. Those are defined in include/linux/vmstat.h, but after it includes mm.h, making it impossible to include vmstat.h since inc_zone_page_state and dec_zone_page_state then would be undefined. arch/cris/arch-v10/kernel/time.c does just this, which makes the CRIS v10 build break with the following error: ... CC arch/cris/arch-v10/kernel/time.o In file included from include/linux/vmstat.h:7, from arch/cris/arch-v10/kernel/time.c:17: include/linux/mm.h: In function 'pgtable_page_ctor': include/linux/mm.h:902: error: implicit declaration of function 'inc_zone_page_state' include/linux/mm.h: In function 'pgtable_page_dtor': include/linux/mm.h:908: error: implicit declaration of function 'dec_zone_page_state' make[2]: *** [arch/cris/arch-v10/kernel/time.o] Error 1 make[1]: *** [arch/cris/arch-v10/kernel] Error 2 make: *** [sub-make] Error 2 ... By changing kernel/time.c to include linux/mm.h, the build succeeds. Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com> Cc: Mikael Starvik <mikael.starvik@axis.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-04[IA64] fix ia64 kprobes compilationAdrian Bunk
This patch fixes the following compile error with a recent gcc: CC kernel/kprobes.o /home/bunk/linux/kernel-2.6/git/linux-2.6/kernel/kprobes.c:1066: error: __ksymtab_jprobe_return causes a section type conflict Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] workaround tiger ia64_sal_get_physical_id_info hangAlex Chiang
This fixes regression introduced in 113134fcbca83619be4c68d0ca66db6093777b5d Intel Tiger platforms hang when calling SAL_GET_PHYSICAL_ID_INFO instead of properly returning -1 for unimplemented, so add a version check. SGI Altix platforms have an incorrect SAL version hard-coded into their prom -- they encode 2.9, but actually implement 3.2 -- so fix it up and allow ia64_sal_get_physical_id_info to keep working. Signed-off-by: Alex Chiang <achiang@hp.com> Acked-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] move defconfig to arch/ia64/configs/Adrian Bunk
This patch moves the default ia64 defconfig to arch/ia64/configs/generic_defconfig where it belongs and selects it as the default defconfig through KBUILD_DEFCONFIG. Signed-off-by: Adrian Bunk <adrian.bunk@movial.fi> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] Fix irq migration in multiple vector domainKenji Kaneshige
Fix the problem that the following error message is sometimes displayed at irq migration when vector domain is enabled. "Unexpected interrupt vector %d on CPU %d is not mapped to any IRQ!" The cause of this problem is an interrupt is sent to the previous target CPU after cleaning up vector to irq mapping table. To clean up vector to irq map on the previous target CPU safty, change the irq migration in multiple vector domain as follows. The original idea is from x86 interrupt management code. - Delay vector to irq table cleanup until the interrupts are sent to new target CPUs. By this, it is ensured that target CPU is completely changed on the interrupt controller side. - Even after the interrupts are sent to new target CPUs, there can be pended interrupts remaining on the previous target CPU. So we need to delay clearning up vector to irq table until the pended interrupt is handled. For this, send IPI to the previous target CPU with lower priority vector and clean up vector to irq table in its handler. This patch affects only to irq migration code with multiple vector domain is enabled. Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] signal(ia64_ia32): add a signal stack overflow checkShi Weihua
The similar check has been added to x86_32(i386) in commit id 83bd01024b1fdfc41d9b758e5669e80fca72df66. So we add this check to ia64_ia32 and improve it a liitle bit in that we need to check for stack overflow only when the signal is on stack. Signed-off-by: Shi Weihua <shiwh@cn.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] signal(ia64): add a signal stack overflow checkShi Weihua
The similar check has been added to x86_32(i386) in commit id 83bd01024b1fdfc41d9b758e5669e80fca72df66. So we add this check to ia64 and improve it a liitle bit in that we need to check for stack overflow only when the signal is on stack. Signed-off-by: Shi Weihua <shiwh@cn.fujitsu.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04[IA64] CONFIG_SGI_SN2 - auto select NUMA and ACPI_NUMAJes Sorensen
Auto select CONFIG_NUMA and CONFIG_ACPI_NUMA when picking SN2, similar to how they are selected automatically for CONFIG_IA64_GENERIC. Signed-off-by: Jes Sorensen <jes@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
2008-03-04x86: a P4 is a P6 not an i486Hugh Dickins
P4 has been coming out as CPU_FAMILY=4 instead of 6: fix MPENTIUM4 typo. Signed-off-by: Hugh Dickins <hugh@veritas.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-04Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86/xen: fix DomU boot problem x86: not set node to cpu_to_node if the node is not online x86, i387: fix ptrace leakage using init_fpu()
2008-03-04Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm: x86: disable KVM for Voyager and friends KVM: VMX: Avoid rearranging switched guest msrs while they are loaded KVM: MMU: Fix race when instantiating a shadow pte KVM: Route irq 0 to vcpu 0 exclusively KVM: Avoid infinite-frequency local apic timer KVM: make MMU_DEBUG compile again KVM: move alloc_apic_access_page() outside of non-preemptable region KVM: SVM: fix Windows XP 64 bit installation crash KVM: remove the usage of the mmap_sem for the protection of the memory slots. KVM: emulate access to MSR_IA32_MCG_CTL KVM: Make the supported cpuid list a host property rather than a vm property KVM: Fix kvm_arch_vcpu_ioctl_set_sregs so that set_cr0 works properly KVM: SVM: set NM intercept when enabling CR0.TS in the guest KVM: SVM: Fix lazy FPU switching
2008-03-04x86/xen: fix DomU boot problemIan Campbell
Construct Xen guest e820 map with a hole between 640K-1M. It's pure luck that Xen kernels have gotten away with it in the past. The patch below seems like the right thing to do. It certainly boots in a domU without the DMI problem (without any of the other related patches such as Alexander's). Signed-off-by: Ian Campbell <ijc@hellion.org.uk> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Tested-by: Mark McLoughlin <markmc@redhat.com> Acked-by: Mark McLoughlin <markmc@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2008-03-04x86: not set node to cpu_to_node if the node is not onlineYinghai Lu
resolve boot problem reported by Mel Gorman: http://lkml.org/lkml/2008/2/13/404 init_cpu_to_node will use cpu->apic (from MADT or mptable) and apic->node(from SRAT or AMD config space with k8_bus_64.c) to have cpu->node mapping, and later identify_cpu will overwrite them again...(with nearby_node...) this patch checks if the node is online, otherwise it will not update cpu_node map. so keep cpu_node map to online node before identify_cpu..., to prevent possible error. Signed-off-by: Yinghai Lu <yinghai.lu@sun.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2008-03-04x86, i387: fix ptrace leakage using init_fpu()Suresh Siddha
This bug got introduced by the recent i387 merge: commit 4421011120b2304e5c248ae4165a2704588aedf1 Author: Roland McGrath <roland@redhat.com> Date: Wed Jan 30 13:31:50 2008 +0100 x86: x86 i387 user_regset Current usage of unlazy_fpu() in ptrace specific routines is wrong. unlazy_fpu() will not init fpu if the task never used math. So the ptrace calls can expose the parent tasks FPU data in some cases. Replace it with the init_fpu() which will init the math state, if the task never used math before. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Acked-by: Thomas Gleixner <tglx@linutronix.de>
2008-03-04m68k{,nommu}: Wire up new timerfd syscallsGeert Uytterhoeven
m68k{,nommu}: Wire up the new timerfd syscalls, which were introduced in commit 4d672e7ac79b5ec5cdc90e450823441e20464691 ("timerfd: new timerfd API"). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-04m68knommu: remove duplicate hw_tick() codeGreg Ungerer
Remove duplicate hw_tick() function from 68328 timers code. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-04m68knommu: update defconfigGreg Ungerer
Update the m68knommu defconfig. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-04x86: disable KVM for Voyager and friendsRandy Dunlap
Most classic Pentiums don't have hardware virtualization extension, and building kvm with Voyager, Visual Workstation, or NUMAQ generates spurious failures. Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
2008-03-04KVM: VMX: Avoid rearranging switched guest msrs while they are loadedAvi Kivity
KVM tries to run as much as possible with the guest msrs loaded instead of host msrs, since switching msrs is very expensive. It also tries to minimize the number of msrs switched according to the guest mode; for example, MSR_LSTAR is needed only by long mode guests. This optimization is done by setup_msrs(). However, we must not change which msrs are switched while we are running with guest msr state: - switch to guest msr state - call setup_msrs(), removing some msrs from the list - switch to host msr state, leaving a few guest msrs loaded An easy way to trigger this is to kexec an x86_64 linux guest. Early during setup, the guest will switch EFER to not include SCE. KVM will stop saving MSR_LSTAR, and on the next msr switch it will leave the guest LSTAR loaded. The next host syscall will end up in a random location in the kernel. Fix by reloading the host msrs before changing the msr list. Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: MMU: Fix race when instantiating a shadow pteAvi Kivity
For improved concurrency, the guest walk is performed concurrently with other vcpus. This means that we need to revalidate the guest ptes once we have write-protected the guest page tables, at which point they can no longer be modified. The current code attempts to avoid this check if the shadow page table is not new, on the assumption that if it has existed before, the guest could not have modified the pte without the shadow lock. However the assumption is incorrect, as the racing vcpu could have modified the pte, then instantiated the shadow page, before our vcpu regains control: vcpu0 vcpu1 fault walk pte modify pte fault in same pagetable instantiate shadow page lookup shadow page conclude it is old instantiate spte based on stale guest pte We could do something clever with generation counters, but a test run by Marcelo suggests this is unnecessary and we can just do the revalidation unconditionally. The pte will be in the processor cache and the check can be quite fast. Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: Avoid infinite-frequency local apic timerAvi Kivity
If the local apic initial count is zero, don't start a an hrtimer with infinite frequency, locking up the host. Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: make MMU_DEBUG compile againMarcelo Tosatti
the cr3 variable is now inside the vcpu->arch structure. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: move alloc_apic_access_page() outside of non-preemptable regionMarcelo Tosatti
alloc_apic_access_page() can sleep, while vmx_vcpu_setup is called inside a non preemptable region. Move it after put_cpu(). Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: SVM: fix Windows XP 64 bit installation crashJoerg Roedel
While installing Windows XP 64 bit wants to access the DEBUGCTL and the last branch record (LBR) MSRs. Don't allowing this in KVM causes the installation to crash. This patch allow the access to these MSRs and fixes the issue. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-04KVM: remove the usage of the mmap_sem for the protection of the memory slots.Izik Eidus
This patch replaces the mmap_sem lock for the memory slots with a new kvm private lock, it is needed beacuse untill now there were cases where kvm accesses user memory while holding the mmap semaphore. Signed-off-by: Izik Eidus <izike@qumranet.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03[Blackfin] arch: fix atomic and32/xor32 comments and ENDPROC markingsMike Frysinger
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-03-03[Blackfin] arch: fix bug - allow SDH driver to be used as moduleMichael Hennerich
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-03-06[Blackfin] arch: to kill syscalls missing warning by adding new timerfd syscallsBryan Wu
Signed-off-by: Bryan Wu <cooloney@kernel.org>
2008-03-03[SPARC]: Fix link errors with gcc-4.3David S. Miller
Reported by Adrian Bunk. Just like in changeset a3f9985843b674cbcb58f39fab8416675e7ab842 ("[SPARC64]: Move kernel unaligned trap handlers into assembler file.") we have to move the assembler bits into a seperate asm file because as far as the compiler is concerned these inline bits we're doing in unaligned.c are unreachable. Signed-off-by: David S. Miller <davem@davemloft.net>
2008-03-03sparc64: replace remaining __FUNCTION__ occurancesHarvey Harrison
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-03-03sparc: replace remaining __FUNCTION__ occurancesHarvey Harrison
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-03-03Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-armLinus Torvalds
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] Fix freeing of page tables for ARM in free_pgd_slow
2008-03-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86Linus Torvalds
* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86: revert "x86: fix pmd_bad and pud_bad to support huge pages" x86: revert "x86: CPA: avoid split of alias mappings"
2008-03-03x86: revert "x86: CPA: avoid split of alias mappings"Rafael J. Wysocki
Revert: commit 8be8f54bae3453588011cad06363813a5293af53 Author: Thomas Gleixner <tglx@linutronix.de> Date: Sat Feb 23 20:43:21 2008 +0100 x86: CPA: avoid split of alias mappings because it clearly mishandles the case when __change_page_attr(), called from __change_page_attr_set_clr(), changes cpa->processed to 1 and cpa_process_alias(cpa) is executed right after that. This crashes my x86-64 test box early in the boot process (ref. http://bugzilla.kernel.org/show_bug.cgi?id=10140#c4). Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-03-03Merge branch 'for-2.6.25' of ↵Paul Mackerras
master.kernel.org:/pub/scm/linux/kernel/git/arnd/cell-2.6 into merge
2008-03-03KVM: emulate access to MSR_IA32_MCG_CTLJoerg Roedel
Injecting an GP when accessing this MSR lets Windows crash when running some stress test tools in KVM. So this patch emulates access to this MSR. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03KVM: Make the supported cpuid list a host property rather than a vm propertyAvi Kivity
One of the use cases for the supported cpuid list is to create a "greatest common denominator" of cpu capabilities in a server farm. As such, it is useful to be able to get the list without creating a virtual machine first. Since the code does not depend on the vm in any way, all that is needed is to move it to the device ioctl handler. The capability identifier is also changed so that binaries made against -rc1 will fail gracefully. Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03KVM: Fix kvm_arch_vcpu_ioctl_set_sregs so that set_cr0 works properlyPaul Knowles
Whilst working on getting a VM to initialize in to IA32e mode I found this issue. set_cr0 relies on comparing the old cr0 to the new one to work correctly. Move the assignment below so the compare can work. Signed-off-by: Paul Knowles <paul@transitive.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03KVM: SVM: set NM intercept when enabling CR0.TS in the guestJoerg Roedel
Explicitly enable the NM intercept in svm_set_cr0 if we enable TS in the guest copy of CR0 for lazy FPU switching. This fixes guest SMP with Linux under SVM. Without that patch Linux deadlocks or panics right after trying to boot the other CPUs. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03KVM: SVM: Fix lazy FPU switchingJoerg Roedel
If the guest writes to cr0 and leaves the TS flag at 0 while vcpu->fpu_active is also 0, the TS flag in the guest's cr0 gets lost. This leads to corrupt FPU state an causes Windows Vista 64bit to crash very soon after boot. This patch fixes this bug. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Markus Rechberger <markus.rechberger@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
2008-03-03[POWERPC] Convert the cell IOMMU fixed mapping to 16M IOMMU pagesMichael Ellerman
The only tricky part is we need to adjust the PTE insertion loop to cater for holes in the page table. The PTEs for each segment start on a 4K boundary, so with 16M pages we have 16 PTEs per segment and then a gap to the next 4K page boundary. It might be possible to allocate the PTEs for each segment separately, saving the memory currently filling the gaps. However we'd need to check that's OK with the hardware, and that it actually saves memory. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Allow for different IOMMU page sizes in cell IOMMU codeMichael Ellerman
Make some preliminary changes to cell_iommu_alloc_ptab() to allow it to take the page size as a parameter rather than assuming IOMMU_PAGE_SIZE. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Cell IOMMU: n_pte_pages is in 4K page units, not IOMMU_PAGE_SIZEMichael Ellerman
We use n_pte_pages to calculate the stride through the page tables, but we also use it to set the NPPT value in the segment table entry. That is defined as the number of 4K pages per segment, so we should calculate it as such regardless of the IOMMU page size. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Split setup of IOMMU stab and ptab, allocate dynamic/fixed ptabs ↵Michael Ellerman
separately Currently the cell IOMMU code allocates the entire IOMMU page table in a contiguous chunk. This is nice and tidy, but for machines with larger amounts of RAM the page table allocation can fail due to it simply being too large. So split the segment table and page table setup routine, and arrange to have the dynamic and fixed page tables allocated separately. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Move allocation of cell IOMMU pad pageMichael Ellerman
There's no need to allocate the pad page unless we're going to actually use it - so move the allocation to where we know we're going to use it. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Remove unused pte_offset variableMichael Ellerman
The cell IOMMU code no longer needs to save the pte_offset variable separately, it is incorporated into tbl->it_offset. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Use it_offset not pte_offset in cell IOMMU codeMichael Ellerman
The cell IOMMU tce build and free routines use pte_offset to convert the index passed from the generic IOMMU code into a page table offset. This takes into account the SPIDER_DMA_OFFSET which sets the top bit of every DMA address. However it doesn't cater for the IOMMU window starting at a non-zero address, as the base of the window is not incorporated into pte_offset at all. As it turns out tbl->it_offset already contains the value we need, it takes into account the base of the window and also pte_offset. So use it instead! Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] Clearup cell IOMMU fixed mapping terminologyMichael Ellerman
It's called the fixed mapping, not the static mapping. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] enable hardware watchpoints on cell bladesJens Osterkamp
Ulrich Weigand has found that the hardware watchpoints on cell were not working back in November : http://ozlabs.org/pipermail/linuxppc-dev/2007-November/046135.html This patch sets them during initialization. Signed-off-by: Jens Osterkamp <jens@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2008-03-03[POWERPC] move celleb DABRX definitionsJens Osterkamp
This moves the private DABRX definitions for celleb from beat.h to reg.h to make them usable for all. Signed-off-by: Jens Osterkamp <jens@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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