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path: root/drivers/ata/sata_mv.c
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2009-05-11sata_mv: use new sata phy register settings for new devicesMartin Michlmayr
Marvell's new SoC (65 nano) needs different settings for its SATA PHY registers. Tested-by: Martin Michlmayr <tbm@cyrius.com> Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-17sata_mv: workaround for multi_count errata sata24Mark Lord
Workaround for errata SATA#24 in sata_mv. This errata affects WRITE_MULTI* commands when the device multi_count produces a DRQ block size >= 4Kbytes. We work around it here by converting such operations into ordinary PIO_WRITEs instead. Note that this might result in a PIO FUA write unavoidably being converted into a non-FUA write. In practice, any system using FUA is also going to be using DMA rather than PIO, so this shouldn't affect anyone in the real world. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-17sata_mv: tidy up qc->tf usage in qc_prep() functionsMark Lord
Tidy up qc->tf accesses in the mv_qc_prep() functions. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-07Merge branch 'upstream-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev * 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: sata_mv: shorten register names sata_mv: workaround errata SATA#13 sata_mv: cosmetic renames sata_mv: workaround errata SATA#26 sata_mv: workaround errata PCI#7 sata_mv: replace 0x1f with ATA_PIO4 (v2) sata_mv: fix irq mask races sata_mv: revert SoC irq breakage libata: ahci enclosure management bios workaround ata: Add TRIM infrastructure ata_piix: VGN-BX297XP wants the controller power up on suspend libata: Remove some redundant casts from pata_octeon_cf.c pata_artop: typo
2009-04-07dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)Yang Hongyang
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-07dma-mapping: replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)Yang Hongyang
Replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-04-06sata_mv: shorten register namesMark Lord
Rename a slew of register name constants in sata_mv, removing the _OFS suffix from them, and shortening some of them in other ways as well. Also, bump up the version number to reflect all recent changes. In theory, no actual changes to the generated code, other than the version number bump. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: workaround errata SATA#13Mark Lord
Add remainder of workaround for errata SATA#13. This prevents writes of certain adjacent 32-bit registers from being combined into single 64-bit writes, which might fail for the affected registers. Most of sata_mv is already safe from this issue, but adding this code to mv_write_cached_reg() will catch the remaining cases and hopefully prevent future ones. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: cosmetic renamesMark Lord
Add _OFS suffix to more of the register offset names, for consistency with the rest of the driver. Also tag the defines for LTMODE and PHY_MODE4 to note that read-after-write is necessary when updating those regs. No code changes here. [NOTE: this commit is undone a few commits later] Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: workaround errata SATA#26Mark Lord
Workaround for errata SATA#26. Prevents accidently putting a drive to sleep when attempting COMRESET, by ORing 0xf000 with the values written to SCR_CONTROL. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: workaround errata PCI#7Mark Lord
Workaround for 60x1-B2 errata PCI#7. Write-combining may be unreliable when chip operates in PCI-X mode, so disable write-combining when in PCI-X mode. Also, update the errata comments at the top of sata_mv, and include a note about errata PCI#11. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: replace 0x1f with ATA_PIO4 (v2)Mark Lord
Cosmetic change: replace .pio_mask=0x1f with .pio_mask=ATA_PIO4 everywhere. Originally from Erik Inge Bolsø, now reworked for latest sata_mv. Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net> Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: fix irq mask racesMark Lord
Prevent racing on the main interrupt mask during port_start and port_stop. Otherwise, we end up with IRQs masked on inactive ports, and hotplug insertions then get missed later on. Found while debugging (out of tree) target mode operations, but the bug is present and impacting mainline as well. This patch should also be considered for -stable. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-04-06sata_mv: revert SoC irq breakageMark Lord
Revert most of commit 6be96ac1d5e4d913e1f48299db083ada5321803b2, originally from Lennert Buijtenheck (Marvell) and Saeed Bishara (Marvell), since that commit causes sata_mv to oops at startup on SOC "Kirkwood". The SOC variants do not have the hpriv->irq_{cause,mask}_ofs registers, so don't try to write to them! This patch should also be considered for -stable. Reported-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] Improve timeout handlingAlan Cox
On a timeout call a device specific handler early in the recovery so that we can complete and process successful commands which timed out due to IRQ loss or the like rather more elegantly. [Revised to exclude the timeout handling on a few devices that inherit from SFF but are not SFF enough to use the default timeout handler] Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: fix LED blinking for SoC+NCQMark Lord
For Marvell SoC chips, the HDD LED does not blink when there is disk I/O if NCQ is enabled. Add a quirk that enables blink mode for the LED while NCQ is enabled on any port of a SoC host controller. Normal LED function is restored when NCQ is not enabled on any port. The code to enable the blink mode is based on earlier code and suggestions from Frans Pop, Saeed Bishara, and possibly others. Signed-off-by: Mark Lord <mlord@pobox.com> Tested-by: Frans Pop <elendil@planet.nl> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: optimize IRQ coalescing for 8-port chipsMark Lord
Enable use of the "all ports" IRQ coalescing optimization for GEN_II / GEN_IIE chips that have dual host-controllers (8-ports). Currently only the 6081 chip qualifies, but other chips may come along someday. Rather than each half of the chip having to satisfy a local set of coalescing thresholds, use of this feature groups all ports together under a single set of thresholds. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: implement IRQ coalescing (v2)Mark Lord
Add IRQ coalescing to sata_mv (off by default). This feature can reduce total interrupt overhead for RAID setups in some situations, by deferring the interrupt signal until one or both of: a) a specified io_count (completed SATA commands) is achieved, or b) a specified time interval elapses after an IO completion. For now, module parameters are used to set the irq_coalescing_io_count and irq_coalescing_usecs (timeout) globally. These may eventually be supplemented with sysfs attributes, so that thresholds can be set on-the-fly and on a per-chip (or even per-host_controller) basis. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: cosmetic preparations for IRQ coalescingMark Lord
Various cosmetic changes in preparation for the IRQ coalescing feature. Note that the various MV_IRQ_COAL_* definitions are restored/renamed in the folloup patch which adds IRQ coalescing to the driver. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] sata_mv: Implement direct FIS transmission via mv_qc_issue_fis().Mark Lord
This is initially needed to work around NCQ errata, whereby the READ_LOG_EXT command sometimes fails when issued in the traditional (sff) fashion. Portions of this code will likely be reused for implementation of the target mode feature later on. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] sata_mv: Add a new mv_sff_check_status() function to sata_mv.Mark Lord
This is necessary for use with the upcoming "mv_qc_issue_fis()" patch, but is being added separately here for easier code review. When using command issue via the "mv_qc_issue_fis()" mechanism, the initial ATA_BUSY bit does not show in the ATA status (shadow) register. This can confuse libata! So here we add a hook to fake ATA_BUSY for that situation, until the first time a BUSY, DRQ, or ERR bit is seen. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] sata_mv: Tighten up interrupt masking in mv_qc_issue()Mark Lord
so that it doesn't miss any protocols. Handle future cases where a qc is specially marked for polled issue or where a particular chip version prefers interrupts over polling for PIO. This mimics the polling decision logic from ata_sff_qc_issue(). Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] sata_mv: Enable use of (basic) DMA for ATAPI on GEN_IIE chipsMark Lord
This also gets rid of any need for mv_mode_filter(). Using basic DMA on GEN_IIE requires setting an undocumented bit in an undocumented register. For safety, we clear that bit again when switching back to EDMA mode. To avoid a performance penalty when switching modes, we cache the register in port_priv, as already done for other regs. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24[libata] sata_mv: cache frequently-accessed registersMark Lord
Maintain a local (mv_port_priv) cache of frequently accessed registers, to avoid having to re-read them (very slow) on every transistion between EDMA and non-EDMA modes. This speeds up things like flushing the drive write cache, and anything using basic DMA transfers. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: remove leftoversMark Lord
Remove redundant code left over from the earlier patch 04/07. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: optimize use of mv_edma_cfgMark Lord
Try and avoid unnecessary reconfiguration of the EDMA config register on every single non-EDMA I/O operation, by moving the call to mv_edma_cfg() into mv_stop_edma(). It must then also be invoked from mv_hardreset() and from mv_port_start(). Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: introduce support for ATAPI devicesMark Lord
Add ATAPI support to sata_mv, using sff DMA for GEN_II chipsets, and plain old PIO for GEN_IIE. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: mv_fill_sg fixes v2Mark Lord
Fix mv_fill_sg() to zero out the reserved word (required for ATAPI), and to include a memory barrier. This may also help with problems reported by Jens on the PPC platform. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: update ata_qc_from_tagMark Lord
Update the logic in ata_qc_from_tag() to match that used in similar places elsewhere in libata. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: restructure mv_qc_issueMark Lord
Rearrange logic in mv_qc_issue() to handle protocols other than ATA_PROT_DMA, ATA_PROT_NCQ, and ATA_PROT_PIO. This is in preparation for later enabling ATAPI support. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: rearrange mv_start_dma() and friendsMark Lord
Rearrange mv_start_dma() and friends, in preparation for adding non-EDMA DMA modes, and non-EDMA interrupts, to the driver. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-24sata_mv: cleanup chipset GENeration FLAGSMark Lord
Clean up the chipset GENeration FLAGS, and rename them for consistency with other uses of GEN_XX within sata_mv. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-03-13sata_mv: fix MSI irq race conditionMark Lord
Fix a (rare) race condition in mv_interrupt() when using MSI. The value of hpriv->main_irq_mask_addr can change on on the fly, and without this patch we could end up writing back a stale copy to the hardware. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-02-25sata_mv: fix SoC interrupt breakageMark Lord
For some reason, sata_mv doesn't clear interrupt status during init when it's running on an SoC host adapter. If the bootloader has touched the SATA controller before starting Linux, Linux can end up enabling the SATA interrupt with events pending, which will cause the interrupt to be marked as spurious and then be disabled, which then breaks all further accesses to the controller. This patch makes the SoC path clear interrupt status on init like in the non-SoC case. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-02-02sata_mv: Fix chip type for Hightpoint RocketRaid 1740/1742Mark Lord
Fix chip type for the Highpoint RocketRAID 1740 and 1742 PCI cards. These really do have Marvell 6042 chips on them, rather than the 5081 chip. Confirmed by multiple (two) users (for the 1740), and by examining the product photographs from Highpoint's web site. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-26sata_mv: msi masking fix (v2)Mark Lord
Enable reliable use of Message-Signaled Interrupts (MSI) in sata_mv by masking further chip interrupts within the main interrupt handler. Based upon a suggestion by Grant Grundler. MSI is working reliably in all of my test systems here now. Signed-off-by: Mark Lord <mlord@pobox.com> Reviewed-by: Grant Grundler <grundler@google.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-26sata_mv: Properly initialize main irq maskThomas Reitmayr
I noticed that during initialization sata_mv.c assumes that the main interrupt mask has its default value of 0. The function mv_platform_probe(..) initializes a shadow irq mask with 0 assuming that's the value of the controller's register. Now mv_set_main_irq_mask(..) only writes the controller's register if the new value differs from the "shadowed" value. This is fatal when trying to disable all interrupts in mv_init_host(..), i.e. the following function call does not write anything to the main irq mask register: mv_set_main_irq_mask(host, ~0, 0); The effect I see on my machine (QNAP TS-109 II) with booting via kexec (with Linux as a 2nd-stage boot loader) is that if the sata_mv module was still loaded when performing kexec, then the new kernel's sata_mv module starts up with interrupts enabled. This results in an unhandled IRQ and breaks the boot process. The unhandled interrupt itself might also be fixed by Lennert's patch proposed at http://markmail.org/message/kwvzxstnlsa3s26w which I did not try yet. However I still propose to additionally initialize the shadow variable with the current contents of the main irq mask register to get both in sync and allow proper disabling the main irq mask. This fixes the unhandled irq on my machine. Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-26sata_mv: remove bogus nsect restrictionMark Lord
Remove unneeded nsect restriction from GenII NCQ path, and improve comments to explain why this is not a problem. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-26sata_mv: don't read hc_irq_causeMark Lord
Remove silly read-modify-write sequences when clearing interrupts in hc_irq_cause. This gets rid of unneeded MMIO reads, resulting in a slight performance boost when switching between EDMA and non-EDMA modes (eg. for cache flushes). Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-01-26sata_mv: fix 8-port timeouts on 508x/6081 chipsMark Lord
Fix a longstanding bug for the 8-port Marvell Sata controllers (508x/6081), where accesses to the upper 4 ports would cause lost-interrupts / timeouts for the lower 4-ports. With this patch, the 6081 boards should finally be reliable enough for mainstream use with Linux. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-12-28[libata] Update kernel-doc comments to match source codeQinghuang Feng
Signed-off-by: Qinghuang Feng <qhfeng.kernel@gmail.com>
2008-09-29libata: make SCR access ops per-linkTejun Heo
Logically, SCR access ops should take @link; however, there was no compelling reason to convert all SCR access ops when adding @link abstraction as there's one-to-one mapping between a port and a non-PMP link. However, that assumption won't hold anymore with the scheduled addition of slave link. Make SCR access ops per-link. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-09-08sata_mv: add RocketRaid 1720 PCI ID to driverMark Lord
Signed-off-by: Petr Jelen <petr.jelen@gmail.com> Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-22sata_mv: add the Gen IIE flag to the SoC devices.Saeed Bishara
The SoC sata port is based on the 7042/6042 devices (Gen IIE). This patch will fix various issues when working with PMP and/or NCQ. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-08-22sata_mv: don't issue two DMA commands concurrentlyTejun Heo
sata_mv allowed issuing two DMA commands concurrently which the hardware allows. Unfortunately, libata core layer isn't ready for this yet and spews ugly warning message and malfunctions on this. Don't allow concurrent DMA commands for now. Signed-off-by: Tejun Heo <tj@kernel.org> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-07-04sata_mv: safer logic for limit_warningsMark Lord
There is a miniscule chance that two separate host controllers might be in sata_mv at the same time and manage to decrement the static limit_warnings variable below zero. Fix the comparison to deal with it. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-06-18sata_mv: warn on PIO with multiple DRQsMark Lord
Chip errata sometimes prevents reliable use of PIO commands which involve more than a single DRQ (data request). In normal operation, libata should not generate such PIO commands (uses DMA instead), but they could be sent in via SG_IO from userspace. A full workaround might be to break up such commands into sequences of single DRQ ones, but that's just way too complex for something that doesn't normally happen in real life. So, allow the attempt (it often works, despite the errata), but log the event for reference when somebody screams. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-06-18sata_mv: enable async_notify for 60x1 Rev.C0 and higherMark Lord
The early chipsets cannot safely handle Async Notification (AN), but 6041/6081 chip revision "C0" (and newer) can handle it. So allow AN for "C0" and higher. This enables use of hotplug on PMP ports for the 6041/6081 PCI Rev.9 chips. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-06-04sata_mv: PHY_MODE4 cleanupsMark Lord
The handling for PHY_MODE4 was originally just cloned from the Marvell proprietary driver (with their blessing). But we can do better than that. Tidy things up with some judicious mask definitions, to improve maintainability. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2008-05-30sata_mv: implement SoC guideline SATA_S11Mark Lord
The 5182 System-On-Chip (SOC) variant wants certain lower bits to be cleared on any write to the PHY_MODE3 register. If/when support is added for other SOC variants, we'll need some way to uniquely identify the 5182, and not perform this workaround for the others. But for now, it is the only SOC variant we support here. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>