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Replace all DMA_64BIT_MASK macro with DMA_BIT_MASK(64)
Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com>
Acked-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Conflicts:
sound/soc/pxa/pxa2xx-i2s.c
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into devel
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On a timeout call a device specific handler early in the recovery so that
we can complete and process successful commands which timed out due to IRQ
loss or the like rather more elegantly.
[Revised to exclude the timeout handling on a few devices that inherit from
SFF but are not SFF enough to use the default timeout handler]
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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If the device is signalling that there is data to drain after an error we
should read the bytes out and throw them away. Without this some devices
and controllers get wedged and don't recover.
Based on earlier work by Mark Lord
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Implement serialize and turn on slave channel
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Enable both ports on the 6210 and serialize them
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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ahci_transmit_led_message saves off the led_state
with a value that includes the port number OR'd
in, this incorrect value maybe reported back
in ahci_led_store.
For instance, if you turn off all the leds for
port 1 and cat the value back it will report 1
instead of 0.
# echo 0 > /sys/class/scsi_host/host1/em_message
# cat /sys/class/scsi_host/host1/em_message
1
Signed-off-by: David Milburn <dmilburn@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Make libata more robust when parsing the multi_count
field from a drive's identify data. This prevents us from
attempting to use dubious multi_count values ad infinitum.
Reset dev->multi_count to zero and reprobe it each time
through this routine, as it can change on device reset.
Also ensure that the reported "maximum" value is valid
and is a power of two, and that the reported "count" value
is valid and also a power of two. And that the "count"
value is not greater than the "maximum" value.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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For Marvell SoC chips, the HDD LED does not blink when there is
disk I/O if NCQ is enabled. Add a quirk that enables blink mode for
the LED while NCQ is enabled on any port of a SoC host controller.
Normal LED function is restored when NCQ is not enabled on any port.
The code to enable the blink mode is based on earlier code
and suggestions from Frans Pop, Saeed Bishara, and possibly others.
Signed-off-by: Mark Lord <mlord@pobox.com>
Tested-by: Frans Pop <elendil@planet.nl>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Enable use of the "all ports" IRQ coalescing optimization
for GEN_II / GEN_IIE chips that have dual host-controllers (8-ports).
Currently only the 6081 chip qualifies, but other chips may come along someday.
Rather than each half of the chip having to satisfy a local set of coalescing thresholds,
use of this feature groups all ports together under a single set of thresholds.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Add IRQ coalescing to sata_mv (off by default).
This feature can reduce total interrupt overhead for RAID setups
in some situations, by deferring the interrupt signal until one or both of:
a) a specified io_count (completed SATA commands) is achieved, or
b) a specified time interval elapses after an IO completion.
For now, module parameters are used to set the irq_coalescing_io_count
and irq_coalescing_usecs (timeout) globally. These may eventually
be supplemented with sysfs attributes, so that thresholds can be set
on-the-fly and on a per-chip (or even per-host_controller) basis.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Various cosmetic changes in preparation for the IRQ coalescing feature.
Note that the various MV_IRQ_COAL_* definitions are restored/renamed
in the folloup patch which adds IRQ coalescing to the driver.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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platform_get_irq() can return -ENXIO, but since 'irq' is an
unsigned int, it does not show when the IRQ resource wasn't found.
Make irq an int so that we can use a single variable to test the
platform_get_irq() return value.
Signed-off-by: Roel Kluin <roel.kluin@gmail.com>
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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According to Alan:
>and yes the EFAR does UDMA66.
mwdma:
>Yep - wrong comment. The EFAR is a sort of clone of the PIIX and I
>copied the comment while EFAR don't appear to have copied the
>limitation
Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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As noted by Alan:
>Your suspicions are correct here btw - the device can only do MWDMA1 and
>MWDMA2 (much like some PIIX devices)
Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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No functional changes in this patch.
Signed-off-by: Erik Inge Bolsø <knan-lkml@anduin.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Blacklist HP Compaq 6720s so that it doesn't play a "spin down,
spin up, spin down" ping-pong with the hard disk during system
power off.
Signed-off-by: Maciej Rutecki <maciej.rutecki@gmail.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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This is initially needed to work around NCQ errata,
whereby the READ_LOG_EXT command sometimes fails
when issued in the traditional (sff) fashion.
Portions of this code will likely be reused for
implementation of the target mode feature later on.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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This is necessary for use with the upcoming "mv_qc_issue_fis()" patch,
but is being added separately here for easier code review.
When using command issue via the "mv_qc_issue_fis()" mechanism,
the initial ATA_BUSY bit does not show in the ATA status (shadow) register.
This can confuse libata! So here we add a hook to fake ATA_BUSY
for that situation, until the first time a BUSY, DRQ, or ERR bit is seen.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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so that it doesn't miss any protocols. Handle future cases where a
qc is specially marked for polled issue or where a particular chip
version prefers interrupts over polling for PIO.
This mimics the polling decision logic from ata_sff_qc_issue().
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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This also gets rid of any need for mv_mode_filter().
Using basic DMA on GEN_IIE requires setting an undocumented
bit in an undocumented register. For safety, we clear that
bit again when switching back to EDMA mode.
To avoid a performance penalty when switching modes,
we cache the register in port_priv, as already done for other regs.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Maintain a local (mv_port_priv) cache of frequently accessed registers,
to avoid having to re-read them (very slow) on every transistion
between EDMA and non-EDMA modes. This speeds up things like
flushing the drive write cache, and anything using basic DMA transfers.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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There's no need to turn off intx explicitly on msi enable. This is
automatically handled by pci. Drop it.
This might be needed on machines if the BIOS turns intx off during
boot. However, there's no evidence of such behavior for ahci and
the only such case seems to be ICH5 PATA according to ata_piix.
Also, given the way ahci operates, it's highly unlikely BIOS ever
disables IRQ for the controller. However, as this change has slight
possibility of introducing failure, please schedule it for #upstream.
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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I'm not quite sure what freezing and thawing is used for. Tests showed
that the port is being frozen at initialisation state and thawed right
afterwards, then the functions were not called anymore. Dropping the
complete custom code for handling the frozen state seems to work at
least for a standard use case including mounting a partition, copying
some files in it (in parallel) and finally removing them and unmounting
the partition.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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The biggest difference between rb532_pata_data_xfer() and
ata_sff_data_xfer32() is the call to ata_sff_pause() at the end of
rb532_pata_data_xfer() which I suppose to be unnecessary since it works
without. I've also tested using ata_sff_data_xfer() as replacement, but
since we know that the driver supports 32bit IO, using the optimised
version should be safe.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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The only difference between rb532_pata_exec_command() and
ata_sff_exec_command() is added debugging output, so it can be dropped
and the standard op used instead.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Since the delay used internally is just the same as ata_sff_pause()
uses, rb532_pata_finish_io() does exactly the same as ata_sff_pause()
and thus can be replaced by the later one.
Signed-off-by: Phil Sutter <n0-1@freewrt.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Remove redundant code left over from the earlier patch 04/07.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Try and avoid unnecessary reconfiguration of the EDMA config register
on every single non-EDMA I/O operation, by moving the call to
mv_edma_cfg() into mv_stop_edma(). It must then also be invoked
from mv_hardreset() and from mv_port_start().
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Add ATAPI support to sata_mv, using sff DMA for GEN_II chipsets,
and plain old PIO for GEN_IIE.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Fix mv_fill_sg() to zero out the reserved word (required for ATAPI),
and to include a memory barrier. This may also help with problems
reported by Jens on the PPC platform.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Update the logic in ata_qc_from_tag() to match that used
in similar places elsewhere in libata.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Rearrange logic in mv_qc_issue() to handle protocols
other than ATA_PROT_DMA, ATA_PROT_NCQ, and ATA_PROT_PIO.
This is in preparation for later enabling ATAPI support.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Rearrange mv_start_dma() and friends, in preparation for adding
non-EDMA DMA modes, and non-EDMA interrupts, to the driver.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Clean up the chipset GENeration FLAGS, and rename them
for consistency with other uses of GEN_XX within sata_mv.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Conflicts:
arch/arm/mach-at91/gpio.c
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Samsung DB-P70 somehow botched the first ICH9 SATA port. The board
doesn't expose the first port but somehow SStatus reports link online
while failing SRST protocol leading to repeated probe failures and
thus long boot delay.
Because the BIOS doesn't carry any identifying DMI information, the
port can't be blacklisted safely. Fortunately, the controller does
have subsystem vendor and ID set. It's unclear whether the subsystem
IDs are used only for the board but it can be safely worked around by
disabling SIDPR access and just using SRST works around the problem.
Even when the workaround is triggered on an unaffected board the only
side effect will be missing SCR access.
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Joseph Jang <josephjang@gmail.com>
Reported-by: Jonghyon Sohn <mrsohn@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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libata keeps a shadow copy of the ATA CTL register (which is write only),
and only writes to the hardware when the required value doesn't match
the shadow. However this copy wasn't being maintained when performing
reset functions. This could cause problems for the first operation after
a reset when the correct value might not be written to the CTL register.
This problem was observed when hotplugging a drive: the identify command
was being issued with interrupts enabled, when they should have been
disabled.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Fix a (rare) race condition in mv_interrupt() when using MSI.
The value of hpriv->main_irq_mask_addr can change on on the fly,
and without this patch we could end up writing back a stale copy
to the hardware.
Signed-off-by: Mark Lord <mlord@pobox.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Hanno Böck reported a problem where an old Conner CP30254 240MB hard drive
was reported as 1.1TB in capacity by libata:
http://lkml.org/lkml/2009/2/13/134
This was caused by libata trusting the drive's reported current capacity in
sectors in identify words 57 and 58 if the drive does not support LBA and the
current CHS translation values appear valid. Unfortunately it seems older
ATA specs were vague about what this field should contain and a number of drives
used values with wrong byte order or that were totally bogus. There's no
unique information that it conveys and so we can just calculate the number
of sectors from the reported current CHS values.
While we're at it, clean up this function to use named constants for the
identify word values.
Signed-off-by: Robert Hancock <hancockrwd@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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When SCR access is available and the link is offline, softreset is
skipped as it only wastes time and some controllers don't respond very
well. However, the skip path forgot to thaw the port, which not only
blocks further event notification from the port but also causes
repeated EH invocations on the same event on drivers which rely on
->thaw() to clear events if the IRQ is shared with another device or
port.
This problem has always been there but is uncovered by recent sata_nv
nf2/3 change which dropped hardreset support while maintaining SCR
access. nf2/3 doesn't clear hotplug event mask from the interrupt
handler but relies on ->thaw() to clear them. When the hardreset was
there, the reset action was never skipped and the port was always
thawed but, with the hardreset gone, ->prereset() determines that
there's no need for softreset and both ->softreset() and ->thaw() are
skipped. This leads to stuck hotplug event in the IRQ status register
triggering hotplug event whenever IRQ is delieverd on the same IRQ.
As the controller shares the same IRQ for both ports, this happens on
every IO if one port is occpupied and the other isn't.
This patch fixes the problem by making sure that the port is thawed on
reset-skip path.
bko#11615 reports this problem.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Robert Hancock <hancockrwd@gmail.com>
Reported-by: Dan Andresan <danyer@gmail.com>
Reported-by: Arne Woerner <arne_woerner@yahoo.com>
Reported-by: Stefan Lippers-Hollmann <s.L-H@gmx.de>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Update MODULE_PARM_DESC for ADMA to reflect the fact that the
option is disabled by default.
Signed-off-by: Brandon Ehle <azverkan@yahoo.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Added the Device IDs for MCP89 AHCI controller.
Removed the IDs of MCP7B because this chipset had been cancelled.
Signed-off-by: Peer Chen <peerchen@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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sense_buffer is used as DMA target and shouldn't be allocated on
stack. Use ap->sector_buf instead. This problem is spotted by Chuck
Ebbert.
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Chuck Ebbert <cebbert@redhat.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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libata passes the returned value of dma_map_sg() to
dma_unmap_sg(),which is the misuse of dma_unmap_sg().
DMA-mapping.txt says:
To unmap a scatterlist, just call:
pci_unmap_sg(pdev, sglist, nents, direction);
Again, make sure DMA activity has already finished.
PLEASE NOTE: The 'nents' argument to the pci_unmap_sg call must be
the _same_ one you passed into the pci_map_sg call,
it should _NOT_ be the 'count' value _returned_ from the
pci_map_sg call.
Signed-off-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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These devices are generally used with ATA anyway and it seems that some
ATAPI will need us to issue the right number of words. Therefore as we
can't switch mid burst on VLB devices we should only use 32bit I/O for
suitable block sizes.
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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With 32bit PIO we can use the posted write buffers, but only for 32bit I/O
cycles. This means we must disable the FIFO for ATAPI where a final 16bit
cycle may occur.
Rework the FIFO logic so that we disable the FIFO then selectively
re-enable it when we set the timings on AMD devices. Also fix a case
where we scribbled on PCI config 0x41 of Nvidia chips when we shouldn't.
Signed-off-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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