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path: root/drivers/char/agp/intel-agp.c
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2009-11-30Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: drm/i915: Select CONFIG_SHMEM drm/i915: Fix CRT hotplug detect by checking really no channels attached agp/intel: new host bridge support drm/i915: Add more registers save/restore for Ironlake suspend drm/i915: Fix IRQ stall issue on Ironlake drm/i915: HDMI hardware workaround for Ironlake drm/i915: Fix and cleanup DPLL calculation for Ironlake drm/i915: Avoid potential sleep whilst holding spinlock
2009-11-19agp/intel-agp: Set dma_mask for capable chipsets before agp_add_bridge()David Woodhouse
We should set this before calling agp_add_bridge() so that it's done before we map the scratch page too. This should probably fix the regression reported as k.o. bug #14627. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-11-12agp/intel: new host bridge supportZhenyu Wang
Add new CPU host bridge id, needed for support Ironlake graphics device with it. No change for graphics device itself, so no need to update drm/i915. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-24Merge branch 'drm-intel-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel * 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel: (57 commits) drm/i915: Handle ERESTARTSYS during page fault drm/i915: Warn before mmaping a purgeable buffer. drm/i915: Track purged state. drm/i915: Remove eviction debug spam drm/i915: Immediately discard any backing storage for uneeded objects drm/i915: Do not mis-classify clean objects as purgeable drm/i915: Whitespace correction for madv drm/i915: BUG_ON page refleak during unbind drm/i915: Search harder for a reusable object drm/i915: Clean up evict from list. drm/i915: Add tracepoints drm/i915: framebuffer compression for GM45+ drm/i915: split display functions by chip type drm/i915: Skip the sanity checks if the current relocation is valid drm/i915: Check that the relocation points to within the target drm/i915: correct FBC update when pipe base update occurs drm/i915: blacklist Acer AspireOne lid status ACPI: make ACPI button funcs no-ops if not built in drm/i915: prevent FIFO calculation overflows on 32 bits with high dotclocks drm/i915: intel_display.c handle latency variable efficiently ... Fix up trivial conflicts in drivers/gpu/drm/i915/{i915_dma.c|i915_drv.h}
2009-09-15Merge branch 'agp-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6 * 'agp-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6: agp/intel: remove restore in resume agp: fix uninorth build intel-agp: Set dma mask for i915 agp: kill phys_to_gart() and gart_to_phys() intel-agp: fix sglist allocation to avoid vmalloc() intel-agp: Move repeated sglist free into separate function agp: Switch agp_{un,}map_page() to take struct page * argument agp: tidy up handling of scratch pages w.r.t. DMA API intel_agp: Use PCI DMA API correctly on chipsets new enough to have IOMMU agp: Add generic support for graphics dma remapping agp: Switch mask_memory() method to take address argument again, not page
2009-09-14agp/intel: remove restore in resumeZhenyu Wang
As early pci resume has already restored config for host bridge and graphics device, don't need to restore it again, This removes an original order hack for graphics device restore. This fixed the resume hang issue found by Alan Stern on 845G, caused by extra config restore on graphics device. Cc: Stable Team <stable@kernel.org> Cc: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2009-09-11agp/intel: Fix the pre-9xx chipset flush.Eric Anholt
Ever since we enabled GEM, the pre-9xx chipsets (particularly 865) have had serious stability issues. Back in May a wbinvd was added to the DRM to work around much of the problem. Some failure remained -- easily visible by dragging a window around on an X -retro desktop, or by looking at bugzilla. The chipset flush was on the right track -- hitting the right amount of memory, and it appears to be the only way to flush on these chipsets, but the flush page was mapped uncached. As a result, the writes trying to clear the writeback cache ended up bypassing the cache, and not flushing anything! The wbinvd would flush out other writeback data and often cause the data we wanted to get flushed, but not always. By removing the setting of the page to UC and instead just clflushing the data we write to try to flush it, we get the desired behavior with no wbinvd. This exports clflush_cache_range(), which was laying around and happened to basically match the code I was otherwise going to copy from the DRM. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Brice Goglin <Brice.Goglin@ens-lyon.org> Cc: stable@kernel.org
2009-09-08agp/intel: Add B43 chipset supportFabian Henze
Signed-off-by: Fabian Henze <hoacha@quantentunnel.de> [Fix reversed HB & IG ids for B43] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-09-02agp/intel: support for new chip variant of IGDNG mobileZhenyu Wang
New variant of IGDNG mobile chip has new host bridge id. [anholt: Note that this new PCI ID doesn't impact the DRM, which doesn't care about the PCI ID of the bridge] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-08-05intel-agp: Set dma mask for i915David Woodhouse
If DMAR is configured in but absent, we really do want to make sure that the dma mask is set appropriately. Otherwise we get mapping failures on highmem. Spotted by Zhenyu Wang. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: kill phys_to_gart() and gart_to_phys()David Woodhouse
There seems to be no reason for these -- they're a 1:1 mapping on all platforms. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel-agp: fix sglist allocation to avoid vmalloc()David Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel-agp: Move repeated sglist free into separate functionDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: Switch agp_{un,}map_page() to take struct page * argumentDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: tidy up handling of scratch pages w.r.t. DMA APIDavid Woodhouse
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03intel_agp: Use PCI DMA API correctly on chipsets new enough to have IOMMUZhenyu Wang
When graphics dma remapping engine is active, we must fill gart table with dma address from dmar engine, as now graphics device access to graphics memory must go through dma remapping table to get real physical address. Add this support to all drivers which use intel_i915_insert_entries() Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-08-03agp: Switch mask_memory() method to take address argument again, not pageDavid Woodhouse
In commit 07613ba2 ("agp: switch AGP to use page array instead of unsigned long array") we switched the mask_memory() method to take a 'struct page *' instead of an address. This is painful, because in some cases it has to be an IOMMU-mapped virtual bus address (in fact, shouldn't it _always_ be a dma_addr_t returned from pci_map_xxx(), and we just happen to get lucky most of the time?) Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-06-20agp/intel: Make intel_i965_mask_memory use dma_addr_t for physical addressesPierre Willenbrock
Otherwise, the high bits to be stuffed in the unused lower bits of the page address are lost. Signed-off-by: Pierre Willenbrock <pierre@pirsoft.de> Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-19agp: switch AGP to use page array instead of unsigned long arrayDave Airlie
This switches AGP to use an array of pages for tracking the pages allocated to the GART. This should enable GEM on PAE to work a lot better as we can pass highmem pages to the PAT code and it will do the right thing with them. Signed-off-by: Dave Airlie <airlied@redhat.com>
2009-06-05agp/intel: Add support for new chipsetsZhenyu Wang
Both desktop and mobile versions are added. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-04-13intelfb: support i854Stefan Husemann
Support the Intel 854 Chipset in fbdev. We test and use the patch on a Thomson IP1101 IPTV-Box. On the VGA-Port we get a normal signal. Here is the link to the Mambux-Project: http://www.mambux.de Cc: Keith Packard <keithp@keithp.com> Cc: Dave Airlie <airlied@linux.ie> Cc: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Stefan Husemann <shusemann@googlemail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-03-27agp/intel: Add support for new intel chipset.Shaohua Li
This is a G33-like desktop and mobile chipset. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
2009-03-10intel-agp: fix a panic with 1M of shared memory, no GTT entriesLubomir Rintel
When GTT size is equal to amount of video memory, the amount of GTT entries is computed lower than zero, which is invalid and leads to off-by-one error in intel_i915_configure() Originally posted here: http://bugzilla.kernel.org/show_bug.cgi?id=12539 http://bugzilla.redhat.com/show_bug.cgi?id=445592 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Cc: Lubomir Rintel <lkundrak@v3.sk> Cc: Dave Airlie <airlied@linux.ie> Reviewed-by: Eric Anholt <eric@anholt.net> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-12-29agp/intel: Fix broken ® symbol in device name.Eric Anholt
Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-12-29agp/intel: add support for G41 chipsetZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-10-20Update email addresses.Dave Jones
Update assorted email addresses and related info to point to a single current, valid address. additionally - trivial CREDITS entry updates. (Not that this file means much any more) - remove arjans dead redhat.com address from powernow driver Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-16Merge branch 'agp-next' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6 * 'agp-next' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/agp-2.6: agp/nvidia: Support agp user-memory on nvidia agp. agp/amd-k7: Suspend support for AMD K7 GART driver agp/intel: Reduce extraneous PCI posting reads during init agp: Fix stolen memory counting on G4X.
2008-10-16agp/intel: Reduce extraneous PCI posting reads during initKeith Packard
Instead of doing a posting read after each GTT entry update, do a single one at the end of the writes. This should reduce boot time a tiny amount by avoiding a lot of extra uncached reads. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-10-16agp: Fix stolen memory counting on G4X.Eric Anholt
On the GM45, the amount of stolen memory mapped to the GTT was underestimated, even though we had 508KB more available since the GTT doesn't take from stolen memory. On the non-GM45 G4X, we overestimated how much stolen was mapped to the GTT by 4KB, resulting in GPU page faults when that page was accessed. This update requires a corresponding update to xf86-video-intel to work correctly. Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-08-22Merge branch 'x86/urgent' into x86/patIngo Molnar
Conflicts: arch/x86/mm/pageattr.c Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-21agp: add agp_generic_destroy_pages()Shaohua Li
Add agp_generic_destroy_pages(), it uses new pageattr array interface API. Signed-off-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-21agp: generic_alloc_pages()Shaohua Li
Add agp_generic_alloc_pages(), it uses new pageattr array interface API. Signed-off-by: Dave Airlie <airlied@gmail.com> Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-08-12intel/agp: rewrite GTT on resumeKeith Packard
On my Intel chipset (965GM), the GTT is entirely erased across suspend/resume. This patch simply re-plays the current mapping at resume time to restore the table.=20 I noticed this once I started relying on persistent GTT mappings across VT switch in our GEM work -- the old X server and DRM code carefully unbind all memory from the GTT on VT switch, but GEM does not bother. I placed the list management and rewrite code in the generic layer on the assumption that it will be needed on other hardware, but I did not add the rewrite call to anything other than the Intel resume function. Keep a list of current GATT mappings. At resume time, rewrite them into the GATT. This is needed on Intel (at least) as the entire GATT is cleared across suspend/resume. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Keith Packard <keithp@keithp.com> Cc: Dave Jones <davej@codemonkey.org.uk> Cc: Andi Kleen <andi@firstfloor.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-08-12agp: use dev_printk when possibleBjorn Helgaas
Convert printks to use dev_printk(). Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-08-12intel_agp: official name for GM45 chipsetZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Cc: Dave Airlie <airlied@linux.ie> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-20[agp]: fixup chipset flush for new Intel G4x.Zhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19agp: brown paper bag patch - put back the two lines it took out.Dave Airlie
no more whitespace diffs for me. Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19agp/intel: cleanup some serious whitespace badnessDave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19[AGP] intel_agp: Add support for Intel 4 series chipsetsZhenyu Wang
Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19[AGP] intel_agp: extra stolen mem size available for IGD_GM chipsetZhenyu Wang
This adds missing stolen memory size detect for IGD_GM, be sure to detect right size as current X intel driver (2.3.2) which has already worked out. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19agp: more boolean conversions.Dave Airlie
Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19drivers/char/agp - use boolJoe Perches
Use boolean in AGP instead of having own TRUE/FALSE -- Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-06-19agp: two-stage page destruction issueJan Beulich
besides it apparently being useful only in 2.6.24 (the changes in 2.6.25 really mean that it could be converted back to a single-stage mechanism), I'm seeing an issue in Xen Dom0 kernels, which is caused by the calling of gart_to_virt() in the second stage invocations of the destroy function. I think that besides this being a real issue with Xen (where unmap_page_from_agp() is not just a page table attribute change), this also is invalid from a theoretical perspective: One should not assume that gart_to_virt() is still valid after unmapping a page. So minimally (keeping the 2-stage mechanism) a patch like the one below would be needed. Jan Signed-off-by: Dave Airlie <airlied@redhat.com>
2008-02-05agp: remove flush_agp_mappings calls from new flush handling codeDave Airlie
Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05intel-agp: introduce IS_I915 and do some cleanups..Dave Airlie
Add a new IS_I915 and also do some checkpatch whitespace cleanups. Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05[intel_agp] fix name for G35 chipsetZhenyu Wang
Change origin chipset name i965G_1 to market name G35. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05intel-agp: fixup resource handling in flush code.Dave Airlie
The flush code resource handling was having problems where some BIOS reserve the resource in a pnp block and some don't. Also there was a bug in that configure was being called at resume and resetting some of the structs. Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05intel-agp: add new chipset IDZhenyu Wang
This one adds new pci ids for Intel intergrated graphics chipset, with gtt table access change on it and new gtt table size definition. Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05fix AGP warningAndrew Morton
drivers/char/agp/intel-agp.c: In function 'intel_i965_g33_setup_chipset_flush': drivers/char/agp/intel-agp.c:872: warning: right shift count >= width of type I wish the agp code wasn't written in a 10,000-column xterm :( Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Dave Airlie <airlied@linux.ie>
2008-02-05agp/intel: Add chipset flushing support for i8xx chipsets.Dave Airlie
This is a bit of a large hammer but it makes sure the chipset is flushed by writing out 1k of data to an uncached page. We may be able to get better information in the future on how to this better. Signed-off-by: Dave Airlie <airlied@redhat.com>