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Signed-off-by: Eric Anholt <eric@anholt.net>
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In order to improve our diagnostic capabilities following a GPU hang
and subsequent reset, we need to record the batch buffer that triggered
the error. We assume that the current batch buffer, plus a few details
about what else is on the active list, will be sufficient -- at the very
least an improvement over nothing.
The extra information is stored in /debug/dri/.../i915_error_state
following an error, and may be decoded using
intel_gpu_tools/tools/intel_error_decode.
v2: Avoid excessive work under spinlocks.
v3: Include ringbuffer for later analysis.
v4: Use kunmap correctly and record more buffer state.
v5: Search ringbuffer for current batch buffer
v6: Use a work fn for the impossible IRQ error case.
v7: Avoid non-atomic paths whilst in IRQ context.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Tools like powertop want to check the current FBC status and report it
to the user. So add a debugfs file indicating whether FBC is enabled,
and if not, why.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Ironlake (and 965GM, which this patch doesn't support) supports a
hardware performance and power management feature that allows it to
adjust to changes in GPU load over time with software help. The goal
if this is to maximize performance/power for a given workload.
This patch enables that feature, which is also a requirement for
supporting Intelligent Power Sharing, a feature which allows for
dynamic budgeting of power between the CPU and GPU in Arrandale
platforms.
Tested-by: ykzhao <yakui.zhao@intel.com>
[anholt: Resolved against the irq handler loop removal]
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Having missed the ENOMEM return via i915_gem_fault(), there are probably
other paths that I also missed. By not enabling NORETRY by default these
paths can run the shrinker and take memory from the system (but not from
our own inactive lists because our shrinker can not run whilst we hold
the struct mutex) and this may allow the system to survive a little longer
whilst our drivers consume all available memory.
References:
OOM killer unexpectedly called with kernel 2.6.32
http://bugzilla.kernel.org/show_bug.cgi?id=14933
v2: Pass gfp into page mapping.
v3: Use new read_cache_page_gfp() instead of open-coding.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: Hugh Dickins <hugh.dickins@tiscali.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Eric Anholt <eric@anholt.net>
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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This one reverts 9e3a6d155ed0a7636b926a798dd7221ea107b274.
As reported by http://bugzilla.kernel.org/show_bug.cgi?id=14485,
this dump will cause hang problem on some machine. If something
really needs this kind of full registers dump, that could be done
within intel-gpu-tools.
Cc: Ben Gamari <bgamari.foss@gmail.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Fixes a BUG_ON in kmap_atomic for the following atomic mapping with
USER0 type.
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
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IGD* isn't a useful name. Replace with the codenames, as sourced from
pci.ids.
Signed-off-by: Adam Jackson <ajax@redhat.com>
[anholt: Fixed up for merge with pineview/ironlake changes]
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Create a /debug/dri/%d/i915_wedged file to display the current wedged
status, and to enable setting that value. On an i965, this will also
trigger a GPU reset.
Useful in order to attempt to recover from some error conditions that
are not currently caught by the automatic hang detection code.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Miles Lane reported the following error:
2 locks held by cat/4179:
#0: (&p->lock){+.+.+.}, at: [<c10a3884>] seq_read+0x25/0x315
#1: (&dev_priv->mm.active_list_lock){+.+...}, at: [<c119a854>]
i915_batchbuffer_info+0x2b/0x124
Pid: 4179, comm: cat Not tainted 2.6.32-rc5-git1 #2
Call Trace:
[<c104874f>] ? __debug_show_held_locks+0x1e/0x20
[<c1023fb0>] __might_sleep+0xf0/0xf7
[<c101c393>] kmap+0x17/0x58
[<c119a8d6>] i915_batchbuffer_info+0xad/0x124
[<c10a39bf>] seq_read+0x160/0x315
[<c108fb8c>] ? rw_verify_area+0x98/0xbb
[<c10a385f>] ? seq_read+0x0/0x315
[<c1090331>] vfs_read+0x75/0xa9
[<c10903f9>] sys_read+0x3b/0x5d
[<c1002a8f>] sysenter_do_call+0x12/0x36
The fix is relatively simple, use the atomic variants of kmap() that
avoid the potential sleep.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Miles Lane <miles.lane@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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According to the docs, the ringbuffer is not allowed to wrap in the middle
of an instruction.
G45 PRM, Vol 1b, p101:
While the “free space” wrap may allow commands to be wrapped around the
end of the Ring Buffer, the wrap should only occur between commands.
Padding (with NOP) may be required to follow this restriction.
Do as commanded.
[Having seen bug reports where there is evidence of split commands, but
apparently the GPU has continued on merrily before a bizarre and untimely
death, this may or may not fix a few random hangs.]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
CC: Eric Anholt <eric@anholt.net>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Add a debugfs file to dump the entire register range. Here we
assume that reading write-only/reserved registers won't make the chip
angry. Seems to hold true, thankfully.
Signed-off-by: Ben Gamari <bgamari.foss@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Ben Gamari <bgamari.foss@gmail.com>
[anholt: hand-applied for conflicts]
Signed-off-by: Eric Anholt <eric@anholt.net>
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