Age | Commit message (Collapse) | Author |
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Fix:
WARNING: at arch/arm/mach-pxa/clock.c:69 clk_disable()
[<c002d7c8>] (dump_stack+0x0/0x14) from [<c00334f4>] (clk_disable+0x34/0xa0)
[<c00334c0>] (clk_disable+0x0/0xa0) from [<c028a43c>] (pxamci_set_ios+0x74/0xf0)
[<c028a3c8>] (pxamci_set_ios+0x0/0xf0) from [<c0281548>] (mmc_power_off+0x90/0x9c)
[<c02814b8>] (mmc_power_off+0x0/0x9c) from [<c0281a30>] (mmc_start_host+0x18/0x28)
[<c0281a18>] (mmc_start_host+0x0/0x28) from [<c02825a0>] (mmc_add_host+0xe8/0x104)
[<c02824b8>] (mmc_add_host+0x0/0x104) from [<c028a7d0>] (pxamci_probe+0x24c/0x2f4)
[<c028a584>] (pxamci_probe+0x0/0x2f4) from [<c01e5948>] (platform_drv_probe+0x20/0x24)
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Do a full scan of the directory to try and be a bit more proactive,
instead of waiting for things to break.
Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
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Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The PXA has two transmit FIFOes, each32 byte deep. when one FIFO is
full and the other one has been transmitted, they are automatically
swapped and DMA is triggered for another 32 byte burst. However, when
there is less than 32 bytes left to send, the FIFO swap has to be done
manually. This is required for some SDIO transfers which are not
required to be multiples of 32 bytes.
A DMA completion interrupt is set for each descriptor which length isn't
a multiple of 32 in order to force the FIFO swap. While at it, the DMA
interrupt handler has been made a bit more resilient against errors.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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Again, only available from PXA27x.
Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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From PXA27x, it is possible to do 4-bit data transfers.
Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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From PXA27x, it is possible to do 2048-byte block transfers.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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Pending interrupts should be determined from both I_REG and I_MASK
registers.
Signed-off-by: Bridge Wu <mingqiao.wu@gmail.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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Convert the MMC layer to use standard error codes and not its own,
incompatible values.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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Make sure all headers in the files reflect their true position
in the tree.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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... and make it depend on the response flag instead of the command type.
Signed-off-by: Nicolas Pitre <npitre@mvista.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (82 commits)
[ARM] Add comments marking in-use ptrace numbers
[ARM] Move syscall saving out of the way of utrace
[ARM] 4360/1: S3C24XX: regs-udc.h remove unused macro
[ARM] 4358/1: S3C24XX: mach-qt2410.c: remove linux/mmc/protocol.h header
[ARM] mm 10: allow memory type to be specified with ioremap
[ARM] mm 9: add additional device memory types
[ARM] mm 8: define mem_types table L1 bit 4 to be for ARMv6
[ARM] iop: add missing parens in macro
[ARM] mm 7: remove duplicated __ioremap() prototypes
ARM: OMAP: fix OMAP1 mpuio suspend/resume oops
ARM: OMAP: MPUIO wake updates
ARM: OMAP: speed up gpio irq handling
ARM: OMAP: plat-omap changes for 2430 SDP
ARM: OMAP: gpio object shrinkage, cleanup
ARM: OMAP: /sys/kernel/debug/omap_gpio
ARM: OMAP: Implement workaround for GPIO wakeup bug in OMAP2420 silicon
ARM: OMAP: Enable 24xx GPIO autoidling
[ARM] 4318/2: DSM-G600 Board Support
[ARM] 4227/1: minor head.S fixups
[ARM] 4328/1: Move i.MX UART regs to driver
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Clean up the drivers/mmc directory by moving card and host drivers
into subdirectories.
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
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