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Enable multiple rx rings for older NX2031 chip, firmware 3.4.336
or newer supports this feature.
Signed-off-by: Amit Kumar Salecha <amit@netxen.com>
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Replace superfluous wrapper functions with two macros:
NXWR32 replaces netxen_nic_reg_write, netxen_nic_write_w0,
netxen_nic_read_w1, netxen_crb_writelit_adapter.
NXRD32 replaces netxen_nic_reg_read, netxen_nic_read_w0,
netxen_nic_read_w1.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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o remove unnecessary length parameter since register access
width is fixed 4 byte.
o remove superfluous pci_read_normalize and pci_write_normalize
functions.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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o move tx stuff into nx_host_tx_ring structure, this will
help managing multiple tx rings in future.
o sanitize some variable names
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Rearrange members to align them at right offset.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch enables the load balancing capability of firmware
and hardware to spray traffic into different cpus through
separate rx msix interrupts.
The feature is being enabled for NX3031, NX2031 (old) will be
enabled later. This depends on msi-x and compatibility with
msi and legacy is maintained by enabling single rx ring.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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o remove max_ prefix from ring sizes, since they don't really
represent max possible sizes.
o cleanup naming of rx ring types (normal, jumbo, lro).
o simplify logic to choose rx ring size, gig ports get half
rx ring of 10 gig ports.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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MAX_RCV_CTX was set to 1, there's only rx context per
PCI function.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Extend copyright into 2009 and update address.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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o Set restricted (little endian) data types in firmware command
requests and responses.
o Remove unnecessary conversion to LE when writing registers.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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For NX3031, multicast filtering, promisc mode, and max frame size
setting is handled by firmware, driver needs to send request to
enable/disable it.
For old chip revisions / firmware, driver still sets it directly.
Added function pointer to set mtu according to chip revision.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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NX3031 supports cut-through operation where ingress packets are
directly dma'ed into host buffers to reduce latency.
This requires larger dma buffers (2kb) and different alignemnt.
The buffer posting logic is changed a bit. The free rx buffers
are maintained in linked list, since the received reference
handles can be out of order. However rx descriptors are still
posted sequentially, indexed by producer.
Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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