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Ports 0 and 1 of the NIU device are connected to extended fabric
through SERDES. Ports 2 and 3 are connected using RGMII Fiber mode.
[ Coding style cleanups... -DaveM ]
Signed-off-by: Matheos Worku <matheos.worku@sun.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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From: Matheos Worku <Matheos.Worku@Sun.COM>
1) niu_enable_alt_mac() needs to be adjusted so that the mask
is computed properly for the BMAC case.
2) BMAC has 6 alt MAC addresses available, not 7.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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BMAC port alternate MAC address index needs to start at 1. Index 0 is
used for the main MAC address.
Signed-off-by: Matheos Worku <matheos.worku@sun.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The code in link_status_1g() computes the active speed
and duplex but does not update the link config state
with those values.
As a result the link speed is not reported correctly
and the XIF is not reprogrammed properly on link up
events.
Signed-off-by: David S. Miller <davem@davemloft.net>
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From: Mirko Lindner <mlindner@marvell.com>
This patch makes necessary changes in the Neptune driver to support
the new Marvell PHY. It also adds support for the LED blinking
on Neptune cards with Marvell PHY. All registers are using defines
in the niu.h header file as is already done for the BCM8704 registers.
[ Coding style, etc. cleanups -DaveM ]
Signed-off-by: David S. Miller <davem@davemloft.net>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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It is possible for the TX ring to have packets sit in it for unbounded
amounts of time.
The only way to defer TX interrupts in the chip is to periodically set
"mark" bits, when processing of a TX descriptor with the mark bit set
is complete it triggers the interrupt for the TX queue's LDG.
A consequence of this kind of scheme is that if packet flow suddenly
stops, the remaining TX packets will just sit there.
If this happens, since those packets could be charged to TCP socket
send queues, such sockets could get stuck.
The simplest solution is to divorce the socket ownership of the packet
once the device takes the SKB, by using skb_orphan() in
niu_start_xmit().
In hindsight, it would have been much nicer if the chip provided two
interrupt sources for TX (like basically every other ethernet chip
does). Namely, keep the "mark" bit, but also signal the LDG when the
TX queue becomes completely empty. That way there is no need to have
a deadlock breaker like this.
Signed-off-by: David S. Miller <davem@davemloft.net>
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Noticed by Paul Lodridge.
Signed-off-by: David S. Miller <davem@davemloft.net>
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niu_slowpath_interrupt() expects values to be setup in lp->{v0,v1,v2}
but they aren't. That's only done by niu_schedule_napi() which is
done later in the interrupt path.
If niu_rx_error() returns zero, and v0 is clear, hit the
RX_DMA_CTL_STATE register with a RX_DMA_CTL_STAT_MEX.
Only emit verbose RX error logs if a fatal channel or port error is
signalled. Other cases will be recorded into statistics by
niu_log_rxchan_errors().
Signed-off-by: David S. Miller <davem@davemloft.net>
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The LED in the current driver will not be controlled correctly. During
a link change the carrier of the link is not available and the LED
will never turn on.
Signed-off-by: David S. Miller <davem@davemloft.net>
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I get the following warning from a powerpc allyesconfig of current
mainline:
drivers/net/niu.c: In function 'niu_size_rbr':
drivers/net/niu.c:3113: warning: large integer implicitly truncated to unsigned type
PAGE_SIZE in this case is 64KB, so I don't quite get why gcc can't
tell that the line in question will never be reached.
I suggest the following instead, but I can unfortunately not do
anything but build test it.
Also, the driver does some other checks to make sure that PAGE_SIZE is
a power of two (BUILD_BUG_ON() in niu_init()), doesn't seem like that
could ever be untrue? Or are there really archs with non-power-of-two
PAGE_SIZE?
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
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By the time we get to that switch by PHY type, we have 8bit
value. No need to keep it in u64 when u8 would do.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Noticed by Coverity checker and reported by Adrian Bunk.
Signed-off-by: David S. Miller <davem@davemloft.net>
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With cleanup suggestions and bugs spotted by Stephen Hemminger,
Ingo Oeser, Matheos Worku, and Oliver Hartkopp.
Signed-off-by: David S. Miller <davem@davemloft.net>
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