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This patch modifies how the tg3 driver handles device firmware.
The patch starts by consolidating David Woodhouse's earlier patch under
the same name. Specifically, the patch moves the request_firmware call
into a separate tg3_request_firmware() function and calls that function
from tg3_open() rather than tg3_init_one().
The patch then goes on to limit the number of devices that will make
request_firmware calls. The original firmware patch unnecessarily
requested TSO firmware for devices that did not need it. This patch
reduces the set of devices making TSO firmware patches to approximately
the following device set : 5703, 5704, and 5705.
Finally, the patch reduces the effects of a request_firmware() failure.
For those devices that are requesting TSO firmware, the driver will turn
off the TSO capability. If TSO firmware becomes available at a later
time, the device can be closed and then opened again to reacquire the
TSO capability.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Firmware blob looks like this...
u8 firmware_major
u8 firmware_minor
u8 firmware_fix
u8 pad
__be32 start_address
__be32 length (total, including BSS sections to be zeroed)
data... (in __be32 words, which is native for the firmware)
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch cleans up the tg3 header file by removing the preprocessor
definitions for standard PCI configuration space registers. The driver
should be using the standard definitions when needed. The patch
continues by removing redundant PHY related definitions and reorganizes
some of the remaining entries.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch removes the pci_bist and pci_hdr_type members from the
device structure and removes the code that references them. They are
not really used.
The patch rounds out the changes by moving the pci_cmd member to plug
a structure hole that would have been created. On 32-bit systems, this
movement removes a subsequent structure hole later in the structure. On
64-bit systems though, the movement merely consolidates two holes into
one larger hole.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch attempts to make the relationship between IPV6 checksum
offload and IPV6 LSO more obvious. The patch also toggles a bit
needed for IPV6 LSO on 5785 and 57780 devices.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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flags used within drivers for indicating tx and rx flow control are
defined in 4 drivers (and probably more), move these constants to mii.h.
The 3 SMSC drivers use the same constants (FLOW_CTRL_TX), but TG3 uses
TG3_FLOW_CTRL_TX, so this patch also renames the constants within TG3.
Signed-off-by: Steve Glendinning <steve.glendinning@smsc.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for the 57780 ASIC revision.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch extracts the bootcode firmware version from the alternate
selfboot patch NVRAM format. This format is used on the 5784, 5761 and
some newer devices.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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GPHY Autopowerdown (APD) is a way to save power when energy is not
detected on the wire. At the moment, only the 5784 and 5761 are
capable of enabling this mode.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch disables CLKREQ at 10Mbps and 100Mbps to workaround a TX BD
corruption issue. This problem only affects the 5784 and 5761 (and
57780 AX) ASIC revisions.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch refines support for the 5785 device.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch allows WOL to be enabled for Broadcom phys under phylib
control. The only exception is the AC131, which has a completely
different register set.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch reclaims the TG3_FLG3_5761_5784_AX_FIXES flag. It only
used twice in non-fast paths. This patch also consolidates some other
places where specific 5784 AX chip revisions can be generalized.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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DASH firmware runs on the APE side of the chip, but it requires a few MAC
to be programmed correctly.
When WOL is enabled and management firmware is disabled, incoming
packets are evaluated and discarded at the chip's rule processor.
When management firmware is enabled, the hardware must be informed that
there are agents further up the stack that still use the incoming
frames. Normally management firmware will configure the MAC correctly
on its own, but there can be cases where the setting could get clobbered
by the driver. The first hunk of this patch preserves this setting.
The second hunk of this patch wipes out the driver present signature of
the APE memory space. By doing so, the DASH firmware can assume
driver absent behavior.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for the 5761S chip variants.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch introduces mdiobus_alloc() and mdiobus_free(), and
makes all mdio bus drivers use these functions to allocate their
struct mii_bus'es dynamically.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Andy Fleming <afleming@freescale.com>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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The git commit 7c5026aa9b81dd45df8d3f4e0be73e485976a8b6 ("tg3: Add
link state reporting to UMP firmware") introduced code that waits for
previous firmware events to be serviced before attempting to submit a
new event. Unfortunately that patch contained a bug that cause the
driver to wait 2.5 seconds, rather than 2.5 milliseconds as intended.
This patch fixes that bug.
This bug revealed that not all firmware versions service driver events
though. Since we do not know which versions of the firmware do and don't
service these events, the driver needs some way to minimize the effects
of the delay. This patch solves the problem by recording a jiffies
timestamp when it submits an event to the hardware. If the jiffies
counter shows that 2.5 milliseconds have already passed, a wait is not
needed and the driver can proceed to submit a new event.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Broadcom's DASH (Desktop and mobile Architecture for System Hardware)
implementation requires that the driver preserve particular register
settings. If the driver does not preserve them, communication with
the DASH firmware will be lost.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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If the driver resets the chip while the APE is performing a register
access, that register access will never complete and the APE will hang
indefinitely. To prevent this race condition, the driver must acquire
an APE mutex before resetting the chip. The APE will not attempt a
register access until it acquires this lock.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds some options obtained through shared memory.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch added the 5785 device ID and ASIC revision to the code.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch introduces the libphy support.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch introduces code to register and unregister the tg3 mdio bus
with the system.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch introduces the TG3_FLG3_USE_PHYLIB flag and applies it to
some select places. This work makes later patches a little easier to
read.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch applies cleanups that would otherwise clutter later
patches.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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All variants of the 5714, 5715, and 5780 offer a feature called the
"Universal Management Port". This feature is implemented in firmware
and is largely transparent to the driver, except...
It turns out that the UMP firmware needs to know the current status
of the link. Because the firmware cannot touch the PHY registers while
the driver is in control of the device, it needs the driver to report
link status changes through an additional handshaking mechanism.
Without this handshake, it has been observed in the field that the UMP
firmware will not operate correctly.
This patch implements the new handshake with the UMP firmware. Since
the handshake uses the same mechanism ASF heartbeats use, code was
added to detect and wait for completion of a pending previous event.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The 5761 NVRAM sizes assigned to the nvram_size member are half as big
as they should be. This patch corrects the NVRAM sizes and replaces
the hardcoded constants with preprocessor constants for readability.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The MI clock is not configured correctly on adapters with the CPMU
present. The tg3 driver has code which statically sets the MI clock to
be a fraction of the speed at which the core clock is running.
However, the CPMU can change the adapter's core clock frequency based
on operating conditions. Consequently, the MI will run slow when the
core's clock has been slowed down.
There is a new 500KHz constant frequency clock available on adapters
with a CPMU. This patch removes the static core clock scaling and
configures the MI clock to use this new 500KHz clock instead.
Running the MI clock at slower speeds will not directly result in data
corruption, but it does challenge the PHY read and write routine timeouts.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Herbert Xu's commit fb93134dfc2a6e6fbedc7c270a31da03fce88db9, entitled
"[TCP]: Fix size calculation in sk_stream_alloc_pskb", has triggered a
bug in the 5701 where the 5701 DMA engine will corrupt outgoing
packets. This problem only happens when the starting address of the
packet matches a certain range of offsets and only when the 5701 is
placed downstream of a particular Intel bridge.
This patch detects the problematic bridge and if present, readjusts the
starting address of the packet data to a dword aligned boundary.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The 5784 B step and newer chips require the PHY DSPs to be fine-tuned
based on one-time programmable values stored in the chip. This is
essential to achieve optimal PHY operations especially when using
long cables. We also need to properly handle the 10Mbit RX bit in the
CPMU_CTRL register during PHY reset.
Update version to 3.89.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch replaces magic values with preprocessor definitions for
the sg_dig_ctrl and sg_dig_status registers. This is preparatory work
for the next patch.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch removes the TX and RX flow control flags from tg3_flags and
adds two new flow control variables, flowctrl and active_flowctrl.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds the A1 revision of 5784, 5764, and 5761, and applies all
previous bugfixes. In places where the list of devices gets too long,
the patch uses a new TG3_FLG3_5761_5784_AX_FIXES flag instead.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Internal hardware timers become inaccurate after link events. Clock
frequency switches performed by the CPMU fail to adjust timer
prescalers. The fix is to detect core clock frequency changes during
link events and adjust the timer prescalers accordingly.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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New CPMU devices contend with the GPHY for power management. The GPHY
autopowerdown feature is enabled by default in the PHY and thus needs to
be disabled after every PHY reset.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Newer devices contain bootcode in the chip's private ROM area. This
bootcode is called selfboot. Selfboot can be patched in the device's
NVRAM and the patches can have several formats. In one particular
format, the checksum calculation needs to be slightly modified. This
patch adjusts the NVRAM test code for that case, and add support for the
missing formats.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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5784 and 5764 devices lock up when the link speed is 10Mbps, the CPMU
link speed mode is enabled, and the MAC clock is running at 1.5Mhz. The
fix is to run the MAC clock at faster speeds.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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5784 and 5764 devices fail to link / pass traffic after one load /
unload cycle. This happens because of a hardware bug in the new CPMU.
During normal operation, the MAC depends on the PHY clock being
available. When the PHY is powered down, the clock the MAC depends on
is disabled. The fix is to switch the MAC clock to an alternate source
before powering down the PHY, and to restore the MAC clock to the PHY
source upon device resume.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch changes the way the driver works with the PCI command
register. It adjusts the access size from dwords to words. This patch
is done both as a PCI configuration space cleanup and as preparatory
work for PCI error recovery.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch appends the management firmware version to the bootcode
firmware string reported through ethtool.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch enables WOL by default if out-of-box WOL is enabled in the
NVRAM.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds rest of the miscellaneous code required to support the
5761.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for the new APE block, present in 5761 chips.
APE stands for Application Processing Engine. The primary function of
the APE is to process manageability traffic, such as ASF.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds a new 5761-specific NVRAM strapping decode routine.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds the support for 5784 and 5764 devices.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Newer products change the way the ASIC revision is obtained. This patch
implements how the driver will extract the revision number.
This patch also adds preliminary CPMU support. CPMU stands for Central
Power Management Unit. The CPMU's role is to put the chip into lower
power states when the operating conditions allow it.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Newer tg3 devices shuffle around the registers in PCI configuration
space. This patch changes the way the driver accesses the PCI
capabilities registers. Hardcoded register locations are replaced with
offsets from pci_find_capability() return values.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Several devices have multiple independant RX queues per net
device, and some have a single interrupt doorbell for several
queues.
In either case, it's easier to support layouts like that if the
structure representing the poll is independant from the net
device itself.
The signature of the ->poll() call back goes from:
int foo_poll(struct net_device *dev, int *budget)
to
int foo_poll(struct napi_struct *napi, int budget)
The caller is returned the number of RX packets processed (or
the number of "NAPI credits" consumed if you want to get
abstract). The callee no longer messes around bumping
dev->quota, *budget, etc. because that is all handled in the
caller upon return.
The napi_struct is to be embedded in the device driver private data
structures.
Furthermore, it is the driver's responsibility to disable all NAPI
instances in it's ->stop() device close handler. Since the
napi_struct is privatized into the driver's private data structures,
only the driver knows how to get at all of the napi_struct instances
it may have per-device.
With lots of help and suggestions from Rusty Russell, Roland Dreier,
Michael Chan, Jeff Garzik, and Jamal Hadi Salim.
Bug fixes from Thomas Graf, Roland Dreier, Peter Zijlstra,
Joseph Fannin, Scott Wood, Hans J. Koch, and Michael Chan.
[ Ported to current tree and all drivers converted. Integrated
Stephen's follow-on kerneldoc additions, and restored poll_list
handling to the old style to fix mutual exclusion issues. -DaveM ]
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Tina Yang <tina.yang@oracle.com> discovered an MSI related problem
when doing kdump. The problem is that the kexec kernel is booted
without going through system reset, and as a result, MSI may already
be enabled when tg3_init_one() is called. tg3_init_one() calls
pci_save_state() which will save the stale MSI state. Later on in
tg3_open(), we call pci_enable_msi() to reconfigure MSI on the chip
before we reset the chip. After chip reset, we call
pci_restore_state() which will put the stale MSI address/data back
onto the chip.
This is no longer a problem in the latest kernel because
pci_restore_state() has been changed to restore MSI state from
internal data structures which will guarantee restoring the proper
MSI state.
But I think we should still fix it. Our save and restore sequence
can still cause very subtle problems down the road. The fix is to
have our own functions save and restore precisely what we need. We
also change it to save and restore state inside tg3_chip_reset() in a
more straight forward way.
Thanks to Tina for helping to test and debug the problem.
[ Bump driver version and release date. -DaveM ]
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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