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path: root/drivers/pci/hotplug/pciehprm_acpi.c
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2005-11-10[PATCH] PCI: fix namespace clashesRajesh Shah
Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10[PATCH] pciehp: clean-up how we request control of hotplug hardwarerajesh.shah@intel.com
This patch further tweaks how we request control of hotplug controller hardware from BIOS. We first search the ACPI namespace corresponding to a specific hotplug controller looking for an _OSC or OSHP method. On failure, we successively move to the ACPI parent object, till we hit the highest level host bridge in the hierarchy. This allows for different types of BIOS's which place the _OSC/OSHP methods at various places in the acpi namespace, while still not encroaching on the namespace of some other root level host bridge. This patch also introduces a new load time option (pciehp_force) that allows us to bypass all _OSC/OSHP checking. Not supporting these methods seems to be be the most common ACPI firmware problem we've run into. This will still _not_ allow the pciehp driver to work correctly if the BIOS really doesn't support pciehp (i.e. if it doesn't generate a hotplug interrupt). Use this option with caution. Some BIOS's may deliberately not build any _OSC/OSHP methods to make sure it retains control the hotplug hardware. Using the pciehp_force parameter for such systems can lead to two separate entities trying to control the same hardware. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10[PATCH] pciehp: request control of each hotplug controller individuallyrajesh.shah@intel.com
This patch tweaks the way pciehp requests control of the hotplug hardware from BIOS. It now tries to invoke the ACPI _OSC method for a specific hotplug controller only, rather than walking the entire acpi namespace invoking all possible _OSC methods under all host bridges. This allows us to gain control of each hotplug controller individually, even if BIOS fails to give us control of some other hotplug controller in the system. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10[PATCH] pciehp: miscellaneous cleanupsrajesh.shah@intel.com
Remove un-necessary header includes, remove dead code, remove some hardcoded constants... Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10[PATCH] pciehp: reduce dependence on ACPIrajesh.shah@intel.com
Reduce the PCI Express hotplug driver's dependence on ACPI. We don't walk the acpi namespace anymore to build a list of bridges and devices. We go to ACPI only to run the _OSC or _OSHP methods to transition control of hotplug hardware from system BIOS to the hotplug driver, and to run the _HPP method to get hotplug device parameters like cache line size, latency timer and SERR/PERR enable from BIOS. Note that one of the side effects of this patch is that pciehp does not automatically enable the hot-added device or its DMA bus mastering capability now. It expects the device driver to do that. This may break some drivers and we will have to fix them as they are reported. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10[PATCH] patch 1/8] pciehp: use the PCI core for hotplug resource managementrajesh.shah@intel.com
This patch converts the pci express hotplug controller driver to use the PCI core for resource management. This eliminates a lot of duplicated code and integrates pciehp with the system's normal PCI handling code. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-09-09[PATCH] PCI: Fix PCI bus mastering enable problem in pciehpRajesh Shah
Martin Franc reported that the pciehp driver was not enabling bus master capability on his hot-plugged card. pciehprm_enable_card() was updating the PCI command register only if _HPP indicated a value for SERR or PERR that was different from the current setting. I don't have hardware that reproduces this problem, but Martin reports that this patch fixes the problem for him. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> From rzarev@its.caltech.edu Tue Sep 6 18:29:50 2005 Date: Tue, 6 Sep 2005 13:39:32 -0700 (PDT) From: Rumen Ivanov Zarev <rzarev@its.caltech.edu> Message-Id: <200509062039.j86KdWMr014934@inky.its.caltech.edu> To: gregkh@suse.de Subject: PCI: Unhide SMBus on Compaq Evo N620c Cc: linux-kernel@vger.kernel.org Trivial patch against 2.6.13 to unhide SMBus on Compaq Evo N620c laptop using Intel 82855PM chipset. Signed-off-by: Rumen Zarev <rzarev@caltech.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> --- drivers/pci/quirks.c | 6 ++++++ 1 file changed, 6 insertions(+) --- gregkh-2.6.orig/drivers/pci/quirks.c 2005-09-09 10:28:55.000000000 -0700 +++ gregkh-2.6/drivers/pci/quirks.c 2005-09-09 13:51:44.000000000 -0700 @@ -876,6 +876,12 @@ static void __init asus_hides_smbus_host case 0xC00C: /* Samsung P35 notebook */ asus_hides_smbus = 1; } + } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ)) { + if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) + switch(dev->subsystem_device) { + case 0x0058: /* Compaq Evo N620c */ + asus_hides_smbus = 1; + } } } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82845_HB, asus_hides_smbus_hostbridge );
2005-08-16[PATCH] PCI Hotplug: new contact infoKristen Accardi
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-16Linux-2.6.12-rc2Linus Torvalds
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!