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Remove unused global SYSRQ_KEY from ppc and powerpc
Remove unused define SYSRQ_KEY from sh/sh64 and h8300
Remove unused pckbd_sysrq_xlate and kbd_sysrq_xlate usage
Signed-off-by: Olaf Hering <olaf@aepfle.de>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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On systems running with virtual cpus there is optimization potential in
regard to spinlocks and rw-locks. If the virtual cpu that has taken a lock
is known to a cpu that wants to acquire the same lock it is beneficial to
yield the timeslice of the virtual cpu in favour of the cpu that has the
lock (directed yield).
With CONFIG_PREEMPT="n" this can be implemented by the architecture without
common code changes. Powerpc already does this.
With CONFIG_PREEMPT="y" the lock loops are coded with _raw_spin_trylock,
_raw_read_trylock and _raw_write_trylock in kernel/spinlock.c. If the lock
could not be taken cpu_relax is called. A directed yield is not possible
because cpu_relax doesn't know anything about the lock. To be able to
yield the lock in favour of the current lock holder variants of cpu_relax
for spinlocks and rw-locks are needed. The new _raw_spin_relax,
_raw_read_relax and _raw_write_relax primitives differ from cpu_relax
insofar that they have an argument: a pointer to the lock structure.
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (108 commits)
sh: Fix occasional flush_cache_4096() stack corruption.
sh: Calculate shm alignment at runtime.
sh: dma-mapping compile fixes.
sh: Initial vsyscall page support.
sh: Clean up PAGE_SIZE definition for assembly use.
sh: Selective flush_cache_mm() flushing.
sh: More intelligent entry_mask/way_size calculation.
sh: Support for L2 cache on newer SH-4A CPUs.
sh: Update kexec support for API changes.
sh: Optimized readsl()/writesl() support.
sh: Report movli.l/movco.l capabilities.
sh: CPU flags in AT_HWCAP in ELF auxvt.
sh: Add support for 4K stacks.
sh: Enable /proc/kcore support.
sh: stack debugging support.
sh: select CONFIG_EMBEDDED.
sh: machvec rework.
sh: Solution Engine SH7343 board support.
sh: SH7710VoIPGW board support.
sh: Enable verbose BUG() support.
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Consistently use MAX_ERRNO when checking for errors in __syscall_return().
[ralf@linux-mips.org: build fix]
Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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Set the SHM alignment at runtime, based off of probed cache desc.
Optimize get_unmapped_area() to only colour align shared mappings.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Silly bug, make it build again..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements initial support for the vsyscall page on SH.
At the moment we leave it configurable due to having nommu
to support from the same code base. We hook it up for the
signal trampoline return at present, with more to be added
later, once uClibc catches up.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We want to be able to use PAGE_SIZE all over the place,
this is the same approach adopted by other architectures..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements preliminary support for the L2 caches found
on newer SH-4A CPUs.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This was falling a bit behind..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Implement optimized copies of readsl()/writesl().
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add llsc to cpu_flags[] and comment cpu-features.h.
Signed-off-by: Jamie Lenehan <nynaeve@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Encode processor flags in AT_HWCAP in the ELF auxiliary vector.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This enables support for 4K stacks on SH.
Currently this depends on DEBUG_KERNEL, but likely all boards
will switch to this as the default in the future.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds a DEBUG_STACK_USAGE and DEBUG_STACKOVERFLOW for SH.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Some more machvec overhauling and setup code cleanup. Kill off
get_system_type() and platform_setup(), we can do these both
through the machvec. While we're add it, kill off more useless
mach.c's and drop some legacy cruft from setup.c.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the SE7343 board.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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None of these have been maintained in years, and no one seems to
be interested in doing so, so just get rid of them.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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SH-4A implements LL/SC instructions, so we implement a simple
set of atomic operations using these.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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With the new RTC class driver, we can get rid of most of the
old left over cruft.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the SHMIN SH7706 board.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the aforementioned CPU subtypes, and cleans
up some build issues encountered as a result.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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sh-sci needs to be able to define its number of ports to
support, we do this with a config option, like most other
ports do.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements support for ppoll() and pselect6()..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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A few more outstanding nommu fixups..
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This fixes up some of the various outstanding nommu bugs on
SH.
Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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nommu needs to be able to shift PAGE_OFFSET, so we switch it to a
non-user-visible CONFIG_PAGE_OFFSET and use that in the few places
where it matters.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Other boards require this as well, so move it out of the
rts7751r2d directory.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This implements initial math-emu support, aimed primarily at SH-3.
Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We have a clash with RTC_CLASS over these names, so we
change them..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Drop TIF_USERSPACE and add addr_limit to the thread_info struct.
Subsequently, use that for address checking in strnlen_user() to
ward off bogus -EFAULTs.
Make __strnlen_user() return 0 on exception, rather than -EFAULT.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Nothing exciting here, just trivial fixes..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This cleans up quite a lot of the PCI mess that we
currently have, and attempts to consolidate the
duplication in the SH7780 and SH7751 PCI controllers.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Some kgdb cleanup. Move hexchars/highhex/lowhex to the header, so it can
be reused by sh-sci. Also drop silly ctrl_inl/outl() overloading being
done by the kgdb stub.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds some simple PM stubs and the basic APM interfaces,
primarily for use by hp6xx, where the existing userland
expects it.
Signed-off-by: Andriy Skulysh <askulysh@gmail.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Drop _PAGE_SHARED/_PAGE_U0_SHARED and document Linux PTE encodings in
the PTEL value. Preserve the swap cache entry encoding semantics for
now, though it will need rework to free up _PAGE_WT from _PAGE_FILE.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Make __xchg() a macro, so that gcc 4.0 doesn't blow up thanks to
always_inline..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Initial register bank cleanup. Make SR.RB configurable, and add some
preliminary documentation on register bank usage within the kernel.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the Renesas SH7780 development boards,
R7780RP and R7780MP.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Rewrite the store queue API for a per-cpu interface in the driver
model. The old miscdevice is dropped, due to TASK_SIZE limitations,
and no one was using it anyways.
Carve up and allocate store queue space with a bitmap, back sq
mapping objects with a slab cache, and let userspace worry about
its own prefetching.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This updates the various boards for some of the recent I/O routine
updates.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We need this set to something sensible anywhere were we have
an aliasing dcache..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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ioremap() overhaul. Add support for transparent PMB mapping, get rid of
p3_ioremap(), etc. Also drop ioremap() and iounmap() routines from the
machvec, as everyone can use the generic ioremap() API instead. For PCI
memory apertures and other special cases, use the pci_iomap() API, as
boards are already required to get the mapping right there.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Cleanup of page table allocators, using generic folded PMD and PUD
helpers. TLB flushing operations are moved to a more sensible spot.
The page fault handler is also optimized slightly, we no longer waste
cycles on IRQ disabling for flushing of the page from the ITLB, since
we're already under CLI protection by the initial exception handler.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add support for 32-bit physical addressing through the SH-4A
Privileged Space Mapping Buffer (PMB).
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Add support for the titan board.
Signed-off-by: Jamie Lenehan <lenehan@twibble.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Currently when making changes to control registers, we
typically need some time for changes to take effect (8
nops, generally). However, for sh4a we simply need to
do an icbi..
This is a simple patch for implementing a general purpose
ctrl_barrier() which functions as a control register write
barrier. There's some additional documentation in the patch
itself, but it's pretty self explanatory.
There were also some places where we were not doing the
barrier, which didn't seem to have any adverse effects on
legacy parts, but certainly did on sh4a. It's safer to have
the barrier in place for legacy parts as well in these cases,
though this does make flush_tlb_all() more expensive (by an
order of 8 nops). We can ifdef around the flush_tlb_all()
case for now if it's clear that all legacy parts won't have
a problem with this.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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This adds support for the I-O DATA Landisk.
Signed-off-by: kogiidena <kogiidena@eggplant.ddo.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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Drop virt_to_bus() from sg_dma_address() so libata builds.
While we're at it, move sg_dma_address() and sg_dma_len()
from pci.h to scatterlist.h.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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We had a pretty interesting oops happening, where copy_user_page()
was down()'ing p3map_sem[] with a bogus offset (particularly, an
offset that hadn't been initialized with sema_init(), due to the
mismatch between cpu_data->dcache.n_aliases and what was assumed
based off of the old CACHE_ALIAS value).
Luckily, spinlock debugging caught this for us, and so we drop
the old hardcoded CACHE_ALIAS for sh4 completely and rely on the
run-time probed cpu_data->dcache.alias_mask. This in turn gets
the p3map_sem[] index right, and everything works again.
While we're at it, also convert to 4-level page tables..
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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