From 08d9d1c4d44ce43856da048cb0737ef769b61e9a Mon Sep 17 00:00:00 2001 From: David Daney Date: Wed, 17 Dec 2008 18:19:18 -0800 Subject: MIPS: Fix preprocessor warnings flaged by GCC 4.4 Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/elf.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h index a8eac1697b3..d58f128aa74 100644 --- a/arch/mips/include/asm/elf.h +++ b/arch/mips/include/asm/elf.h @@ -232,7 +232,7 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; */ #ifdef __MIPSEB__ #define ELF_DATA ELFDATA2MSB -#elif __MIPSEL__ +#elif defined(__MIPSEL__) #define ELF_DATA ELFDATA2LSB #endif #define ELF_ARCH EM_MIPS -- cgit v1.2.3 From ed2b03ed3cec2a4719d04ef208319f9de6a4258a Mon Sep 17 00:00:00 2001 From: David Daney Date: Wed, 17 Dec 2008 13:28:39 -0800 Subject: MIPS: MIPS64R2: Fix buggy __arch_swab64 The way the code is written it was assuming dshd has the function of a hypothetical dshw instruction ... Signed-off-by: David Daney Signed-off-by: Ralf Baechle --- arch/mips/include/asm/byteorder.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/mips/include/asm/byteorder.h b/arch/mips/include/asm/byteorder.h index 2988d29a086..33790b9e0cc 100644 --- a/arch/mips/include/asm/byteorder.h +++ b/arch/mips/include/asm/byteorder.h @@ -50,9 +50,8 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) static inline __attribute_const__ __u64 __arch_swab64(__u64 x) { __asm__( - " dsbh %0, %1 \n" - " dshd %0, %0 \n" - " drotr %0, %0, 32 \n" + " dsbh %0, %1\n" + " dshd %0, %0" : "=r" (x) : "r" (x)); -- cgit v1.2.3