From 8361cd79f2434d43054be894baf08a74dae5f8c0 Mon Sep 17 00:00:00 2001 From: Olaf Hering Date: Sat, 10 Feb 2007 21:36:14 +0100 Subject: add delay around sl82c105_reset_engine calls The hald media changed polling does really confuse things. Noone knows why the delays are needed, but they give us access to the CD. An udelay(50) will give reliable access to the drive, but there is still one (or more) EH reset. The drive works without EH resets with udelay(100). Signed-off-by: Olaf Hering Signed-off-by: Jeff Garzik --- drivers/ata/pata_sl82c105.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/ata/pata_sl82c105.c b/drivers/ata/pata_sl82c105.c index f2fa158d07c..96e890fd645 100644 --- a/drivers/ata/pata_sl82c105.c +++ b/drivers/ata/pata_sl82c105.c @@ -187,7 +187,9 @@ static void sl82c105_bmdma_start(struct ata_queued_cmd *qc) { struct ata_port *ap = qc->ap; + udelay(100); sl82c105_reset_engine(ap); + udelay(100); /* Set the clocks for DMA */ sl82c105_configure_dmamode(ap, qc->dev); @@ -216,6 +218,7 @@ static void sl82c105_bmdma_stop(struct ata_queued_cmd *qc) ata_bmdma_stop(qc); sl82c105_reset_engine(ap); + udelay(100); /* This will redo the initial setup of the DMA device to matching PIO timings */ -- cgit v1.2.3