From 82e14a6215cbc9804ecc35281e973c6c8ce22fe7 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 14 Oct 2008 11:28:58 -0700 Subject: agp: Fix stolen memory counting on G4X. On the GM45, the amount of stolen memory mapped to the GTT was underestimated, even though we had 508KB more available since the GTT doesn't take from stolen memory. On the non-GM45 G4X, we overestimated how much stolen was mapped to the GTT by 4KB, resulting in GPU page faults when that page was accessed. This update requires a corresponding update to xf86-video-intel to work correctly. Signed-off-by: Eric Anholt Signed-off-by: Dave Airlie --- drivers/char/agp/intel-agp.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 016fdf0623a..f1fe7490131 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -54,8 +54,7 @@ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965Q_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965G_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GM_HB || \ - agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB || \ - agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB) + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_82965GME_HB) #define IS_G33 (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G33_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q35_HB || \ @@ -63,7 +62,8 @@ #define IS_G4X (agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_IGD_E_HB || \ agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_Q45_HB || \ - agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB) + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_G45_HB || \ + agp_bridge->dev->device == PCI_DEVICE_ID_INTEL_GM45_HB) extern int agp_memory_reserved; @@ -525,8 +525,10 @@ static void intel_i830_init_gtt_entries(void) size += 4; } else if (IS_G4X) { /* On 4 series hardware, GTT stolen is separate from graphics - * stolen, ignore it in stolen gtt entries counting */ - size = 0; + * stolen, ignore it in stolen gtt entries counting. However, + * 4KB of the stolen memory doesn't get mapped to the GTT. + */ + size = 4; } else { /* On previous hardware, the GTT size was just what was * required to map the aperture. -- cgit v1.2.3 From 44d494417278e49f5b42bd3ded1801b6d2254db8 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Tue, 14 Oct 2008 17:18:45 -0700 Subject: agp/intel: Reduce extraneous PCI posting reads during init Instead of doing a posting read after each GTT entry update, do a single one at the end of the writes. This should reduce boot time a tiny amount by avoiding a lot of extra uncached reads. Signed-off-by: Keith Packard Signed-off-by: Eric Anholt Signed-off-by: Dave Airlie --- drivers/char/agp/intel-agp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index f1fe7490131..81f09424447 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c @@ -214,8 +214,8 @@ static int intel_i810_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = 0; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); - readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI posting. */ } + readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); /* PCI posting. */ } global_cache_flush(); return 0; @@ -775,8 +775,8 @@ static int intel_i830_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.registers+I810_PTE_BASE+(i*4)); - readl(intel_private.registers+I810_PTE_BASE+(i*4)); /* PCI Posting. */ } + readl(intel_private.registers+I810_PTE_BASE+((i-1)*4)); /* PCI Posting. */ } global_cache_flush(); @@ -991,8 +991,8 @@ static int intel_i915_configure(void) if (agp_bridge->driver->needs_scratch_page) { for (i = intel_private.gtt_entries; i < current_size->num_entries; i++) { writel(agp_bridge->scratch_page, intel_private.gtt+i); - readl(intel_private.gtt+i); /* PCI Posting. */ } + readl(intel_private.gtt+i-1); /* PCI Posting. */ } global_cache_flush(); -- cgit v1.2.3 From 2a32c3c894bcd3b3f8cc7e23f5ecbebca4a9f8e8 Mon Sep 17 00:00:00 2001 From: Stuart Bennett Date: Tue, 12 Aug 2008 15:19:18 +0100 Subject: agp/amd-k7: Suspend support for AMD K7 GART driver Reinitialize bridge registers after suspend, but avoid repeating the ioremap Tested and works on AMD761 Signed-off-by: Stuart Bennett Signed-off-by: Dave Airlie --- drivers/char/agp/amd-k7-agp.c | 38 ++++++++++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c index e280531843b..c9e3310a7d9 100644 --- a/drivers/char/agp/amd-k7-agp.c +++ b/drivers/char/agp/amd-k7-agp.c @@ -223,12 +223,14 @@ static int amd_irongate_configure(void) current_size = A_SIZE_LVL2(agp_bridge->current_size); - /* Get the memory mapped registers */ - pci_read_config_dword(agp_bridge->dev, AMD_MMBASE, &temp); - temp = (temp & PCI_BASE_ADDRESS_MEM_MASK); - amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096); - if (!amd_irongate_private.registers) - return -ENOMEM; + if (!amd_irongate_private.registers) { + /* Get the memory mapped registers */ + pci_read_config_dword(agp_bridge->dev, AMD_MMBASE, &temp); + temp = (temp & PCI_BASE_ADDRESS_MEM_MASK); + amd_irongate_private.registers = (volatile u8 __iomem *) ioremap(temp, 4096); + if (!amd_irongate_private.registers) + return -ENOMEM; + } /* Write out the address of the gatt table */ writel(agp_bridge->gatt_bus_addr, amd_irongate_private.registers+AMD_ATTBASE); @@ -490,6 +492,26 @@ static void __devexit agp_amdk7_remove(struct pci_dev *pdev) agp_put_bridge(bridge); } +#ifdef CONFIG_PM + +static int agp_amdk7_suspend(struct pci_dev *pdev, pm_message_t state) +{ + pci_save_state(pdev); + pci_set_power_state(pdev, pci_choose_state(pdev, state)); + + return 0; +} + +static int agp_amdk7_resume(struct pci_dev *pdev) +{ + pci_set_power_state(pdev, PCI_D0); + pci_restore_state(pdev); + + return amd_irongate_driver.configure(); +} + +#endif /* CONFIG_PM */ + /* must be the same order as name table above */ static struct pci_device_id agp_amdk7_pci_table[] = { { @@ -526,6 +548,10 @@ static struct pci_driver agp_amdk7_pci_driver = { .id_table = agp_amdk7_pci_table, .probe = agp_amdk7_probe, .remove = agp_amdk7_remove, +#ifdef CONFIG_PM + .suspend = agp_amdk7_suspend, + .resume = agp_amdk7_resume, +#endif }; static int __init agp_amdk7_init(void) -- cgit v1.2.3 From a64d2b37c2259e169759c1701ac565f0a11dc0ea Mon Sep 17 00:00:00 2001 From: Thomas Hellstrom Date: Wed, 10 Sep 2008 14:13:33 +0200 Subject: agp/nvidia: Support agp user-memory on nvidia agp. This adds user memory support required for TTM to the nvidia AGP driver. Signed-off-by: Dave Airlie --- drivers/char/agp/nvidia-agp.c | 22 ++++++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/char/agp/nvidia-agp.c b/drivers/char/agp/nvidia-agp.c index eaceb61ba2d..0cc1c5baced 100644 --- a/drivers/char/agp/nvidia-agp.c +++ b/drivers/char/agp/nvidia-agp.c @@ -201,10 +201,15 @@ extern int agp_memory_reserved; static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type) { int i, j; + int mask_type; - if ((type != 0) || (mem->type != 0)) + mask_type = agp_generic_type_to_mask_type(mem->bridge, type); + if (mask_type != 0 || type != mem->type) return -EINVAL; + if (mem->page_count == 0) + return 0; + if ((pg_start + mem->page_count) > (nvidia_private.num_active_entries - agp_memory_reserved/PAGE_SIZE)) return -EINVAL; @@ -220,10 +225,13 @@ static int nvidia_insert_memory(struct agp_memory *mem, off_t pg_start, int type } for (i = 0, j = pg_start; i < mem->page_count; i++, j++) { writel(agp_bridge->driver->mask_memory(agp_bridge, - mem->memory[i], mem->type), + mem->memory[i], mask_type), agp_bridge->gatt_table+nvidia_private.pg_offset+j); - readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j); /* PCI Posting. */ } + + /* PCI Posting. */ + readl(agp_bridge->gatt_table+nvidia_private.pg_offset+j - 1); + agp_bridge->driver->tlb_flush(mem); return 0; } @@ -233,9 +241,15 @@ static int nvidia_remove_memory(struct agp_memory *mem, off_t pg_start, int type { int i; - if ((type != 0) || (mem->type != 0)) + int mask_type; + + mask_type = agp_generic_type_to_mask_type(mem->bridge, type); + if (mask_type != 0 || type != mem->type) return -EINVAL; + if (mem->page_count == 0) + return 0; + for (i = pg_start; i < (mem->page_count + pg_start); i++) writel(agp_bridge->scratch_page, agp_bridge->gatt_table+nvidia_private.pg_offset+i); -- cgit v1.2.3