From 336eb02b9171d132a9abe575317fee4cca965af4 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Apr 2005 15:36:55 +0100 Subject: [PATCH] ARM: footbridge rtc init The footbridge ISA RTC was being initialised before we had setup the kernel timer. This caused a divide by zero error when the current time of day is set. Resolve this by initialising the RTC after the kernel timer has been initialised. Signed-off-by: Russell King --- arch/arm/mach-footbridge/dc21285-timer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-footbridge/dc21285-timer.c b/arch/arm/mach-footbridge/dc21285-timer.c index 580e1d4bce0..da5b9b7623c 100644 --- a/arch/arm/mach-footbridge/dc21285-timer.c +++ b/arch/arm/mach-footbridge/dc21285-timer.c @@ -51,8 +51,6 @@ static struct irqaction footbridge_timer_irq = { */ static void __init footbridge_timer_init(void) { - isa_rtc_init(); - timer1_latch = (mem_fclk_21285 + 8 * HZ) / (16 * HZ); *CSR_TIMER1_CLR = 0; @@ -60,6 +58,8 @@ static void __init footbridge_timer_init(void) *CSR_TIMER1_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; setup_irq(IRQ_TIMER1, &footbridge_timer_irq); + + isa_rtc_init(); } struct sys_timer footbridge_timer = { -- cgit v1.2.3 From 58c02ec4701c94c671a41e1e5d50c582e859851f Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Apr 2005 15:40:46 +0100 Subject: [PATCH] ARM: h3600_irda_set_speed arguments h3600_irda_set_speed() had the wrong type for the "speed" argument. Fix this. Signed-off-by: Russell King --- arch/arm/mach-sa1100/h3600.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sa1100/h3600.c b/arch/arm/mach-sa1100/h3600.c index 9788d3aefa7..84c86543501 100644 --- a/arch/arm/mach-sa1100/h3600.c +++ b/arch/arm/mach-sa1100/h3600.c @@ -130,7 +130,7 @@ static int h3600_irda_set_power(struct device *dev, unsigned int state) return 0; } -static void h3600_irda_set_speed(struct device *dev, int speed) +static void h3600_irda_set_speed(struct device *dev, unsigned int speed) { if (speed < 4000000) { clr_h3600_egpio(IPAQ_EGPIO_IR_FSEL); -- cgit v1.2.3 From 652a12ef98d16ccd1ee5cdf2c832ce5411ed3262 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Apr 2005 15:50:36 +0100 Subject: [PATCH] ARM: showregs Fix show_regs() to provide a backtrace. Provide a new __show_regs() function which implements the common subset of show_regs() and die(). Add prototypes to asm-arm/system.h Signed-off-by: Russell King --- arch/arm/kernel/process.c | 15 +++++++++++---- arch/arm/kernel/traps.c | 8 ++------ include/asm-arm/ptrace.h | 5 +---- include/asm-arm/system.h | 3 +++ 4 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index dbd8ca89b38..26eacd3e5de 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c @@ -168,12 +168,11 @@ void machine_restart(char * __unused) EXPORT_SYMBOL(machine_restart); -void show_regs(struct pt_regs * regs) +void __show_regs(struct pt_regs *regs) { - unsigned long flags; - - flags = condition_codes(regs); + unsigned long flags = condition_codes(regs); + printk("CPU: %d\n", smp_processor_id()); print_symbol("PC is at %s\n", instruction_pointer(regs)); print_symbol("LR is at %s\n", regs->ARM_lr); printk("pc : [<%08lx>] lr : [<%08lx>] %s\n" @@ -213,6 +212,14 @@ void show_regs(struct pt_regs * regs) } } +void show_regs(struct pt_regs * regs) +{ + printk("\n"); + printk("Pid: %d, comm: %20s\n", current->pid, current->comm); + __show_regs(regs); + __backtrace(); +} + void show_fpregs(struct user_fp *regs) { int i; diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index 93dc4646cd7..6e31718f600 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -31,9 +31,6 @@ #include "ptrace.h" -extern void c_backtrace (unsigned long fp, int pmode); -extern void show_pte(struct mm_struct *mm, unsigned long addr); - const char *processor_modes[]= { "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" , "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26", @@ -216,8 +213,7 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) printk("Internal error: %s: %x [#%d]\n", str, err, ++die_counter); print_modules(); - printk("CPU: %d\n", smp_processor_id()); - show_regs(regs); + __show_regs(regs); printk("Process %s (pid: %d, stack limit = 0x%p)\n", tsk->comm, tsk->pid, tsk->thread_info + 1); @@ -482,7 +478,7 @@ asmlinkage int arm_syscall(int no, struct pt_regs *regs) current->pid, current->comm, no); dump_instr(regs); if (user_mode(regs)) { - show_regs(regs); + __show_regs(regs); c_backtrace(regs->ARM_fp, processor_mode(regs)); } } diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 604e3a186cf..4377e22b7e1 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -142,11 +142,8 @@ extern unsigned long profile_pc(struct pt_regs *regs); #endif #ifdef __KERNEL__ -extern void show_regs(struct pt_regs *); - -#define predicate(x) (x & 0xf0000000) +#define predicate(x) ((x) & 0xf0000000) #define PREDICATE_ALWAYS 0xe0000000 - #endif #endif /* __ASSEMBLY__ */ diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index b5731290b4e..b13a8da4847 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -99,6 +99,9 @@ void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, #define tas(ptr) (xchg((ptr),1)) extern asmlinkage void __backtrace(void); +extern asmlinkage void c_backtrace(unsigned long fp, int pmode); +extern void show_pte(struct mm_struct *mm, unsigned long addr); +extern void __show_regs(struct pt_regs *); extern int cpu_architecture(void); -- cgit v1.2.3 From 684f970e2fd2dc0eb8292500903f54f1ebda0e75 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Apr 2005 15:51:02 +0100 Subject: [PATCH] ARM: bitops Convert ARM bitop assembly to a macro. All bitops follow the same format, so it's silly duplicating the code when only one or two instructions are different. Signed-off-by: Russell King --- arch/arm/lib/changebit.S | 11 ++--------- arch/arm/lib/clearbit.S | 13 ++----------- arch/arm/lib/setbit.S | 11 ++--------- arch/arm/lib/testchangebit.S | 15 ++------------- arch/arm/lib/testclearbit.S | 15 ++------------- arch/arm/lib/testsetbit.S | 15 ++------------- 6 files changed, 12 insertions(+), 68 deletions(-) diff --git a/arch/arm/lib/changebit.S b/arch/arm/lib/changebit.S index 3af45cab70e..389567c2409 100644 --- a/arch/arm/lib/changebit.S +++ b/arch/arm/lib/changebit.S @@ -9,6 +9,7 @@ */ #include #include +#include "bitops.h" .text /* Purpose : Function to change a bit @@ -17,12 +18,4 @@ ENTRY(_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_change_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - eor r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) + bitop eor diff --git a/arch/arm/lib/clearbit.S b/arch/arm/lib/clearbit.S index 069a2ce413f..34751653302 100644 --- a/arch/arm/lib/clearbit.S +++ b/arch/arm/lib/clearbit.S @@ -9,6 +9,7 @@ */ #include #include +#include "bitops.h" .text /* @@ -18,14 +19,4 @@ ENTRY(_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_clear_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - bic r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) - - + bitop bic diff --git a/arch/arm/lib/setbit.S b/arch/arm/lib/setbit.S index 8f337df5d99..83bc23d5b03 100644 --- a/arch/arm/lib/setbit.S +++ b/arch/arm/lib/setbit.S @@ -9,6 +9,7 @@ */ #include #include +#include "bitops.h" .text /* @@ -18,12 +19,4 @@ ENTRY(_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_set_bit_le) - and r2, r0, #7 - mov r3, #1 - mov r3, r3, lsl r2 - save_and_disable_irqs ip, r2 - ldrb r2, [r1, r0, lsr #3] - orr r2, r2, r3 - strb r2, [r1, r0, lsr #3] - restore_irqs ip - RETINSTR(mov,pc,lr) + bitop orr diff --git a/arch/arm/lib/testchangebit.S b/arch/arm/lib/testchangebit.S index 4aba4676b98..b25dcd2be53 100644 --- a/arch/arm/lib/testchangebit.S +++ b/arch/arm/lib/testchangebit.S @@ -9,21 +9,10 @@ */ #include #include +#include "bitops.h" .text ENTRY(_test_and_change_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_change_bit_le) - add r1, r1, r0, lsr #3 - and r3, r0, #7 - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - eor r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop eor, strb diff --git a/arch/arm/lib/testclearbit.S b/arch/arm/lib/testclearbit.S index e07c5bd2430..2dcc4b16b68 100644 --- a/arch/arm/lib/testclearbit.S +++ b/arch/arm/lib/testclearbit.S @@ -9,21 +9,10 @@ */ #include #include +#include "bitops.h" .text ENTRY(_test_and_clear_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_clear_bit_le) - add r1, r1, r0, lsr #3 @ Get byte offset - and r3, r0, #7 @ Get bit offset - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - bic r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop bicne, strneb diff --git a/arch/arm/lib/testsetbit.S b/arch/arm/lib/testsetbit.S index a570fc74cdd..9011c969761 100644 --- a/arch/arm/lib/testsetbit.S +++ b/arch/arm/lib/testsetbit.S @@ -9,21 +9,10 @@ */ #include #include +#include "bitops.h" .text ENTRY(_test_and_set_bit_be) eor r0, r0, #0x18 @ big endian byte ordering ENTRY(_test_and_set_bit_le) - add r1, r1, r0, lsr #3 @ Get byte offset - and r3, r0, #7 @ Get bit offset - mov r0, #1 - save_and_disable_irqs ip, r2 - ldrb r2, [r1] - tst r2, r0, lsl r3 - orr r2, r2, r0, lsl r3 - strb r2, [r1] - restore_irqs ip - moveq r0, #0 - RETINSTR(mov,pc,lr) - - + testop orreq, streqb -- cgit v1.2.3 From cc56449f53ba45646c6f0a2edf77c4acb342caed Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 17 Apr 2005 16:28:31 +0100 Subject: [PATCH] ARM: fix debug macros Fix debug EBSA285 and RiscPC debugging macros to detect whether the MMU is enabled. Signed-off-by: Russell King --- include/asm-arm/arch-ebsa285/debug-macro.S | 7 +++++-- include/asm-arm/arch-rpc/debug-macro.S | 5 ++++- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/include/asm-arm/arch-ebsa285/debug-macro.S b/include/asm-arm/arch-ebsa285/debug-macro.S index 237853db6e2..97d15fc629a 100644 --- a/include/asm-arm/arch-ebsa285/debug-macro.S +++ b/include/asm-arm/arch-ebsa285/debug-macro.S @@ -45,9 +45,12 @@ .equ dc21285_low, ARMCSR_BASE & 0x00ffffff .macro addruart,rx - mov \rx, #dc21285_high + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x42000000 + movne \rx, #dc21285_high .if dc21285_low - orr \rx, \rx, #dc21285_low + orrne \rx, \rx, #dc21285_low .endif .endm diff --git a/include/asm-arm/arch-rpc/debug-macro.S b/include/asm-arm/arch-rpc/debug-macro.S index 0711828164c..456d3d754c3 100644 --- a/include/asm-arm/arch-rpc/debug-macro.S +++ b/include/asm-arm/arch-rpc/debug-macro.S @@ -12,7 +12,10 @@ */ .macro addruart,rx - mov \rx, #0xe0000000 + mrc p15, 0, \rx, c1, c0 + tst \rx, #1 @ MMU enabled? + moveq \rx, #0x03000000 + movne \rx, #0xe0000000 orr \rx, \rx, #0x00010000 orr \rx, \rx, #0x00000fe0 .endm -- cgit v1.2.3