From 2ca2c570b0e38b0c214426b1708ee1b0c3a5067d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 22 Dec 2006 14:33:18 +0100 Subject: [ARM] 4063/1: ep93xx: fix IRQ_EP93XX_GPIO?MUX numbering Fix incorrect IRQ numbering in arch-ep93xx/irqs.h (source: Applied Data Systems 2.6.17 kernel tree.) Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ep93xx/irqs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/asm-arm/arch-ep93xx/irqs.h b/include/asm-arm/arch-ep93xx/irqs.h index 9a42f5de9e5..ae532e304bf 100644 --- a/include/asm-arm/arch-ep93xx/irqs.h +++ b/include/asm-arm/arch-ep93xx/irqs.h @@ -22,9 +22,9 @@ #define IRQ_EP93XX_DMAM2P9 16 #define IRQ_EP93XX_DMAM2M0 17 #define IRQ_EP93XX_DMAM2M1 18 -#define IRQ_EP93XX_GPIO0MUX 20 -#define IRQ_EP93XX_GPIO1MUX 21 -#define IRQ_EP93XX_GPIO2MUX 22 +#define IRQ_EP93XX_GPIO0MUX 19 +#define IRQ_EP93XX_GPIO1MUX 20 +#define IRQ_EP93XX_GPIO2MUX 21 #define IRQ_EP93XX_GPIO3MUX 22 #define IRQ_EP93XX_UART1RX 23 #define IRQ_EP93XX_UART1TX 24 -- cgit v1.2.3 From 35108fb9b3f291b594a8019cb9188da6be2f7990 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 22 Dec 2006 18:36:30 +0100 Subject: [ARM] 4064/1: make pxa_get_cycles() static ... and fix a comment as well. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/mach-pxa/time.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-pxa/time.c b/arch/arm/mach-pxa/time.c index 3775b8f3842..ee2beb40041 100644 --- a/arch/arm/mach-pxa/time.c +++ b/arch/arm/mach-pxa/time.c @@ -101,7 +101,7 @@ static struct irqaction pxa_timer_irq = { .handler = pxa_timer_interrupt, }; -cycle_t pxa_get_cycles(void) +static cycle_t pxa_get_cycles(void) { return OSCR; } @@ -134,13 +134,13 @@ static void __init pxa_timer_init(void) OSMR0 = OSCR + LATCH; /* set initial match */ local_irq_restore(flags); - /* on PXA OSCR runs continiously and is not written to, so we can use it - * as clock source directly. + /* + * OSCR runs continuously on PXA and is not written to, + * so we can use it as clock source directly. */ clocksource_pxa.mult = clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift); clocksource_register(&clocksource_pxa); - } #ifdef CONFIG_NO_IDLE_HZ -- cgit v1.2.3 From ae2aa9073acf8f810f18297f586e03d4b2b97588 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Fri, 22 Dec 2006 18:44:42 +0100 Subject: [ARM] 4065/1: S3C24XX: dma printk fixes The commit 505788cccbb96cd496b646594c8a5fcdc26bc2d9 in linus kernel tree introduced some printks (for debugging ?) which are flooding the logs on my h1940. This patch replace them with pr_debug calls. Signed-off-by: Arnaud Patard Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-s3c2410/dma.c b/arch/arm/mach-s3c2410/dma.c index 717322a0916..fa860e716b4 100644 --- a/arch/arm/mach-s3c2410/dma.c +++ b/arch/arm/mach-s3c2410/dma.c @@ -1053,11 +1053,11 @@ int s3c2410_dma_config(dmach_t channel, if (chan == NULL) return -EINVAL; - printk("Initial dcon is %08x\n", dcon); + pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon); dcon |= chan->dcon & dma_sel.dcon_mask; - printk("New dcon is %08x\n", dcon); + pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon); switch (xferunit) { case 1: -- cgit v1.2.3 From 0c48d314b16f485e89e0f13fa37c9bd98b6a064d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Fri, 22 Dec 2006 18:52:56 +0100 Subject: [ARM] 4066/1: correct a comment about PXA's sched_clock range Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- arch/arm/mach-pxa/generic.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index 6ae605857ca..9de1278d234 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -76,7 +76,9 @@ unsigned long long sched_clock(void) /* * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand - * years range which is nice, but with higher computation cost. + * years range and truncation to unsigned long long limits it to + * sched_clock's max range of ~584 years. This is nice but with + * higher computation cost. */ { union { -- cgit v1.2.3 From eb3b4783ba664fd80d337ae6649f6489493b2387 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Sun, 24 Dec 2006 10:08:09 +0100 Subject: [ARM] 4071/1: S3C24XX: Documentation update Add documentation for the following items: - new machines (AML M5900, VMTS, NexVision) - updated rtc section - removed comments about mtd cvs - added spi section - led section Signed-off-by: Ben Dooks Signed-off-by: Russell King --- Documentation/arm/Samsung-S3C24XX/Overview.txt | 30 +++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/Documentation/arm/Samsung-S3C24XX/Overview.txt b/Documentation/arm/Samsung-S3C24XX/Overview.txt index dda7ecdde87..28d014714ab 100644 --- a/Documentation/arm/Samsung-S3C24XX/Overview.txt +++ b/Documentation/arm/Samsung-S3C24XX/Overview.txt @@ -76,6 +76,15 @@ Machines A S3C2410 based PDA from Acer. There is a Wiki page at http://handhelds.org/moin/moin.cgi/AcerN30Documentation . + AML M5900 + + American Microsystems' M5900 + + Nex Vision Nexcoder + Nex Vision Otom + + Two machines by Nex Vision + Adding New Machines ------------------- @@ -115,6 +124,10 @@ RTC Support for the onboard RTC unit, including alarm function. + This has recently been upgraded to use the new RTC core, + and the module has been renamed to rtc-s3c to fit in with + the new rtc naming scheme. + Watchdog -------- @@ -128,7 +141,7 @@ NAND The current kernels now have support for the s3c2410 NAND controller. If there are any problems the latest linux-mtd - CVS can be found from http://www.linux-mtd.infradead.org/ + code can be found from http://www.linux-mtd.infradead.org/ Serial @@ -168,6 +181,21 @@ Suspend to RAM See Suspend.txt for more information. +SPI +--- + + SPI drivers are available for both the in-built hardware + (although there is no DMA support yet) and a generic + GPIO based solution. + + +LEDs +---- + + There is support for GPIO based LEDs via a platform driver + in the LED subsystem. + + Platform Data ------------- -- cgit v1.2.3 From 431d2cd99f9721ad09f859dc65895f30385cc5c6 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Wed, 27 Dec 2006 22:56:44 +0100 Subject: [ARM] 4073/1: Prevent s3c24xx drivers from including asm/arch/hardware.h and asm/arch/irqs.h As reminded in http://lkml.org/lkml/2006/12/23/26, one should use asm/hardware.h and asm/irq.h but absent-minded devs like me tends to use asm/arch/hardware.h and/or asm/arch/irqs.h. This patch aims at preventing such things. In order to make it work, I had to modify asm-arm/irq.h too so that it can be included from assembly files. Also, as a side effect, I had to modify some headers who were using the asm/arch/hardware.h or asm/arch/irqs.h. Signed-off-by: Arnaud Patard Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/dma.h | 2 +- include/asm-arm/arch-s3c2410/entry-macro.S | 2 +- include/asm-arm/arch-s3c2410/hardware.h | 4 ++++ include/asm-arm/arch-s3c2410/irqs.h | 3 +++ include/asm-arm/irq.h | 5 ++++- 5 files changed, 13 insertions(+), 3 deletions(-) diff --git a/include/asm-arm/arch-s3c2410/dma.h b/include/asm-arm/arch-s3c2410/dma.h index 7ac22483697..58ffa7ba3c8 100644 --- a/include/asm-arm/arch-s3c2410/dma.h +++ b/include/asm-arm/arch-s3c2410/dma.h @@ -14,7 +14,7 @@ #define __ASM_ARCH_DMA_H __FILE__ #include -#include "hardware.h" +#include /* * This is the maximum DMA address(physical address) that can be DMAd to. diff --git a/include/asm-arm/arch-s3c2410/entry-macro.S b/include/asm-arm/arch-s3c2410/entry-macro.S index e09a6b8ec15..1eb4e6b8d24 100644 --- a/include/asm-arm/arch-s3c2410/entry-macro.S +++ b/include/asm-arm/arch-s3c2410/entry-macro.S @@ -20,7 +20,7 @@ #define INTOFFSET (0x14) #include -#include +#include .macro get_irqnr_and_base, irqnr, irqstat, base, tmp diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 729565e5cdf..6dadf58ff98 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -13,6 +13,10 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +#ifndef __ASM_HARDWARE_H +#error "Do not include this directly, instead #include " +#endif + #ifndef __ASSEMBLY__ /* external functions for GPIO support diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index 39a69829d16..4b7cff456c4 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -12,6 +12,9 @@ #ifndef __ASM_ARCH_IRQS_H #define __ASM_ARCH_IRQS_H __FILE__ +#ifndef __ASM_ARM_IRQ_H +#error "Do not include this directly, instead #include " +#endif /* we keep the first set of CPU IRQs out of the range of * the ISA space, so that the PC104 has them to itself diff --git a/include/asm-arm/irq.h b/include/asm-arm/irq.h index 283af50a16c..1b882a255e3 100644 --- a/include/asm-arm/irq.h +++ b/include/asm-arm/irq.h @@ -19,7 +19,6 @@ #define NO_IRQ ((unsigned int)(-1)) #endif -struct irqaction; /* * Migration helpers @@ -37,6 +36,10 @@ struct irqaction; #define IRQT_HIGH (__IRQT_HIGHLVL) #define IRQT_PROBE IRQ_TYPE_PROBE +#ifndef __ASSEMBLY__ +struct irqaction; extern void migrate_irqs(void); #endif +#endif + -- cgit v1.2.3 From 4cc2f7a84d64d25a16bb9383148c1467284e2356 Mon Sep 17 00:00:00 2001 From: Paul Brook Date: Thu, 28 Dec 2006 01:54:16 +0100 Subject: [ARM] 4074/1: Flat loader stack alignment The ARM EABI requires doubleword (8-byte) stack alignment at all public entry points. The patch below makes the bFLT loader honour this. It's always safe to start with a doubleword aligned stack so it doesn't seem worth making this conditional on CONFIG_AEABI. Paul Signed-off-by: Paul Brook Signed-off-by: Russell King --- include/asm-arm/flat.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/include/asm-arm/flat.h b/include/asm-arm/flat.h index 96694647858..16f5375e57b 100644 --- a/include/asm-arm/flat.h +++ b/include/asm-arm/flat.h @@ -5,7 +5,9 @@ #ifndef __ARM_FLAT_H__ #define __ARM_FLAT_H__ -#define flat_stack_align(sp) /* nothing needed */ +/* An odd number of words will be pushed after this alignment, so + deliberately misalign the value. */ +#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4) #define flat_argvp_envp_on_stack() 1 #define flat_old_ram_flag(flags) (flags) #define flat_reloc_valid(reloc, size) ((reloc) <= (size)) -- cgit v1.2.3 From b0b1d60a64054697ef828e0565f006cc0f823590 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Fri, 29 Dec 2006 01:30:24 +0100 Subject: [ARM] 4077/1: iop13xx: fix __io() macro Since iop13xx defines the PCI I/O spaces with physical resource addresses the __io macro needs to perform the physical to virtual conversion. I incorrectly assumed that this would be handled by ioremap, but drivers (like e1000) directly dereference the address returned from __io. Signed-off-by: Dan Williams Signed-off-by: Russell King --- arch/arm/mach-iop13xx/io.c | 19 +++++++++++++++++++ include/asm-arm/arch-iop13xx/io.h | 3 ++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-iop13xx/io.c b/arch/arm/mach-iop13xx/io.c index fbf9f88e46e..e79a1b62600 100644 --- a/arch/arm/mach-iop13xx/io.c +++ b/arch/arm/mach-iop13xx/io.c @@ -21,6 +21,25 @@ #include #include +void * __iomem __iop13xx_io(unsigned long io_addr) +{ + void __iomem * io_virt; + + switch (io_addr) { + case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA: + io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr); + break; + case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA: + io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr); + break; + default: + BUG(); + } + + return io_virt; +} +EXPORT_SYMBOL(__iop13xx_io); + void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size, unsigned long flags) { diff --git a/include/asm-arm/arch-iop13xx/io.h b/include/asm-arm/arch-iop13xx/io.h index db6de2480a2..5a7bdb52660 100644 --- a/include/asm-arm/arch-iop13xx/io.h +++ b/include/asm-arm/arch-iop13xx/io.h @@ -21,10 +21,11 @@ #define IO_SPACE_LIMIT 0xffffffff -#define __io(a) (a) +#define __io(a) __iop13xx_io(a) #define __mem_pci(a) (a) #define __mem_isa(a) (a) +extern void __iomem * __iop13xx_io(unsigned long io_addr); extern void __iomem * __ioremap(unsigned long, size_t, unsigned long); extern void __iomem *__iop13xx_ioremap(unsigned long cookie, size_t size, unsigned long flags); -- cgit v1.2.3 From 1c9d3df5e88ad7db23f5b22f4341c39722a904a4 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Sat, 30 Dec 2006 16:08:50 +0100 Subject: [ARM] 4078/1: Fix ARM copypage cache coherency problems If PG_dcache_dirty is set for a page, we need to flush the source page before performing any copypage operation using a different virtual address. This fixes the copypage implementations for XScale, StrongARM and ARMv6. This patch fixes segmentation faults seen in the dynamic linker under the usage patterns in glibc 2.4/2.5. Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mm/copypage-v4mc.c | 6 ++++++ arch/arm/mm/copypage-v6.c | 4 ++++ arch/arm/mm/copypage-xscale.c | 6 ++++++ include/asm-arm/cacheflush.h | 2 ++ 4 files changed, 18 insertions(+) diff --git a/arch/arm/mm/copypage-v4mc.c b/arch/arm/mm/copypage-v4mc.c index 408b05ae6b9..ded0e96d069 100644 --- a/arch/arm/mm/copypage-v4mc.c +++ b/arch/arm/mm/copypage-v4mc.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "mm.h" @@ -69,6 +70,11 @@ mc_copy_user_page(void *from, void *to) void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) { + struct page *page = virt_to_page(kfrom); + + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); + spin_lock(&minicache_lock); set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); diff --git a/arch/arm/mm/copypage-v6.c b/arch/arm/mm/copypage-v6.c index 865777dec16..3adb79257f4 100644 --- a/arch/arm/mm/copypage-v6.c +++ b/arch/arm/mm/copypage-v6.c @@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo { unsigned int offset = CACHE_COLOUR(vaddr); unsigned long from, to; + struct page *page = virt_to_page(kfrom); + + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); /* * Discard data in the kernel mapping for the new page. diff --git a/arch/arm/mm/copypage-xscale.c b/arch/arm/mm/copypage-xscale.c index aea5da72359..2e455f82a4d 100644 --- a/arch/arm/mm/copypage-xscale.c +++ b/arch/arm/mm/copypage-xscale.c @@ -19,6 +19,7 @@ #include #include #include +#include #include "mm.h" @@ -91,6 +92,11 @@ mc_copy_user_page(void *from, void *to) void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr) { + struct page *page = virt_to_page(kfrom); + + if (test_and_clear_bit(PG_dcache_dirty, &page->flags)) + __flush_dcache_page(page_mapping(page), page); + spin_lock(&minicache_lock); set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0); diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 378a3a2ce8d..d51049522cd 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -355,6 +355,8 @@ extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, */ extern void flush_dcache_page(struct page *); +extern void __flush_dcache_page(struct address_space *mapping, struct page *page); + #define flush_dcache_mmap_lock(mapping) \ write_lock_irq(&(mapping)->tree_lock) #define flush_dcache_mmap_unlock(mapping) \ -- cgit v1.2.3 From 8e140362f71ed801c69c5df63a68fc2cd07da3a9 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 2 Jan 2007 23:40:30 +0000 Subject: [ARM] Fix VFP initialisation issue for SMP systems When we install the handlers for context switching, we must enable VFP on all CPU cores, otherwise undefined (and random) effects occur. Signed-off-by: Russell King --- arch/arm/vfp/vfpmodule.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index e26cc1f5994..490d9d18a7d 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -264,6 +264,18 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs) vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs); } +static void vfp_enable(void *unused) +{ + u32 access = get_copro_access(); + + /* + * Enable full access to VFP (cp10 and cp11) + */ + set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11)); +} + +#include + /* * VFP support code initialisation. */ @@ -288,6 +300,7 @@ static int __init vfp_init(void) * we just need to read the VFPSID register. */ vfpsid = fmrx(FPSID); + barrier(); printk(KERN_INFO "VFP support v0.3: "); if (VFP_arch) { @@ -301,6 +314,8 @@ static int __init vfp_init(void) } else if (vfpsid & FPSID_NODOUBLE) { printk("no double precision support\n"); } else { + smp_call_function(vfp_enable, NULL, 1, 1); + VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */ printk("implementor %02x architecture %d part %02x variant %x rev %x\n", (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT, -- cgit v1.2.3 From f566b2b22d89c4785f25e6e4d60163b5ae6251f4 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 20:59:38 +0100 Subject: [ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro The SSCR0_SlotsPerFrm macro writes a 3-bit value to bits [2:0], while the correct location of FRDC in SSCR0 is at bits [26:24]. This patch adds the missing "<< 24". Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 083e03c5639..f8f34505f47 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1626,7 +1626,7 @@ #define SSCR0_RIM (1 << 22) /* Receive FIFO overrrun interrupt mask */ #define SSCR0_TUM (1 << 23) /* Transmit FIFO underrun interrupt mask */ #define SSCR0_FRDC (0x07000000) /* Frame rate divider control (mask) */ -#define SSCR0_SlotsPerFrm(x) ((x) - 1) /* Time slots per frame [1..8] */ +#define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */ #define SSCR0_ADC (1 << 30) /* Audio clock select */ #define SSCR0_MOD (1 << 31) /* Mode (normal or network) */ #endif -- cgit v1.2.3 From d02b161eda65528ad3e89d642e416c265c17ceb8 Mon Sep 17 00:00:00 2001 From: Philipp Zabel Date: Tue, 2 Jan 2007 21:06:57 +0100 Subject: [ARM] 4081/1: Add definition for TI Sync Serial Protocol Of the possible SSP frame formats (FRF bits in SSCR0), only SSCR0_PSP is defined. Other possible formats are Motorola SPI (0<<4), TI SSP (1<<4) and Microwire (2<<4). Attached patch adds a definition SSCR0_TISSP. This mode is used for the sound codec attached to the PXA272 SSP1 of some HTC PDA phones. Signed-off-by: Philipp Zabel Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index f8f34505f47..e24f6b6c79a 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1655,6 +1655,7 @@ #define SSCR0_EDSS (1 << 20) /* Extended Data Size Select */ /* extra bits in PXA255, PXA26x and PXA27x SSP ports */ +#define SSCR0_TISSP (1 << 4) /* TI Sync Serial Protocol */ #define SSCR0_PSP (3 << 4) /* PSP - Programmable Serial Protocol */ #define SSCR1_TTELP (1 << 31) /* TXD Tristate Enable Last Phase */ #define SSCR1_TTE (1 << 30) /* TXD Tristate Enable */ -- cgit v1.2.3