From da2c9ed55b0c7e8107f23530bde293239a0b5091 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 5 Dec 2005 13:39:25 +0000 Subject: MIPS: DSP: Context switch the DSPcontrol register also. Signed-off-by: Ralf Baechle --- include/asm-mips/dsp.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h index 50f556bb497..2fb8aa35fbe 100644 --- a/include/asm-mips/dsp.h +++ b/include/asm-mips/dsp.h @@ -48,6 +48,7 @@ do { \ tsk->thread.dsp.dspr[3] = mflo2(); \ tsk->thread.dsp.dspr[4] = mfhi3(); \ tsk->thread.dsp.dspr[5] = mflo3(); \ + tsk->thread.dsp.dspcontrol = rddsp(0x2ff); \ } while (0) #define save_dsp(tsk) \ @@ -64,6 +65,7 @@ do { \ mtlo2(tsk->thread.dsp.dspr[3]); \ mthi3(tsk->thread.dsp.dspr[4]); \ mtlo3(tsk->thread.dsp.dspr[5]); \ + wrdsp(tsk->thread.dsp.dspcontrol, 0x2ff); \ } while (0) #define restore_dsp(tsk) \ -- cgit v1.2.3 From 6c35585273b26a580b2e2ad3d6a7db282308eec5 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 5 Dec 2005 13:47:25 +0000 Subject: MIPS: DSP: eleminate used_dsp. used_dsp was meant to be used like used_math - but since the FPU context is small and lazy context switching is a stupid idea on multiprocessors this idea only got halfway implemented and those bits are were now breaking ptrace. Signed-off-by: Ralf Baechle --- arch/mips/kernel/ptrace.c | 8 ++------ arch/mips/kernel/ptrace32.c | 8 ++------ include/asm-mips/processor.h | 1 - 3 files changed, 4 insertions(+), 13 deletions(-) diff --git a/arch/mips/kernel/ptrace.c b/arch/mips/kernel/ptrace.c index 510da5fda56..8d254933530 100644 --- a/arch/mips/kernel/ptrace.c +++ b/arch/mips/kernel/ptrace.c @@ -280,12 +280,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) ret = -EIO; goto out; } - if (child->thread.dsp.used_dsp) { - dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; } case DSP_CONTROL: diff --git a/arch/mips/kernel/ptrace32.c b/arch/mips/kernel/ptrace32.c index 7e55457a491..1f998bfde16 100644 --- a/arch/mips/kernel/ptrace32.c +++ b/arch/mips/kernel/ptrace32.c @@ -201,12 +201,8 @@ asmlinkage int sys32_ptrace(int request, int pid, int addr, int data) ret = -EIO; goto out_tsk; } - if (child->thread.dsp.used_dsp) { - dspreg_t *dregs = __get_dsp_regs(child); - tmp = (unsigned long) (dregs[addr - DSP_BASE]); - } else { - tmp = -1; /* DSP registers yet used */ - } + dspreg_t *dregs = __get_dsp_regs(child); + tmp = (unsigned long) (dregs[addr - DSP_BASE]); break; case DSP_CONTROL: if (!cpu_has_dsp) { diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index f1980c6c3bc..de53055a62a 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -103,7 +103,6 @@ typedef __u32 dspreg_t; struct mips_dsp_state { dspreg_t dspr[NUM_DSP_REGS]; unsigned int dspcontrol; - unsigned short used_dsp; }; #define INIT_DSP {{0,},} -- cgit v1.2.3 From f12555d24ca636569b51c6f104aab41b2bba8c32 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 30 Nov 2005 13:33:26 +0900 Subject: MIPS: Fix mdelay(1) for 64bit kernel with HZ == 1000 mdelay(1) (i.e. udelay(1000)) does not work correctly due to overflow. 1000 * 0x004189374BC6A7f0 = 0x10000000000000180 (>= 2**64) 0x004189374BC6A7ef (0x004189374BC6A7f0 - 1) is OK and it is exactly same as catchall case (0x8000000000000000UL / (500000 / HZ)). Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/delay.h | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/include/asm-mips/delay.h b/include/asm-mips/delay.h index 48d00cccdaf..64dd45150f6 100644 --- a/include/asm-mips/delay.h +++ b/include/asm-mips/delay.h @@ -52,13 +52,11 @@ static inline void __udelay(unsigned long usecs, unsigned long lpj) unsigned long lo; /* - * The common rates of 1000 and 128 are rounded wrongly by the - * catchall case for 64-bit. Excessive precission? Probably ... + * The rates of 128 is rounded wrongly by the catchall case + * for 64-bit. Excessive precission? Probably ... */ #if defined(CONFIG_64BIT) && (HZ == 128) usecs *= 0x0008637bd05af6c7UL; /* 2**64 / (1000000 / HZ) */ -#elif defined(CONFIG_64BIT) && (HZ == 1000) - usecs *= 0x004189374BC6A7f0UL; /* 2**64 / (1000000 / HZ) */ #elif defined(CONFIG_64BIT) usecs *= (0x8000000000000000UL / (500000 / HZ)); #else /* 32-bit junk follows here */ -- cgit v1.2.3 From 07a801def46f412a7ce6de9553dfd8895bf33356 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 6 Dec 2005 09:43:20 +0000 Subject: MIPS: DSP: Set all register masks to 0x3ff. 0x2ff was a typo and the value 0x1f of DSP_MASK was refering to an old version of the documentation. Signed-off-by: Ralf Baechle --- include/asm-mips/dsp.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/include/asm-mips/dsp.h b/include/asm-mips/dsp.h index 2fb8aa35fbe..e9bfc0813c7 100644 --- a/include/asm-mips/dsp.h +++ b/include/asm-mips/dsp.h @@ -16,7 +16,7 @@ #include #define DSP_DEFAULT 0x00000000 -#define DSP_MASK 0x1f +#define DSP_MASK 0x3ff #define __enable_dsp_hazard() \ do { \ @@ -48,7 +48,7 @@ do { \ tsk->thread.dsp.dspr[3] = mflo2(); \ tsk->thread.dsp.dspr[4] = mfhi3(); \ tsk->thread.dsp.dspr[5] = mflo3(); \ - tsk->thread.dsp.dspcontrol = rddsp(0x2ff); \ + tsk->thread.dsp.dspcontrol = rddsp(DSP_MASK); \ } while (0) #define save_dsp(tsk) \ @@ -65,7 +65,7 @@ do { \ mtlo2(tsk->thread.dsp.dspr[3]); \ mthi3(tsk->thread.dsp.dspr[4]); \ mtlo3(tsk->thread.dsp.dspr[5]); \ - wrdsp(tsk->thread.dsp.dspcontrol, 0x2ff); \ + wrdsp(tsk->thread.dsp.dspcontrol, DSP_MASK); \ } while (0) #define restore_dsp(tsk) \ -- cgit v1.2.3 From c4fa6348750c68241a14fc255d66b5079439cb30 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 7 Dec 2005 17:50:48 +0000 Subject: MIPS: DSP: Put DSPcontrol register into the right place in the signal frame. Signed-off-by: Ralf Baechle --- arch/mips/kernel/signal32.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index c856dbc52ab..98b185bbc94 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -588,7 +588,7 @@ static inline int setup_sigcontext32(struct pt_regs *regs, err |= __put_user(regs->hi, &sc->sc_mdhi); err |= __put_user(regs->lo, &sc->sc_mdlo); if (cpu_has_dsp) { - err |= __put_user(rddsp(DSP_MASK), &sc->sc_hi1); + err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); err |= __put_user(mfhi1(), &sc->sc_hi1); err |= __put_user(mflo1(), &sc->sc_lo1); err |= __put_user(mfhi2(), &sc->sc_hi2); -- cgit v1.2.3 From 264879576cabb85f9992e63e0209a99885e3e2f1 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 7 Dec 2005 17:52:40 +0000 Subject: MIPS: DSP: Put mask field into the right place. Signed-off-by: Ralf Baechle --- include/asm-mips/mipsregs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 80370e0a558..035ba0a9b0d 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -1059,7 +1059,7 @@ do { \ " .set noat \n" \ " move $1, %0 \n" \ " # wrdsp $1, %x1 \n" \ - " .word 0x7c2004f8 | (%x1 << 15) \n" \ + " .word 0x7c2004f8 | (%x1 << 11) \n" \ " .set pop \n" \ : \ : "r" (val), "i" (mask)); \ -- cgit v1.2.3 From 2d5e7b9ffd6fd0cdcf4c51a56b7158a7e38f3dbe Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 7 Dec 2005 18:04:40 +0000 Subject: MIPS: FP: Remove silly trick to avoid warning. Just doesn't fool a modern compiler anymore. Signed-off-by: Ralf Baechle --- arch/mips/math-emu/dp_fint.c | 2 -- arch/mips/math-emu/dp_flong.c | 2 -- arch/mips/math-emu/sp_fint.c | 2 -- arch/mips/math-emu/sp_flong.c | 2 -- 4 files changed, 8 deletions(-) diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c index 0065deaee24..a1962eb460f 100644 --- a/arch/mips/math-emu/dp_fint.c +++ b/arch/mips/math-emu/dp_fint.c @@ -33,8 +33,6 @@ ieee754dp ieee754dp_fint(int x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754dp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c index cb105b1dd86..eae90a866aa 100644 --- a/arch/mips/math-emu/dp_flong.c +++ b/arch/mips/math-emu/dp_flong.c @@ -33,8 +33,6 @@ ieee754dp ieee754dp_flong(s64 x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754dp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c index 42d9ed4b9a9..7aac13afb09 100644 --- a/arch/mips/math-emu/sp_fint.c +++ b/arch/mips/math-emu/sp_fint.c @@ -33,8 +33,6 @@ ieee754sp ieee754sp_fint(int x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754sp_zero(0); if (x == 1 || x == -1) diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c index 1e26795ccec..3d6c1d11c17 100644 --- a/arch/mips/math-emu/sp_flong.c +++ b/arch/mips/math-emu/sp_flong.c @@ -33,8 +33,6 @@ ieee754sp ieee754sp_flong(s64 x) CLEARCX; - xc = ( 0 ? xc : xc ); - if (x == 0) return ieee754sp_zero(0); if (x == 1 || x == -1) -- cgit v1.2.3 From b2d28b7ea57edb4dee34a70fcd89083134017d4d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 7 Dec 2005 18:57:52 +0000 Subject: MIPS: Get rid of atomic_lock. It was resulting in build errors for some configurations. Signed-off-by: Ralf Baechle --- include/asm-mips/atomic.h | 43 +++++++++++++++++++++---------------------- 1 file changed, 21 insertions(+), 22 deletions(-) diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index 94a95872d72..654b97d3e13 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h @@ -24,10 +24,9 @@ #define _ASM_ATOMIC_H #include +#include #include -extern spinlock_t atomic_lock; - typedef struct { volatile int counter; } atomic_t; #define ATOMIC_INIT(i) { (i) } @@ -85,9 +84,9 @@ static __inline__ void atomic_add(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter += i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -127,9 +126,9 @@ static __inline__ void atomic_sub(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter -= i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -173,11 +172,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result += i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -220,11 +219,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -277,12 +276,12 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; if (result >= 0) v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -433,9 +432,9 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter += i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -475,9 +474,9 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); v->counter -= i; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } } @@ -521,11 +520,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result += i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -568,11 +567,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; @@ -625,12 +624,12 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) } else { unsigned long flags; - spin_lock_irqsave(&atomic_lock, flags); + local_irq_save(flags); result = v->counter; result -= i; if (result >= 0) v->counter = result; - spin_unlock_irqrestore(&atomic_lock, flags); + local_irq_restore(flags); } return result; -- cgit v1.2.3 From 571e0bed85470882cedfb100e847902911c3f4d2 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 8 Dec 2005 00:32:23 +0000 Subject: MIPS: MT: Fix 32-bit dependencies. Signed-off-by: Ralf Baechle --- arch/mips/kernel/vpe.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 9c89eebc356..ae83b755cf4 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c @@ -99,9 +99,9 @@ struct vpe { /* elfloader stuff */ void *load_addr; - u32 len; + unsigned long len; char *pbuffer; - u32 plen; + unsigned long plen; unsigned long __start; @@ -253,11 +253,11 @@ void dump_mtregs(void) } /* Find some VPE program space */ -static void *alloc_progmem(u32 len) +static void *alloc_progmem(unsigned long len) { #ifdef CONFIG_MIPS_VPE_LOADER_TOM /* this means you must tell linux to use less memory than you physically have */ - return (void *)((max_pfn * PAGE_SIZE) + KSEG0); + return pfn_to_kaddr(max_pfn); #else // simple grab some mem for now return kmalloc(len, GFP_KERNEL); -- cgit v1.2.3 From e7958bb90d57f0da073cbd031a1808de51d1de15 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 8 Dec 2005 13:00:20 +0000 Subject: MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1. Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 12 ++++++------ arch/mips/kernel/time.c | 2 +- arch/mips/mm/c-r4k.c | 4 ++-- include/asm-mips/cpu.h | 17 +++++++---------- 4 files changed, 16 insertions(+), 19 deletions(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5e1b08b00a3..d00f8768e2a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -447,10 +447,10 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: - c->isa_level = MIPS_CPU_ISA_M32; + c->isa_level = MIPS_CPU_ISA_M32R1; break; case 2: - c->isa_level = MIPS_CPU_ISA_M64; + c->isa_level = MIPS_CPU_ISA_M64R1; break; default: panic("Unsupported ISA type, cp0.config0.at: %d.", isa); @@ -568,7 +568,7 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) break; case PRID_IMP_34K: c->cputype = CPU_34K; - c->isa_level = MIPS_CPU_ISA_M32; + c->isa_level = MIPS_CPU_ISA_M32R1; break; } } @@ -647,7 +647,7 @@ static inline void cpu_probe_philips(struct cpuinfo_mips *c) switch (c->processor_id & 0xff00) { case PRID_IMP_PR4450: c->cputype = CPU_PR4450; - c->isa_level = MIPS_CPU_ISA_M32; + c->isa_level = MIPS_CPU_ISA_M32R1; break; default: panic("Unknown Philips Core!"); /* REVISIT: die? */ @@ -690,8 +690,8 @@ __init void cpu_probe(void) if (c->options & MIPS_CPU_FPU) { c->fpu_id = cpu_get_fpu_id(); - if (c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) { + if (c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M64R1) { if (c->fpu_id & MIPS_FPIR_3D) c->ases |= MIPS_ASE_MIPS3D; } diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 787ed541d44..174959bf1d5 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -628,7 +628,7 @@ void __init time_init(void) mips_hpt_init = c0_hpt_init; } - if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32) || + if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32R1) || (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) /* diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 38223b44d96..422b55fab07 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1183,8 +1183,8 @@ static void __init setup_scache(void) if (!sc_present) return; - if ((c->isa_level == MIPS_CPU_ISA_M32 || - c->isa_level == MIPS_CPU_ISA_M64) && + if ((c->isa_level == MIPS_CPU_ISA_M32R1 || + c->isa_level == MIPS_CPU_ISA_M64R1) && !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 48eac296060..256fe130eae 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -202,18 +202,15 @@ * ISA Level encodings * */ +#define MIPS_CPU_ISA_64BIT 0x00008000 + #define MIPS_CPU_ISA_I 0x00000001 #define MIPS_CPU_ISA_II 0x00000002 -#define MIPS_CPU_ISA_III 0x00008003 -#define MIPS_CPU_ISA_IV 0x00008004 -#define MIPS_CPU_ISA_V 0x00008005 -#define MIPS_CPU_ISA_M32 0x00000020 -#define MIPS_CPU_ISA_M64 0x00008040 - -/* - * Bit 15 encodes if an ISA level supports 64-bit operations. - */ -#define MIPS_CPU_ISA_64BIT 0x00008000 +#define MIPS_CPU_ISA_III (0x00000003 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_IV (0x00000004 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_V (0x00000005 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_M32R1 0x00000020 +#define MIPS_CPU_ISA_M64R1 (0x00000040 | MIPS_CPU_ISA_64BIT) /* * CPU Option encodings -- cgit v1.2.3 From b4672d37293cb045ec4d57e8b76a62810c96da71 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 8 Dec 2005 14:04:24 +0000 Subject: MIPS: Introduce machinery for testing for MIPSxxR1/2. Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 35 ++++++++++++++++++---- arch/mips/kernel/time.c | 6 ++-- include/asm-mips/cpu-features.h | 24 +++++++++++++++ include/asm-mips/cpu.h | 4 ++- include/asm-mips/mach-ip22/cpu-feature-overrides.h | 5 ++++ include/asm-mips/mach-ip27/cpu-feature-overrides.h | 5 ++++ include/asm-mips/mach-ip32/cpu-feature-overrides.h | 5 ++++ include/asm-mips/mach-ja/cpu-feature-overrides.h | 5 ++++ .../asm-mips/mach-ocelot3/cpu-feature-overrides.h | 5 ++++ .../asm-mips/mach-rm200/cpu-feature-overrides.h | 5 ++++ .../asm-mips/mach-yosemite/cpu-feature-overrides.h | 5 ++++ 11 files changed, 95 insertions(+), 9 deletions(-) diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index d00f8768e2a..fac48ad27b3 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -435,6 +435,9 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) } } +static char unknown_isa[] __initdata = KERN_ERR \ + "Unsupported ISA type, c0.config0: %d."; + static inline unsigned int decode_config0(struct cpuinfo_mips *c) { unsigned int config0; @@ -447,16 +450,37 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c) isa = (config0 & MIPS_CONF_AT) >> 13; switch (isa) { case 0: - c->isa_level = MIPS_CPU_ISA_M32R1; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M32R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M32R2; + break; + default: + goto unknown; + } break; case 2: - c->isa_level = MIPS_CPU_ISA_M64R1; + switch ((config0 >> 10) & 7) { + case 0: + c->isa_level = MIPS_CPU_ISA_M64R1; + break; + case 1: + c->isa_level = MIPS_CPU_ISA_M64R2; + break; + default: + goto unknown; + } break; default: - panic("Unsupported ISA type, cp0.config0.at: %d.", isa); + goto unknown; } return config0 & MIPS_CONF_M; + +unknown: + panic(unknown_isa, config0); } static inline unsigned int decode_config1(struct cpuinfo_mips *c) @@ -568,7 +592,6 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) break; case PRID_IMP_34K: c->cputype = CPU_34K; - c->isa_level = MIPS_CPU_ISA_M32R1; break; } } @@ -691,7 +714,9 @@ __init void cpu_probe(void) c->fpu_id = cpu_get_fpu_id(); if (c->isa_level == MIPS_CPU_ISA_M32R1 || - c->isa_level == MIPS_CPU_ISA_M64R1) { + c->isa_level == MIPS_CPU_ISA_M32R2 || + c->isa_level == MIPS_CPU_ISA_M64R1 || + c->isa_level == MIPS_CPU_ISA_M64R2) { if (c->fpu_id & MIPS_FPIR_3D) c->ases |= MIPS_ASE_MIPS3D; } diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 174959bf1d5..07e125c027b 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -628,9 +628,9 @@ void __init time_init(void) mips_hpt_init = c0_hpt_init; } - if ((current_cpu_data.isa_level == MIPS_CPU_ISA_M32R1) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || - (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) + if (cpu_has_mips32r1 || cpu_has_mips32r2 || + (current_cpu_data.isa_level == MIPS_CPU_ISA_I) || + (current_cpu_data.isa_level == MIPS_CPU_ISA_II)) /* * We need to calibrate the counter but we don't have * 64-bit division. diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index 03627cfb3e4..f8be4a47075 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -144,6 +144,18 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 0 # endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 0 +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 0 +# endif #endif #ifdef CONFIG_64BIT @@ -162,6 +174,18 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 1 # endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 0 +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 0 +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# endif #endif #ifdef CONFIG_CPU_MIPSR2 diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 256fe130eae..48c37c46053 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -210,7 +210,9 @@ #define MIPS_CPU_ISA_IV (0x00000004 | MIPS_CPU_ISA_64BIT) #define MIPS_CPU_ISA_V (0x00000005 | MIPS_CPU_ISA_64BIT) #define MIPS_CPU_ISA_M32R1 0x00000020 -#define MIPS_CPU_ISA_M64R1 (0x00000040 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_M32R2 0x00000040 +#define MIPS_CPU_ISA_M64R1 (0x00000080 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_M64R2 (0x00000100 | MIPS_CPU_ISA_64BIT) /* * CPU Option encodings diff --git a/include/asm-mips/mach-ip22/cpu-feature-overrides.h b/include/asm-mips/mach-ip22/cpu-feature-overrides.h index ab971466817..2a37bedb405 100644 --- a/include/asm-mips/mach-ip22/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip22/cpu-feature-overrides.h @@ -34,4 +34,9 @@ #define cpu_has_nofpuex 0 #define cpu_has_64bits 1 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP22_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ip27/cpu-feature-overrides.h b/include/asm-mips/mach-ip27/cpu-feature-overrides.h index 4c8a90051fd..2d2f5b91e47 100644 --- a/include/asm-mips/mach-ip27/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip27/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 64 #define cpu_scache_line_size() 128 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP27_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ip32/cpu-feature-overrides.h b/include/asm-mips/mach-ip32/cpu-feature-overrides.h index ab37fc1842b..b80c30725cf 100644 --- a/include/asm-mips/mach-ip32/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ip32/cpu-feature-overrides.h @@ -39,4 +39,9 @@ #define cpu_has_ic_fills_f_dc 0 #define cpu_has_dsp 0 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_IP32_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ja/cpu-feature-overrides.h b/include/asm-mips/mach-ja/cpu-feature-overrides.h index a0fde405d4c..90ff087083b 100644 --- a/include/asm-mips/mach-ja/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ja/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h index 825c5f674df..782b986241d 100644 --- a/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h +++ b/include/asm-mips/mach-ocelot3/cpu-feature-overrides.h @@ -40,4 +40,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_JA_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-rm200/cpu-feature-overrides.h b/include/asm-mips/mach-rm200/cpu-feature-overrides.h index 79f9b064c86..91e7cf5f2bf 100644 --- a/include/asm-mips/mach-rm200/cpu-feature-overrides.h +++ b/include/asm-mips/mach-rm200/cpu-feature-overrides.h @@ -40,4 +40,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 0 /* No S-cache on R5000 I think ... */ +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_RM200_CPU_FEATURE_OVERRIDES_H */ diff --git a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h index 463d051f468..3073542c93c 100644 --- a/include/asm-mips/mach-yosemite/cpu-feature-overrides.h +++ b/include/asm-mips/mach-yosemite/cpu-feature-overrides.h @@ -37,4 +37,9 @@ #define cpu_icache_line_size() 32 #define cpu_scache_line_size() 32 +#define cpu_has_mips32r1 0 +#define cpu_has_mips32r2 0 +#define cpu_has_mips64r1 0 +#define cpu_has_mips64r2 0 + #endif /* __ASM_MACH_YOSEMITE_CPU_FEATURE_OVERRIDES_H */ -- cgit v1.2.3 From 11e6df65dc2bae8e7ad17ff81611ddc850b279cd Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Dec 2005 12:09:22 +0000 Subject: MIPS: MIPS boards: Get rid of useless SMP/non-SMP casing. Signed-off-by: Ralf Baechle --- arch/mips/mips-boards/generic/time.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 72a12d931cb..2830f656fe2 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -77,7 +77,6 @@ static void mips_timer_dispatch (struct pt_regs *regs) irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { -#ifdef CONFIG_SMP int cpu = smp_processor_id(); if (cpu == 0) { @@ -85,10 +84,9 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) * CPU 0 handles the global timer interrupt job and process accounting * resets count/compare registers to trigger next timer int. */ - (void) timer_interrupt(irq, dev_id, regs); + timer_interrupt(irq, dev_id, regs); scroll_display_message(); - } - else { + } else { /* Everyone else needs to reset the timer int here as ll_local_timer_interrupt doesn't */ /* @@ -104,15 +102,6 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) } return IRQ_HANDLED; -#else - irqreturn_t r; - - r = timer_interrupt(irq, dev_id, regs); - - scroll_display_message(); - - return r; -#endif } /* -- cgit v1.2.3 From 0401572a9b9b2f368176b6e53f53004fd048a566 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Dec 2005 12:20:49 +0000 Subject: MIPS: Reorganize ISA constants strictly as bitmasks. Signed-off-by: Ralf Baechle --- include/asm-mips/cpu-features.h | 45 +++++++++++++++++++---------------------- include/asm-mips/cpu.h | 17 +++++++++------- 2 files changed, 31 insertions(+), 31 deletions(-) diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h index f8be4a47075..78c9cc2735d 100644 --- a/include/asm-mips/cpu-features.h +++ b/include/asm-mips/cpu-features.h @@ -116,6 +116,27 @@ #endif #endif +# ifndef cpu_has_mips32r1 +# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) +# endif +# ifndef cpu_has_mips32r2 +# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) +# endif +# ifndef cpu_has_mips64r1 +# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) +# endif +# ifndef cpu_has_mips64r2 +# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) +# endif + +/* + * Shortcuts ... + */ +#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2) +#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2) +#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1) +#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2) + #ifndef cpu_has_dsp #define cpu_has_dsp (cpu_data[0].ases & MIPS_ASE_DSP) #endif @@ -144,18 +165,6 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 0 # endif -# ifndef cpu_has_mips32r1 -# define cpu_has_mips32r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R1) -# endif -# ifndef cpu_has_mips32r2 -# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) -# endif -# ifndef cpu_has_mips64r1 -# define cpu_has_mips64r1 0 -# endif -# ifndef cpu_has_mips64r2 -# define cpu_has_mips64r2 0 -# endif #endif #ifdef CONFIG_64BIT @@ -174,18 +183,6 @@ # ifndef cpu_has_64bit_addresses # define cpu_has_64bit_addresses 1 # endif -# ifndef cpu_has_mips32r1 -# define cpu_has_mips32r1 0 -# endif -# ifndef cpu_has_mips32r2 -# define cpu_has_mips32r2 0 -# endif -# ifndef cpu_has_mips64r1 -# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) -# endif -# ifndef cpu_has_mips64r2 -# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) -# endif #endif #ifdef CONFIG_CPU_MIPSR2 diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 48c37c46053..934e063e79f 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -202,17 +202,20 @@ * ISA Level encodings * */ -#define MIPS_CPU_ISA_64BIT 0x00008000 - #define MIPS_CPU_ISA_I 0x00000001 #define MIPS_CPU_ISA_II 0x00000002 -#define MIPS_CPU_ISA_III (0x00000003 | MIPS_CPU_ISA_64BIT) -#define MIPS_CPU_ISA_IV (0x00000004 | MIPS_CPU_ISA_64BIT) -#define MIPS_CPU_ISA_V (0x00000005 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_III 0x00000003 +#define MIPS_CPU_ISA_IV 0x00000004 +#define MIPS_CPU_ISA_V 0x00000005 #define MIPS_CPU_ISA_M32R1 0x00000020 #define MIPS_CPU_ISA_M32R2 0x00000040 -#define MIPS_CPU_ISA_M64R1 (0x00000080 | MIPS_CPU_ISA_64BIT) -#define MIPS_CPU_ISA_M64R2 (0x00000100 | MIPS_CPU_ISA_64BIT) +#define MIPS_CPU_ISA_M64R1 0x00000080 +#define MIPS_CPU_ISA_M64R2 0x00000100 + +#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II | \ + MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 ) +#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \ + MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2) /* * CPU Option encodings -- cgit v1.2.3 From ba339c03e2e8ede8ccd37ed6c4e564e3b1545495 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Dec 2005 12:29:38 +0000 Subject: MIPS: Oprofile: Fixup the loose ends in the plumbing. Signed-off-by: Ralf Baechle --- arch/mips/kernel/time.c | 26 +++++++++++++++++++++++++- arch/mips/mips-boards/generic/time.c | 20 +++++++++++++++++--- arch/mips/oprofile/op_impl.h | 4 ++-- arch/mips/oprofile/op_model_mipsxx.c | 6 +++++- 4 files changed, 49 insertions(+), 7 deletions(-) diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c index 07e125c027b..7050b4ffffc 100644 --- a/arch/mips/kernel/time.c +++ b/arch/mips/kernel/time.c @@ -507,14 +507,38 @@ irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) return IRQ_HANDLED; } +int null_perf_irq(struct pt_regs *regs) +{ + return 0; +} + +int (*perf_irq)(struct pt_regs *regs) = null_perf_irq; + +EXPORT_SYMBOL(null_perf_irq); +EXPORT_SYMBOL(perf_irq); + asmlinkage void ll_timer_interrupt(int irq, struct pt_regs *regs) { + int r2 = cpu_has_mips_r2; + irq_enter(); kstat_this_cpu.irqs[irq]++; + /* + * Suckage alert: + * Before R2 of the architecture there was no way to see if a + * performance counter interrupt was pending, so we have to run the + * performance counter interrupt handler anyway. + */ + if (!r2 || (read_c0_cause() & (1 << 26))) + if (perf_irq(regs)) + goto out; + /* we keep interrupt disabled all the time */ - timer_interrupt(irq, NULL, regs); + if (!r2 || (read_c0_cause() & (1 << 30))) + timer_interrupt(irq, NULL, regs); +out: irq_exit(); } diff --git a/arch/mips/mips-boards/generic/time.c b/arch/mips/mips-boards/generic/time.c index 2830f656fe2..93f3bf2c2b2 100644 --- a/arch/mips/mips-boards/generic/time.c +++ b/arch/mips/mips-boards/generic/time.c @@ -75,16 +75,29 @@ static void mips_timer_dispatch (struct pt_regs *regs) do_IRQ (mips_cpu_timer_irq, regs); } +extern int null_perf_irq(struct pt_regs *regs); + +extern int (*perf_irq)(struct pt_regs *regs); + irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) { + int r2 = cpu_has_mips_r2; int cpu = smp_processor_id(); if (cpu == 0) { /* - * CPU 0 handles the global timer interrupt job and process accounting - * resets count/compare registers to trigger next timer int. + * CPU 0 handles the global timer interrupt job and process + * accounting resets count/compare registers to trigger next + * timer int. */ - timer_interrupt(irq, dev_id, regs); + if (!r2 || (read_c0_cause() & (1 << 26))) + if (perf_irq(regs)) + goto out; + + /* we keep interrupt disabled all the time */ + if (!r2 || (read_c0_cause() & (1 << 30))) + timer_interrupt(irq, NULL, regs); + scroll_display_message(); } else { /* Everyone else needs to reset the timer int here as @@ -101,6 +114,7 @@ irqreturn_t mips_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) local_timer_interrupt (irq, dev_id, regs); } +out: return IRQ_HANDLED; } diff --git a/arch/mips/oprofile/op_impl.h b/arch/mips/oprofile/op_impl.h index f0121557047..5cfce7d87a4 100644 --- a/arch/mips/oprofile/op_impl.h +++ b/arch/mips/oprofile/op_impl.h @@ -12,8 +12,8 @@ struct pt_regs; -extern void null_perf_irq(struct pt_regs *regs); -extern void (*perf_irq)(struct pt_regs *regs); +extern int null_perf_irq(struct pt_regs *regs); +extern int (*perf_irq)(struct pt_regs *regs); /* Per-counter configuration as set via oprofilefs. */ struct op_counter_config { diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index d36b64dfcb2..a4a4aa99ab0 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -114,11 +114,12 @@ static void mipsxx_cpu_stop(void *args) } } -static void mipsxx_perfcount_handler(struct pt_regs *regs) +static int mipsxx_perfcount_handler(struct pt_regs *regs) { unsigned int counters = op_model_mipsxx.num_counters; unsigned int control; unsigned int counter; + int handled = 0; switch (counters) { #define HANDLE_COUNTER(n) \ @@ -129,12 +130,15 @@ static void mipsxx_perfcount_handler(struct pt_regs *regs) (counter & M_COUNTER_OVERFLOW)) { \ oprofile_add_sample(regs, n); \ write_c0_perfcntr ## n(reg.counter[n]); \ + handled = 1; \ } HANDLE_COUNTER(3) HANDLE_COUNTER(2) HANDLE_COUNTER(1) HANDLE_COUNTER(0) } + + return handled; } #define M_CONFIG1_PC (1 << 4) -- cgit v1.2.3 From 9efeae9a5cae7e7bdacff666a1d689f5b2901c64 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Dec 2005 12:34:45 +0000 Subject: MIPS: Oprofile: Print error message if the CPU happen to have no counters. Signed-off-by: Ralf Baechle --- arch/mips/oprofile/op_model_mipsxx.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index a4a4aa99ab0..d97bbff031e 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -180,8 +180,10 @@ static int __init mipsxx_init(void) int counters; counters = n_counters(); - if (counters == 0) + if (counters == 0) { + printk(KERN_ERR "Oprofile: CPU has no performance counters\n"); return -ENODEV; + } reset_counters(counters); -- cgit v1.2.3 From 2065988e9fb1628de7958b0f7f709b93302f7b97 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 9 Dec 2005 12:42:13 +0000 Subject: MIPS: Oprofile: Add 5K, 20K and 25K support. Signed-off-by: Ralf Baechle --- arch/mips/oprofile/common.c | 3 +++ arch/mips/oprofile/op_model_mipsxx.c | 12 ++++++++++++ 2 files changed, 15 insertions(+) diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index dd2cc42f1b6..53f9889b30e 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -75,7 +75,10 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) int res; switch (current_cpu_data.cputype) { + case CPU_5KC: + case CPU_20KC: case CPU_24K: + case CPU_25KF: lmodel = &op_model_mipsxx; break; diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index d97bbff031e..1d1eee407fa 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -189,10 +189,22 @@ static int __init mipsxx_init(void) op_model_mipsxx.num_counters = counters; switch (current_cpu_data.cputype) { + case CPU_20KC: + op_model_mipsxx.cpu_type = "mips/20K"; + break; + case CPU_24K: op_model_mipsxx.cpu_type = "mips/24K"; break; + case CPU_25KF: + op_model_mipsxx.cpu_type = "mips/25K"; + break; + + case CPU_5KC: + op_model_mipsxx.cpu_type = "mips/5K"; + break; + default: printk(KERN_ERR "Profiling unsupported for this CPU\n"); -- cgit v1.2.3 From 29ce2c765ca9a41be6f31aa1770e8ee3ee48cd21 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 12 Dec 2005 20:11:50 +0000 Subject: Update Yoichi Yuasa's email address. Signed-off-by: Ralf Baechle --- arch/mips/lib/iomap.c | 2 +- arch/mips/pci/fixup-capcella.c | 2 +- arch/mips/pci/fixup-mpc30x.c | 2 +- arch/mips/pci/fixup-tb0219.c | 2 +- arch/mips/pci/fixup-tb0226.c | 2 +- arch/mips/pci/fixup-tb0287.c | 2 +- arch/mips/pci/ops-vr41xx.c | 2 +- arch/mips/pci/pci-vr41xx.c | 2 +- arch/mips/pci/pci-vr41xx.h | 2 +- arch/mips/vr41xx/casio-e55/setup.c | 2 +- arch/mips/vr41xx/common/bcu.c | 4 ++-- arch/mips/vr41xx/common/cmu.c | 4 ++-- arch/mips/vr41xx/common/icu.c | 4 ++-- arch/mips/vr41xx/common/init.c | 2 +- arch/mips/vr41xx/common/int-handler.S | 2 +- arch/mips/vr41xx/common/irq.c | 2 +- arch/mips/vr41xx/common/pmu.c | 2 +- arch/mips/vr41xx/common/type.c | 2 +- arch/mips/vr41xx/common/vrc4173.c | 2 +- arch/mips/vr41xx/ibm-workpad/setup.c | 2 +- drivers/char/tb0219.c | 4 ++-- drivers/char/vr41xx_giu.c | 4 ++-- drivers/char/vr41xx_rtc.c | 4 ++-- drivers/pcmcia/vrc4171_card.c | 4 ++-- drivers/pcmcia/vrc4173_cardu.c | 4 ++-- drivers/pcmcia/vrc4173_cardu.h | 2 +- drivers/serial/vr41xx_siu.c | 2 +- include/asm-mips/vr41xx/capcella.h | 2 +- include/asm-mips/vr41xx/e55.h | 2 +- include/asm-mips/vr41xx/giu.h | 2 +- include/asm-mips/vr41xx/mpc30x.h | 2 +- include/asm-mips/vr41xx/pci.h | 2 +- include/asm-mips/vr41xx/siu.h | 2 +- include/asm-mips/vr41xx/tb0219.h | 2 +- include/asm-mips/vr41xx/tb0226.h | 2 +- include/asm-mips/vr41xx/vr41xx.h | 2 +- include/asm-mips/vr41xx/vrc4173.h | 2 +- include/asm-mips/vr41xx/workpad.h | 2 +- 38 files changed, 46 insertions(+), 46 deletions(-) diff --git a/arch/mips/lib/iomap.c b/arch/mips/lib/iomap.c index b5d5fa83376..7e2ced715cf 100644 --- a/arch/mips/lib/iomap.c +++ b/arch/mips/lib/iomap.c @@ -3,7 +3,7 @@ * * This code is based on lib/iomap.c, by Linus Torvalds. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c index f2fc82c1c7c..1e530751936 100644 --- a/arch/mips/pci/fixup-capcella.c +++ b/arch/mips/pci/fixup-capcella.c @@ -1,7 +1,7 @@ /* * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. * - * Copyright (C) 2002,2004 Yoichi Yuasa + * Copyright (C) 2002,2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c index 4975846da75..b67ddaa4712 100644 --- a/arch/mips/pci/fixup-mpc30x.c +++ b/arch/mips/pci/fixup-mpc30x.c @@ -1,7 +1,7 @@ /* * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. * - * Copyright (C) 2002,2004 Yoichi Yuasa + * Copyright (C) 2002,2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c index bc55b06e190..734f2b71e16 100644 --- a/arch/mips/pci/fixup-tb0219.c +++ b/arch/mips/pci/fixup-tb0219.c @@ -2,7 +2,7 @@ * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. * * Copyright (C) 2003 Megasolution Inc. - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index b5d42b12de1..c9e7cb4361a 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c @@ -1,7 +1,7 @@ /* * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c index 8436d7f1fdb..fbe6bcb2819 100644 --- a/arch/mips/pci/fixup-tb0287.c +++ b/arch/mips/pci/fixup-tb0287.c @@ -1,7 +1,7 @@ /* * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c index 430429b22ae..900c6b32576 100644 --- a/arch/mips/pci/ops-vr41xx.c +++ b/arch/mips/pci/ops-vr41xx.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c index 91df4da7ddb..9885fa40360 100644 --- a/arch/mips/pci/pci-vr41xx.c +++ b/arch/mips/pci/pci-vr41xx.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h index e087ec55641..8a35e32b837 100644 --- a/arch/mips/pci/pci-vr41xx.h +++ b/arch/mips/pci/pci-vr41xx.h @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c index d29201acc4f..814900915c2 100644 --- a/arch/mips/vr41xx/casio-e55/setup.c +++ b/arch/mips/vr41xx/casio-e55/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index cdfa4273a1c..de0c1b35f11 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Added support for NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index d758e432961..657c5133c93 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copuright (C) 2003-2005 Yoichi Yuasa + * Copuright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Added support for NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 0b73c5ab3c0..07ae19cf0c2 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -25,7 +25,7 @@ * - New creation, NEC VR4122 and VR4131 are supported. * - Added support for NEC VR4111 and VR4121. * - * Yoichi Yuasa + * Yoichi Yuasa * - Coped with INTASSIGN of NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index 578f6496ffd..707bd0933ee 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c @@ -1,7 +1,7 @@ /* * init.c, Common initialization routines for NEC VR4100 series. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/int-handler.S b/arch/mips/vr41xx/common/int-handler.S index 272c13aee4f..2b6043f16d0 100644 --- a/arch/mips/vr41xx/common/int-handler.S +++ b/arch/mips/vr41xx/common/int-handler.S @@ -35,7 +35,7 @@ * MontaVista Software Inc. or * - New creation, NEC VR4100 series are supported. * - * Yoichi Yuasa + * Yoichi Yuasa * - Coped with INTASSIGN of NEC VR4133. */ #include diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 43b214d3943..61aa264275f 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c @@ -1,7 +1,7 @@ /* * Interrupt handing routines for NEC VR4100 series. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index 53166f3598b..02bf4f7d06b 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c @@ -1,7 +1,7 @@ /* * pmu.c, Power Management Unit routines for NEC VR4100 series. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c index bcb5f71b502..e0c1ac5e988 100644 --- a/arch/mips/vr41xx/common/type.c +++ b/arch/mips/vr41xx/common/type.c @@ -1,7 +1,7 @@ /* * type.c, System type for NEC VR4100 series. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/arch/mips/vr41xx/common/vrc4173.c b/arch/mips/vr41xx/common/vrc4173.c index cc52e75e14e..3e31f8193d2 100644 --- a/arch/mips/vr41xx/common/vrc4173.c +++ b/arch/mips/vr41xx/common/vrc4173.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001-2003 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c index e4b34ad6ea6..50fe8af4c52 100644 --- a/arch/mips/vr41xx/ibm-workpad/setup.c +++ b/arch/mips/vr41xx/ibm-workpad/setup.c @@ -1,7 +1,7 @@ /* * setup.c, Setup for the IBM WorkPad z50. * - * Copyright (C) 2002-2005 Yoichi Yuasa + * Copyright (C) 2002-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/char/tb0219.c b/drivers/char/tb0219.c index b3d411a756f..ac2a297ce37 100644 --- a/drivers/char/tb0219.c +++ b/drivers/char/tb0219.c @@ -1,7 +1,7 @@ /* * Driver for TANBAC TB0219 base board. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -27,7 +27,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("TANBAC TB0219 base board driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c index a5b18e086a9..2267c7b8179 100644 --- a/drivers/char/vr41xx_giu.c +++ b/drivers/char/vr41xx_giu.c @@ -3,7 +3,7 @@ * * Copyright (C) 2002 MontaVista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -35,7 +35,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/char/vr41xx_rtc.c b/drivers/char/vr41xx_rtc.c index 435b30748e2..5354537587e 100644 --- a/drivers/char/vr41xx_rtc.c +++ b/drivers/char/vr41xx_rtc.c @@ -1,7 +1,7 @@ /* * Driver for NEC VR4100 series Real Time Clock unit. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -37,7 +37,7 @@ #include #include -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c index 24c547ef512..0574efd7828 100644 --- a/drivers/pcmcia/vrc4171_card.c +++ b/drivers/pcmcia/vrc4171_card.c @@ -1,7 +1,7 @@ /* * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. * - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,7 +33,7 @@ #include "i82365.h" MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_LICENSE("GPL"); #define CARD_MAX_SLOTS 2 diff --git a/drivers/pcmcia/vrc4173_cardu.c b/drivers/pcmcia/vrc4173_cardu.c index b502db2790e..57f38dba0a4 100644 --- a/drivers/pcmcia/vrc4173_cardu.c +++ b/drivers/pcmcia/vrc4173_cardu.c @@ -6,7 +6,7 @@ * NEC VRC4173 CARDU driver for Socket Services * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) * - * Copyright 2002,2003 Yoichi Yuasa + * Copyright 2002,2003 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the @@ -41,7 +41,7 @@ #include "vrc4173_cardu.h" MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); -MODULE_AUTHOR("Yoichi Yuasa "); +MODULE_AUTHOR("Yoichi Yuasa "); MODULE_LICENSE("GPL"); static int vrc4173_cardu_slots; diff --git a/drivers/pcmcia/vrc4173_cardu.h b/drivers/pcmcia/vrc4173_cardu.h index 113726f7cf9..7d77c74120c 100644 --- a/drivers/pcmcia/vrc4173_cardu.h +++ b/drivers/pcmcia/vrc4173_cardu.h @@ -5,7 +5,7 @@ * BRIEF MODULE DESCRIPTION * Include file for NEC VRC4173 CARDU. * - * Copyright 2002 Yoichi Yuasa + * Copyright 2002 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index 865d4dea65d..4a3005fdd01 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c @@ -1,7 +1,7 @@ /* * Driver for NEC VR4100 series Serial Interface Unit. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * Based on drivers/serial/8250.c, by Russell King. * diff --git a/include/asm-mips/vr41xx/capcella.h b/include/asm-mips/vr41xx/capcella.h index 5b55083c528..d10ffda50de 100644 --- a/include/asm-mips/vr41xx/capcella.h +++ b/include/asm-mips/vr41xx/capcella.h @@ -1,7 +1,7 @@ /* * capcella.h, Include file for ZAO Networks Capcella. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/e55.h b/include/asm-mips/vr41xx/e55.h index ea37b56fc66..558f2269bf3 100644 --- a/include/asm-mips/vr41xx/e55.h +++ b/include/asm-mips/vr41xx/e55.h @@ -1,7 +1,7 @@ /* * e55.h, Include file for CASIO CASSIOPEIA E-10/15/55/65. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h index 8590885a763..8109cda557d 100644 --- a/include/asm-mips/vr41xx/giu.h +++ b/include/asm-mips/vr41xx/giu.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series General-purpose I/O Unit. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/mpc30x.h b/include/asm-mips/vr41xx/mpc30x.h index e6ac3c8e8ba..a6cbe4da666 100644 --- a/include/asm-mips/vr41xx/mpc30x.h +++ b/include/asm-mips/vr41xx/mpc30x.h @@ -1,7 +1,7 @@ /* * mpc30x.h, Include file for Victor MP-C303/304. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/pci.h b/include/asm-mips/vr41xx/pci.h index c473aa78d1d..6fc01ce1977 100644 --- a/include/asm-mips/vr41xx/pci.h +++ b/include/asm-mips/vr41xx/pci.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series PCI Control Unit. * - * Copyright (C) 2004-2005 Yoichi Yuasa + * Copyright (C) 2004-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/siu.h b/include/asm-mips/vr41xx/siu.h index 865cc07ddd7..1fcf6e8082b 100644 --- a/include/asm-mips/vr41xx/siu.h +++ b/include/asm-mips/vr41xx/siu.h @@ -1,7 +1,7 @@ /* * Include file for NEC VR4100 series Serial Interface Unit. * - * Copyright (C) 2005 Yoichi Yuasa + * Copyright (C) 2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/tb0219.h b/include/asm-mips/vr41xx/tb0219.h index 273c6392688..b318b9612a8 100644 --- a/include/asm-mips/vr41xx/tb0219.h +++ b/include/asm-mips/vr41xx/tb0219.h @@ -1,7 +1,7 @@ /* * tb0219.h, Include file for TANBAC TB0219. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * Modified for TANBAC TB0219: * Copyright (C) 2003 Megasolution Inc. diff --git a/include/asm-mips/vr41xx/tb0226.h b/include/asm-mips/vr41xx/tb0226.h index 0ff9a60ecac..2513f450e2d 100644 --- a/include/asm-mips/vr41xx/tb0226.h +++ b/include/asm-mips/vr41xx/tb0226.h @@ -1,7 +1,7 @@ /* * tb0226.h, Include file for TANBAC TB0226. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/include/asm-mips/vr41xx/vr41xx.h b/include/asm-mips/vr41xx/vr41xx.h index bd2723c3090..70828d5fae9 100644 --- a/include/asm-mips/vr41xx/vr41xx.h +++ b/include/asm-mips/vr41xx/vr41xx.h @@ -7,7 +7,7 @@ * Copyright (C) 2001, 2002 Paul Mundt * Copyright (C) 2002 MontaVista Software, Inc. * Copyright (C) 2002 TimeSys Corp. - * Copyright (C) 2003-2005 Yoichi Yuasa + * Copyright (C) 2003-2005 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/include/asm-mips/vr41xx/vrc4173.h b/include/asm-mips/vr41xx/vrc4173.h index bb7a85c186e..4d41a9c091d 100644 --- a/include/asm-mips/vr41xx/vrc4173.h +++ b/include/asm-mips/vr41xx/vrc4173.h @@ -4,7 +4,7 @@ * Copyright (C) 2000 Michael R. McDonald * Copyright (C) 2001-2003 Montavista Software Inc. * Author: Yoichi Yuasa - * Copyright (C) 2004 Yoichi Yuasa + * Copyright (C) 2004 Yoichi Yuasa * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) * * This program is free software; you can redistribute it and/or modify diff --git a/include/asm-mips/vr41xx/workpad.h b/include/asm-mips/vr41xx/workpad.h index dfe01b43fb7..6bfa9c009a9 100644 --- a/include/asm-mips/vr41xx/workpad.h +++ b/include/asm-mips/vr41xx/workpad.h @@ -1,7 +1,7 @@ /* * workpad.h, Include file for IBM WorkPad z50. * - * Copyright (C) 2002-2004 Yoichi Yuasa + * Copyright (C) 2002-2004 Yoichi Yuasa * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- cgit v1.2.3 From c5c64e22834c9f43f246072b4dcb293c9cea0ebe Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 25 Nov 2005 22:08:08 +0300 Subject: MIPS: Au1550: Fix OHCI memory map size USB OpenHCI host controller on Au1550 only decodes memory addresses from 0x14020000 to 0x1407FFFF according to the databook, which gives 0x60000 (on the prior Au1x00 chips the map size was 1MB). Signed-off-by: Sergei Shtylyov Acked-by: Jordan Crouse Signed-off-by: Ralf Baechle --- include/asm-mips/mach-au1x00/au1000.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/include/asm-mips/mach-au1x00/au1000.h b/include/asm-mips/mach-au1x00/au1000.h index 8327ec341c1..8e1d7ed7d8e 100644 --- a/include/asm-mips/mach-au1x00/au1000.h +++ b/include/asm-mips/mach-au1x00/au1000.h @@ -838,6 +838,7 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define UART3_ADDR 0xB1400000 #define USB_OHCI_BASE 0x14020000 // phys addr for ioremap +#define USB_OHCI_LEN 0x00060000 #define USB_HOST_CONFIG 0xB4027ffc #define AU1550_ETH0_BASE 0xB0500000 @@ -1017,10 +1018,12 @@ extern au1xxx_irq_map_t au1xxx_irq_map[]; #define I2S_CONTROL_D (1<<1) #define I2S_CONTROL_CE (1<<0) -#ifndef CONFIG_SOC_AU1200 - /* USB Host Controller */ +#ifndef USB_OHCI_LEN #define USB_OHCI_LEN 0x00100000 +#endif + +#ifndef CONFIG_SOC_AU1200 /* USB Device Controller */ #define USBD_EP0RD 0xB0200000 -- cgit v1.2.3 From 830e9c002a5864e8cfcc55d3875cdebdd4168b00 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Sat, 17 Dec 2005 21:11:02 +0000 Subject: MIPS: Remove unused CONFIG_CPU_HAS_LLDSCD. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 8 -------- arch/mips/configs/bigsur_defconfig | 1 - arch/mips/configs/cobalt_defconfig | 1 - arch/mips/configs/ddb5476_defconfig | 1 - arch/mips/configs/ddb5477_defconfig | 1 - arch/mips/configs/ev64120_defconfig | 1 - arch/mips/configs/ev96100_defconfig | 1 - arch/mips/configs/ip22_defconfig | 1 - arch/mips/configs/ip27_defconfig | 1 - arch/mips/configs/ip32_defconfig | 1 - arch/mips/configs/it8172_defconfig | 1 - arch/mips/configs/ivr_defconfig | 1 - arch/mips/configs/jaguar-atx_defconfig | 1 - arch/mips/configs/lasat200_defconfig | 1 - arch/mips/configs/ocelot_3_defconfig | 1 - arch/mips/configs/ocelot_c_defconfig | 1 - arch/mips/configs/ocelot_defconfig | 1 - arch/mips/configs/ocelot_g_defconfig | 1 - arch/mips/configs/pnx8550-v2pci_defconfig | 1 - arch/mips/configs/rbhma4500_defconfig | 1 - arch/mips/configs/rm200_defconfig | 1 - arch/mips/configs/sb1250-swarm_defconfig | 1 - arch/mips/configs/yosemite_defconfig | 1 - arch/mips/defconfig | 1 - 24 files changed, 31 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b50be449d3f..b5572f67118 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1492,14 +1492,6 @@ config CPU_HAS_LLSC for better performance, N if you don't know. You must say Y here for multiprocessor machines. -config CPU_HAS_LLDSCD - bool "lld/scd Instructions available" if CPU_ADVANCED - default y if !CPU_ADVANCED && !CPU_R3000 && !CPU_VR41XX && !CPU_TX39XX && !CPU_MIPS32_R1 - help - Say Y here if your CPU has the lld and scd instructions, the 64-bit - equivalents of ll and sc. Say Y here for better performance, N if - you don't know. You must say Y here for multiprocessor machines. - config CPU_HAS_WB bool "Writeback Buffer available" if CPU_ADVANCED default y if !CPU_ADVANCED && CPU_R3000 && MACH_DECSTATION diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index 069f9d14983..6fd35377981 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig @@ -130,7 +130,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_SIBYTE_DMA_PAGEOPS is not set # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index 216f4023a81..1d3ee18ea8b 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig @@ -115,7 +115,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ddb5476_defconfig b/arch/mips/configs/ddb5476_defconfig index bea00a9e926..a81e2de6947 100644 --- a/arch/mips/configs/ddb5476_defconfig +++ b/arch/mips/configs/ddb5476_defconfig @@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ddb5477_defconfig b/arch/mips/configs/ddb5477_defconfig index 61f7171ca7e..f1c27c2fb03 100644 --- a/arch/mips/configs/ddb5477_defconfig +++ b/arch/mips/configs/ddb5477_defconfig @@ -116,7 +116,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ev64120_defconfig b/arch/mips/configs/ev64120_defconfig index 14e3815f11e..aa24d85ea94 100644 --- a/arch/mips/configs/ev64120_defconfig +++ b/arch/mips/configs/ev64120_defconfig @@ -118,7 +118,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ev96100_defconfig b/arch/mips/configs/ev96100_defconfig index 510819581d8..eeed0e5ad26 100644 --- a/arch/mips/configs/ev96100_defconfig +++ b/arch/mips/configs/ev96100_defconfig @@ -121,7 +121,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index 67979e3e606..e56351abf87 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig @@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 03af44d1d84..e17d3adff02 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig @@ -119,7 +119,6 @@ CONFIG_PAGE_SIZE_4KB=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index cba2a49cceb..967e7acd8e1 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig @@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y CONFIG_RM7000_CPU_SCACHE=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/it8172_defconfig b/arch/mips/configs/it8172_defconfig index e7ee1679af9..b5fa9639db6 100644 --- a/arch/mips/configs/it8172_defconfig +++ b/arch/mips/configs/it8172_defconfig @@ -117,7 +117,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ivr_defconfig b/arch/mips/configs/ivr_defconfig index 138c8a60a4d..71386938d47 100644 --- a/arch/mips/configs/ivr_defconfig +++ b/arch/mips/configs/ivr_defconfig @@ -114,7 +114,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/jaguar-atx_defconfig b/arch/mips/configs/jaguar-atx_defconfig index 6238e0d6a43..14fb4688670 100644 --- a/arch/mips/configs/jaguar-atx_defconfig +++ b/arch/mips/configs/jaguar-atx_defconfig @@ -124,7 +124,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/lasat200_defconfig b/arch/mips/configs/lasat200_defconfig index a7ad99b12fe..6c5df76d48d 100644 --- a/arch/mips/configs/lasat200_defconfig +++ b/arch/mips/configs/lasat200_defconfig @@ -121,7 +121,6 @@ CONFIG_R5000_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_3_defconfig b/arch/mips/configs/ocelot_3_defconfig index 9081ea5a9db..7ad8718c1b6 100644 --- a/arch/mips/configs/ocelot_3_defconfig +++ b/arch/mips/configs/ocelot_3_defconfig @@ -122,7 +122,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_c_defconfig b/arch/mips/configs/ocelot_c_defconfig index 570fc4d1816..e8d6bb3551a 100644 --- a/arch/mips/configs/ocelot_c_defconfig +++ b/arch/mips/configs/ocelot_c_defconfig @@ -118,7 +118,6 @@ CONFIG_RM7000_CPU_SCACHE=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_defconfig b/arch/mips/configs/ocelot_defconfig index 6634ab24715..f3787b68bdd 100644 --- a/arch/mips/configs/ocelot_defconfig +++ b/arch/mips/configs/ocelot_defconfig @@ -123,7 +123,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/ocelot_g_defconfig b/arch/mips/configs/ocelot_g_defconfig index 4c396e1e2f0..b6126ad4d06 100644 --- a/arch/mips/configs/ocelot_g_defconfig +++ b/arch/mips/configs/ocelot_g_defconfig @@ -121,7 +121,6 @@ CONFIG_RM7000_CPU_SCACHE=y CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/pnx8550-v2pci_defconfig b/arch/mips/configs/pnx8550-v2pci_defconfig index d9a0d2fdba4..4c650e70813 100644 --- a/arch/mips/configs/pnx8550-v2pci_defconfig +++ b/arch/mips/configs/pnx8550-v2pci_defconfig @@ -116,7 +116,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y -# CONFIG_CPU_HAS_LLDSCD is not set # CONFIG_CPU_HAS_WB is not set CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y diff --git a/arch/mips/configs/rbhma4500_defconfig b/arch/mips/configs/rbhma4500_defconfig index 1cc14502358..9aaa43024ae 100644 --- a/arch/mips/configs/rbhma4500_defconfig +++ b/arch/mips/configs/rbhma4500_defconfig @@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_MIPS_MT is not set CONFIG_CPU_ADVANCED=y CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_WB=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index 30975b305ae..abf61095931 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig @@ -124,7 +124,6 @@ CONFIG_PAGE_SIZE_4KB=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 63f1be18e9b..52048c90607 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig @@ -133,7 +133,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_MIPS_MT is not set CONFIG_SB1_PASS_1_WORKAROUNDS=y CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index d51d5d16297..468c2e443d7 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig @@ -118,7 +118,6 @@ CONFIG_CPU_HAS_PREFETCH=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y diff --git a/arch/mips/defconfig b/arch/mips/defconfig index 2a1b844da43..4f125e9e8e0 100644 --- a/arch/mips/defconfig +++ b/arch/mips/defconfig @@ -123,7 +123,6 @@ CONFIG_IP22_CPU_SCACHE=y # CONFIG_64BIT_PHYS_ADDR is not set # CONFIG_CPU_ADVANCED is not set CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_LLDSCD=y CONFIG_CPU_HAS_SYNC=y CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_IRQ_PROBE=y -- cgit v1.2.3 From d56efda4510b1c6be3bd5ceb3e6dd3a4d64396f3 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Fri, 16 Dec 2005 22:40:47 +0000 Subject: MIPS: Namespace pollution: dump_regs() -> elf_dump_regs() dump_regs() is used by a bunch of drivers for their internal stuff; renamed mips instance (one that is seen in system-wide headers) to elf_dump_regs() Signed-off-by: Al Viro Signed-off-by: Ralf Baechle --- arch/mips/kernel/process.c | 4 ++-- include/asm-mips/elf.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c index dd725779d91..0476a4dce14 100644 --- a/arch/mips/kernel/process.c +++ b/arch/mips/kernel/process.c @@ -205,7 +205,7 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r) return 1; } -void dump_regs(elf_greg_t *gp, struct pt_regs *regs) +void elf_dump_regs(elf_greg_t *gp, struct pt_regs *regs) { int i; @@ -231,7 +231,7 @@ int dump_task_regs (struct task_struct *tsk, elf_gregset_t *regs) { struct thread_info *ti = tsk->thread_info; long ksp = (unsigned long)ti + THREAD_SIZE - 32; - dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); + elf_dump_regs(&(*regs)[0], (struct pt_regs *) ksp - 1); return 1; } diff --git a/include/asm-mips/elf.h b/include/asm-mips/elf.h index d2c9a25f845..851f013adad 100644 --- a/include/asm-mips/elf.h +++ b/include/asm-mips/elf.h @@ -277,12 +277,12 @@ do { \ struct task_struct; -extern void dump_regs(elf_greg_t *, struct pt_regs *regs); +extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); extern int dump_task_regs (struct task_struct *, elf_gregset_t *); extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_REGS(elf_regs, regs) \ - dump_regs((elf_greg_t *)&(elf_regs), regs); + elf_dump_regs((elf_greg_t *)&(elf_regs), regs); #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ dump_task_fpu(tsk, elf_fpregs) -- cgit v1.2.3 From d4ea001dd0912a14967266581601494d94a4c565 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 21 Dec 2005 03:02:26 +0100 Subject: MIPS: Don't pass -finline-limit=100000. This was a stop gap meassure for gcc 3.3 and newer sometimes not inlining inline functions in the 2.4 days. Starting we pass the always_inline attribute, so -finline-limit is no longer necessary and it's been shown to problematic on Sparc. Signed-off-by: Ralf Baechle --- arch/mips/Makefile | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/mips/Makefile b/arch/mips/Makefile index e14ba5e01a3..2a9f2ef27b2 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile @@ -93,7 +93,6 @@ endif # cflags-y += -I $(TOPDIR)/include/asm/gcc cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -cflags-y += $(call cc-option, -finline-limit=100000) LDFLAGS_vmlinux += -G 0 -static -n -nostdlib MODFLAGS += -mlong-calls -- cgit v1.2.3 From 15265251c5c68fbabdf561cf704e3e305349715a Mon Sep 17 00:00:00 2001 From: Maxime Bizon Date: Tue, 20 Dec 2005 06:32:19 +0100 Subject: MIPS: R2: Fix local_irq_save() local_irq_restore uses di which saves the whole status content, not just the IE bit resulting in local_irq_restore() to fail. This only happens if both CONFIG_CPU_MIPSR2 and CONFIG_IRQ_CPU are enabled. Signed-off-by: Maxime Bizon Signed-off-by: Ralf Baechle --- include/asm-mips/interrupt.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/asm-mips/interrupt.h b/include/asm-mips/interrupt.h index a5735761f5e..abdf54ee64c 100644 --- a/include/asm-mips/interrupt.h +++ b/include/asm-mips/interrupt.h @@ -93,6 +93,7 @@ __asm__ ( " .set noat \n" #ifdef CONFIG_CPU_MIPSR2 " di \\result \n" + " andi \\result, 1 \n" #else " mfc0 \\result, $12 \n" " ori $1, \\result, 1 \n" -- cgit v1.2.3 From 7043ad4f4c81914ca9e2cd2208c8f4801ed63735 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 22 Dec 2005 13:41:29 +0100 Subject: MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation. Gcc has a tradition of misscompiling the previous construct using the address of a label as argument to inline assembler. Gas otoh has the annoying difference between la and dla which are only usable for 32-bit rsp. 64-bit code, so can't be used without conditional compilation. The alterantive is switching the assembler to 64-bit code which happens to work right even for 32-bit code ... Signed-off-by: Ralf Baechle --- include/asm-mips/hazards.h | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 7517189e469..2fc90632f88 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -233,15 +233,25 @@ __asm__( #endif #ifdef CONFIG_CPU_MIPSR2 +/* + * gcc has a tradition of misscompiling the previous construct using the + * address of a label as argument to inline assembler. Gas otoh has the + * annoying difference between la and dla which are only usable for 32-bit + * rsp. 64-bit code, so can't be used without conditional compilation. + * The alterantive is switching the assembler to 64-bit code which happens + * to work right even for 32-bit code ... + */ #define instruction_hazard() \ do { \ -__label__ __next; \ + unsigned long tmp; \ + \ __asm__ __volatile__( \ + " .set mips64r2 \n" \ + " dla %0, 1f \n" \ " jr.hb %0 \n" \ - : \ - : "r" (&&__next)); \ -__next: \ - ; \ + " .set mips0 \n" \ + "1: \n" \ + : "=r" (tmp)); \ } while (0) #else -- cgit v1.2.3 From 948928add5b64abd314bc196ac9442618e751487 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 23 Dec 2005 02:16:44 +0100 Subject: MIPS: R2: Set 64BIT_PHYS_ADDR for R2 processor also. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index b5572f67118..c3e852e9953 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1471,7 +1471,7 @@ config SB1_PASS_2_1_WORKAROUNDS config 64BIT_PHYS_ADDR bool "Support for 64-bit physical address space" - depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32_R1 || CPU_MIPS64_R1) && 32BIT + depends on (CPU_R4X00 || CPU_R5000 || CPU_RM7000 || CPU_RM9000 || CPU_R10000 || CPU_SB1 || CPU_MIPS32 || CPU_MIPS64) && 32BIT config CPU_ADVANCED bool "Override CPU Options" -- cgit v1.2.3 From adfc76419bff33542d4fd53dc7f24818f846f194 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 23 Dec 2005 02:48:17 +0100 Subject: MIPS: Malta: Change CPU default to R2. ... giving those with with R1 or older CPU cards more rope to missconfigure their kernels. But MIPS is only selling R2 CPUs since two or three years already. Signed-off-by: Ralf Baechle --- arch/mips/configs/malta_defconfig | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index d1c44216f1c..da0677a03c1 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.15-rc2 -# Thu Nov 24 01:06:35 2005 +# Linux kernel version: 2.6.15-rc5 +# Fri Dec 23 02:21:03 2005 # CONFIG_MIPS=y @@ -87,8 +87,8 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y # # CPU selection # -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set +# CONFIG_CPU_MIPS32_R1 is not set +CONFIG_CPU_MIPS32_R2=y # CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R2 is not set # CONFIG_CPU_R3000 is not set @@ -112,7 +112,7 @@ CONFIG_SYS_HAS_CPU_MIPS64_R1=y CONFIG_SYS_HAS_CPU_NEVADA=y CONFIG_SYS_HAS_CPU_RM7000=y CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPSR1=y +CONFIG_CPU_MIPSR2=y CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -- cgit v1.2.3