From e1a8d7e2ea7c971f750b1adf0e98c3c8ed002623 Mon Sep 17 00:00:00 2001 From: Sudhakar Rajashekhara Date: Thu, 16 Jul 2009 06:41:54 -0400 Subject: davinci: Add base DA850/OMAP-L138 SoC support The DA850/OMAP-L138 is a new SoC from TI in the same family as DA830/OMAP-L137. Major changes include better support for power management, support for SATA devices and McBSP (same IP as DM644x). DA850/OMAP-L138 documents are available at http://focus.ti.com/docs/prod/folders/print/omap-l138.html. Signed-off-by: Sudhakar Rajashekhara Signed-off-by: Kevin Hilman --- arch/arm/mach-davinci/include/mach/cputype.h | 8 ++++ arch/arm/mach-davinci/include/mach/da8xx.h | 7 ++++ arch/arm/mach-davinci/include/mach/irqs.h | 63 ++++++++++++++++++++++++++-- arch/arm/mach-davinci/include/mach/mux.h | 28 +++++++++++++ arch/arm/mach-davinci/include/mach/psc.h | 3 ++ 5 files changed, 106 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-davinci/include/mach') diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h index fd41189e5c6..189b1ff1364 100644 --- a/arch/arm/mach-davinci/include/mach/cputype.h +++ b/arch/arm/mach-davinci/include/mach/cputype.h @@ -32,6 +32,7 @@ struct davinci_id { #define DAVINCI_CPU_ID_DM355 0x03550000 #define DAVINCI_CPU_ID_DM365 0x03650000 #define DAVINCI_CPU_ID_DA830 0x08300000 +#define DAVINCI_CPU_ID_DA850 0x08500000 #define IS_DAVINCI_CPU(type, id) \ static inline int is_davinci_ ##type(void) \ @@ -44,6 +45,7 @@ IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467) IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355) IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365) IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) +IS_DAVINCI_CPU(da850, DAVINCI_CPU_ID_DA850) #ifdef CONFIG_ARCH_DAVINCI_DM644x #define cpu_is_davinci_dm644x() is_davinci_dm644x() @@ -75,4 +77,10 @@ IS_DAVINCI_CPU(da830, DAVINCI_CPU_ID_DA830) #define cpu_is_davinci_da830() 0 #endif +#ifdef CONFIG_ARCH_DAVINCI_DA850 +#define cpu_is_davinci_da850() is_davinci_da850() +#else +#define cpu_is_davinci_da850() 0 +#endif + #endif diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index 8c8dc135472..594f9882e42 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h @@ -59,6 +59,7 @@ #define PINMUX19 0x4c void __init da830_init(void); +void __init da850_init(void); int da8xx_register_edma(void); int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata); @@ -93,6 +94,12 @@ extern const short da830_ecap2_pins[]; extern const short da830_eqep0_pins[]; extern const short da830_eqep1_pins[]; +extern const short da850_uart0_pins[]; +extern const short da850_uart1_pins[]; +extern const short da850_uart2_pins[]; +extern const short da850_i2c0_pins[]; +extern const short da850_i2c1_pins[]; + int da8xx_pinmux_setup(const short pins[]); #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index 735e378d27e..6047c2d9da3 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h @@ -340,9 +340,66 @@ #define DA830_N_CP_INTC_IRQ 96 -/* da830 currently has the most gpio pins (128) */ +/* DA850 speicific interrupts */ +#define IRQ_DA850_MPUADDRERR0 27 +#define IRQ_DA850_MPUPROTERR0 27 +#define IRQ_DA850_IOPUADDRERR0 27 +#define IRQ_DA850_IOPUPROTERR0 27 +#define IRQ_DA850_IOPUADDRERR1 27 +#define IRQ_DA850_IOPUPROTERR1 27 +#define IRQ_DA850_IOPUADDRERR2 27 +#define IRQ_DA850_IOPUPROTERR2 27 +#define IRQ_DA850_BOOTCFG_ADDR_ERR 27 +#define IRQ_DA850_BOOTCFG_PROT_ERR 27 +#define IRQ_DA850_MPUADDRERR1 27 +#define IRQ_DA850_MPUPROTERR1 27 +#define IRQ_DA850_IOPUADDRERR3 27 +#define IRQ_DA850_IOPUPROTERR3 27 +#define IRQ_DA850_IOPUADDRERR4 27 +#define IRQ_DA850_IOPUPROTERR4 27 +#define IRQ_DA850_IOPUADDRERR5 27 +#define IRQ_DA850_IOPUPROTERR5 27 +#define IRQ_DA850_MIOPU_BOOTCFG_ERR 27 +#define IRQ_DA850_SATAINT 67 +#define IRQ_DA850_TINT12_2 68 +#define IRQ_DA850_TINT34_2 68 +#define IRQ_DA850_TINTALL_2 68 +#define IRQ_DA850_MMCSDINT0_1 72 +#define IRQ_DA850_MMCSDINT1_1 73 +#define IRQ_DA850_T12CMPINT0_2 74 +#define IRQ_DA850_T12CMPINT1_2 75 +#define IRQ_DA850_T12CMPINT2_2 76 +#define IRQ_DA850_T12CMPINT3_2 77 +#define IRQ_DA850_T12CMPINT4_2 78 +#define IRQ_DA850_T12CMPINT5_2 79 +#define IRQ_DA850_T12CMPINT6_2 80 +#define IRQ_DA850_T12CMPINT7_2 81 +#define IRQ_DA850_T12CMPINT0_3 82 +#define IRQ_DA850_T12CMPINT1_3 83 +#define IRQ_DA850_T12CMPINT2_3 84 +#define IRQ_DA850_T12CMPINT3_3 85 +#define IRQ_DA850_T12CMPINT4_3 86 +#define IRQ_DA850_T12CMPINT5_3 87 +#define IRQ_DA850_T12CMPINT6_3 88 +#define IRQ_DA850_T12CMPINT7_3 89 +#define IRQ_DA850_RPIINT 91 +#define IRQ_DA850_VPIFINT 92 +#define IRQ_DA850_CCINT1 93 +#define IRQ_DA850_CCERRINT1 94 +#define IRQ_DA850_TCERRINT2 95 +#define IRQ_DA850_TINT12_3 96 +#define IRQ_DA850_TINT34_3 96 +#define IRQ_DA850_TINTALL_3 96 +#define IRQ_DA850_MCBSP0RINT 97 +#define IRQ_DA850_MCBSP0XINT 98 +#define IRQ_DA850_MCBSP1RINT 99 +#define IRQ_DA850_MCBSP1XINT 100 + +#define DA850_N_CP_INTC_IRQ 101 + +/* da830/da850 currently has the most gpio pins (128) */ #define DAVINCI_N_GPIO 128 -/* da830 currently has the most irqs so use DA830_N_CP_INTC_IRQ */ -#define NR_IRQS (DA830_N_CP_INTC_IRQ + DAVINCI_N_GPIO) +/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */ +#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO) #endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index cce7509ea30..3349fa5f82e 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -704,6 +704,34 @@ enum da830_index { DA830_GPIO2_10, }; +enum davinci_da850_index { + /* UART0 function */ + DA850_NUART0_CTS, + DA850_NUART0_RTS, + DA850_UART0_RXD, + DA850_UART0_TXD, + + /* UART1 function */ + DA850_NUART1_CTS, + DA850_NUART1_RTS, + DA850_UART1_RXD, + DA850_UART1_TXD, + + /* UART2 function */ + DA850_NUART2_CTS, + DA850_NUART2_RTS, + DA850_UART2_RXD, + DA850_UART2_TXD, + + /* I2C1 function */ + DA850_I2C1_SCL, + DA850_I2C1_SDA, + + /* I2C0 function */ + DA850_I2C0_SDA, + DA850_I2C0_SCL, +}; + #ifdef CONFIG_DAVINCI_MUX /* setup pin muxing */ extern int davinci_cfg_reg(unsigned long reg_cfg); diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 6b9621d8828..171173c1dba 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -155,6 +155,7 @@ #define DA8XX_LPSC0_GEM 15 /* PSC1 defines */ +#define DA850_LPSC1_TPCC1 0 #define DA8XX_LPSC1_USB20 1 #define DA8XX_LPSC1_USB11 2 #define DA8XX_LPSC1_GPIO 3 @@ -163,6 +164,7 @@ #define DA8XX_LPSC1_EMIF3C 6 #define DA8XX_LPSC1_McASP0 7 #define DA830_LPSC1_McASP1 8 +#define DA850_LPSC1_SATA 8 #define DA830_LPSC1_McASP2 9 #define DA8XX_LPSC1_SPI1 10 #define DA8XX_LPSC1_I2C 11 @@ -172,6 +174,7 @@ #define DA8XX_LPSC1_PWM 17 #define DA8XX_LPSC1_ECAP 20 #define DA830_LPSC1_EQEP 21 +#define DA850_LPSC1_TPTC2 21 #define DA8XX_LPSC1_SCR_P0_SS 24 #define DA8XX_LPSC1_SCR_P1_SS 25 #define DA8XX_LPSC1_CR_P3_SS 26 -- cgit v1.2.3