From 77da2d910a17e1e6a7e949578723d5aab58568d5 Mon Sep 17 00:00:00 2001 From: Jon Hunter Date: Sat, 27 Jun 2009 00:07:25 -0500 Subject: OMAP3: PM: Prevent hang in prcm_interrupt_handler There are two scenarios where a race condition could result in a hang in the prcm_interrupt handler. These are: 1). Waiting for PRM_IRQSTATUS_MPU register to clear. Bit 0 of the PRM_IRQSTATUS_MPU register indicates that a wake-up event is pending for the MPU. This bit can only be cleared if the all the wake-up events latched in the various PM_WKST_x registers have been cleared. If a wake-up event occurred during the processing of the prcm interrupt handler, after the corresponding PM_WKST_x register was checked but before the PRM_IRQSTATUS_MPU was cleared, then the CPU would be stuck forever waiting for bit 0 in PRM_IRQSTATUS_MPU to be cleared. 2). Waiting for the PM_WKST_x register to clear. Some power domains have more than one wake-up source. The PM_WKST_x registers indicate the source of a wake-up event and need to be cleared after a wake-up event occurs. When the PM_WKST_x registers are read and before they are cleared, it is possible that another wake-up event could occur causing another bit to be set in one of the PM_WKST_x registers. If this did occur after reading a PM_WKST_x register then the CPU would miss this event and get stuck forever in a loop waiting for that PM_WKST_x register to clear. This patch address the above race conditions that would result in a hang. Signed-off-by: Jon Hunter Reviewed-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 143 ++++++++++++++++++------------------------- 1 file changed, 60 insertions(+), 83 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0ff5a6c53aa..1e7aae2ce5e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -51,97 +51,74 @@ static void (*_omap_sram_idle)(u32 *addr, int save_state); static struct powerdomain *mpu_pwrdm; -/* PRCM Interrupt Handler for wakeups */ -static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) +/* + * PRCM Interrupt Handler Helper Function + * + * The purpose of this function is to clear any wake-up events latched + * in the PRCM PM_WKST_x registers. It is possible that a wake-up event + * may occur whilst attempting to clear a PM_WKST_x register and thus + * set another bit in this register. A while loop is used to ensure + * that any peripheral wake-up events occurring while attempting to + * clear the PM_WKST_x are detected and cleared. + */ +static void prcm_clear_mod_irqs(s16 module, u8 regs) { - u32 wkst, irqstatus_mpu; - u32 fclk, iclk; + u32 wkst, fclk, iclk; + u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; + u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1; + u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; - /* WKUP */ - wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST); + wkst = prm_read_mod_reg(module, wkst_off); if (wkst) { - iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); - fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); - cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN); - cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN); - prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST); - while (prm_read_mod_reg(WKUP_MOD, PM_WKST)) - cpu_relax(); - cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN); - cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN); - } - - /* CORE */ - wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1); - if (wkst) { - iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); - fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); - cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1); - cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1); - prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1); - while (prm_read_mod_reg(CORE_MOD, PM_WKST1)) - cpu_relax(); - cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN1); - cm_write_mod_reg(fclk, CORE_MOD, CM_FCLKEN1); - } - wkst = prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3); - if (wkst) { - iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); - fclk = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); - cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN3); - cm_set_mod_reg_bits(wkst, CORE_MOD, OMAP3430ES2_CM_FCLKEN3); - prm_write_mod_reg(wkst, CORE_MOD, OMAP3430ES2_PM_WKST3); - while (prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3)) - cpu_relax(); - cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN3); - cm_write_mod_reg(fclk, CORE_MOD, OMAP3430ES2_CM_FCLKEN3); - } - - /* PER */ - wkst = prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST); - if (wkst) { - iclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN); - fclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); - cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_ICLKEN); - cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_FCLKEN); - prm_write_mod_reg(wkst, OMAP3430_PER_MOD, PM_WKST); - while (prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST)) - cpu_relax(); - cm_write_mod_reg(iclk, OMAP3430_PER_MOD, CM_ICLKEN); - cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN); + iclk = cm_read_mod_reg(module, iclk_off); + fclk = cm_read_mod_reg(module, fclk_off); + while (wkst) { + cm_set_mod_reg_bits(wkst, module, iclk_off); + cm_set_mod_reg_bits(wkst, module, fclk_off); + prm_write_mod_reg(wkst, module, wkst_off); + wkst = prm_read_mod_reg(module, wkst_off); + } + cm_write_mod_reg(iclk, module, iclk_off); + cm_write_mod_reg(fclk, module, fclk_off); } +} - if (omap_rev() > OMAP3430_REV_ES1_0) { - /* USBHOST */ - wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST); - if (wkst) { - iclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, - CM_ICLKEN); - fclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, - CM_FCLKEN); - cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD, - CM_ICLKEN); - cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD, - CM_FCLKEN); - prm_write_mod_reg(wkst, OMAP3430ES2_USBHOST_MOD, - PM_WKST); - while (prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, - PM_WKST)) - cpu_relax(); - cm_write_mod_reg(iclk, OMAP3430ES2_USBHOST_MOD, - CM_ICLKEN); - cm_write_mod_reg(fclk, OMAP3430ES2_USBHOST_MOD, - CM_FCLKEN); +/* + * PRCM Interrupt Handler + * + * The PRM_IRQSTATUS_MPU register indicates if there are any pending + * interrupts from the PRCM for the MPU. These bits must be cleared in + * order to clear the PRCM interrupt. The PRCM interrupt handler is + * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear + * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU + * register indicates that a wake-up event is pending for the MPU and + * this bit can only be cleared if the all the wake-up events latched + * in the various PM_WKST_x registers have been cleared. The interrupt + * handler is implemented using a do-while loop so that if a wake-up + * event occurred during the processing of the prcm interrupt handler + * (setting a bit in the corresponding PM_WKST_x register and thus + * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register) + * this would be handled. + */ +static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) +{ + u32 irqstatus_mpu; + + do { + prcm_clear_mod_irqs(WKUP_MOD, 1); + prcm_clear_mod_irqs(CORE_MOD, 1); + prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); + if (omap_rev() > OMAP3430_REV_ES1_0) { + prcm_clear_mod_irqs(CORE_MOD, 3); + prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); } - } - irqstatus_mpu = prm_read_mod_reg(OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - prm_write_mod_reg(irqstatus_mpu, OCP_MOD, - OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + irqstatus_mpu = prm_read_mod_reg(OCP_MOD, + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + prm_write_mod_reg(irqstatus_mpu, OCP_MOD, + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); - while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET)) - cpu_relax(); + } while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET)); return IRQ_HANDLED; } -- cgit v1.2.3 From 5d80597801ff0d7e6b184504c04e9c1b3b61d16d Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 22 Jul 2009 10:18:07 -0700 Subject: OMAP3: PM: PRCM interrupt: check MPUGRPSEL register PM_WKST register contents should be ANDed with the contents of the MPUGRPSEL registers. Otherwise the MPU PRCM interrupt handler could wind up clearing wakeup events meant for the IVA PRCM interrupt handler. A future revision to this code should be to read a cached version of MPUGRPSEL from the powerdomain code, since PRM reads are relatively slow. Updated after Jon Hunter's PRCM IRQ change by Kevin Hilman Signed-off-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 1e7aae2ce5e..0e7bd8e55f7 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -67,8 +67,11 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1; u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; + u16 grpsel_off = (regs == 3) ? + OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL; wkst = prm_read_mod_reg(module, wkst_off); + wkst &= prm_read_mod_reg(module, grpsel_off); if (wkst) { iclk = cm_read_mod_reg(module, iclk_off); fclk = cm_read_mod_reg(module, fclk_off); -- cgit v1.2.3 From 8cb0ac999f253212bb01cd3c0d686489ec5911ad Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 22 Jul 2009 10:29:02 -0700 Subject: OMAP3: PM: PRCM interrupt: only handle selected PRCM interrupts Clearing wakeup sources is now only done when the PRM indicates a wakeup source interrupt. Since we don't handle any other types of PRCM interrupts right now, warn if we get any other type of PRCM interrupt. Either code needs to be added to the PRCM interrupt handler to react to these, or these other interrupts should be masked off at init. Updated after Jon Hunter's PRCM IRQ rework by Kevin Hilman. Signed-off-by: Paul Walmsley Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 46 +++++++++++++++++++++++++++++++++++--------- 1 file changed, 37 insertions(+), 9 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0e7bd8e55f7..d9440a18bd0 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -61,7 +61,7 @@ static struct powerdomain *mpu_pwrdm; * that any peripheral wake-up events occurring while attempting to * clear the PM_WKST_x are detected and cleared. */ -static void prcm_clear_mod_irqs(s16 module, u8 regs) +static int prcm_clear_mod_irqs(s16 module, u8 regs) { u32 wkst, fclk, iclk; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; @@ -69,6 +69,7 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; u16 grpsel_off = (regs == 3) ? OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL; + int c = 0; wkst = prm_read_mod_reg(module, wkst_off); wkst &= prm_read_mod_reg(module, grpsel_off); @@ -80,10 +81,28 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) cm_set_mod_reg_bits(wkst, module, fclk_off); prm_write_mod_reg(wkst, module, wkst_off); wkst = prm_read_mod_reg(module, wkst_off); + c++; } cm_write_mod_reg(iclk, module, iclk_off); cm_write_mod_reg(fclk, module, fclk_off); } + + return c; +} + +static int _prcm_int_handle_wakeup(void) +{ + int c; + + c = prcm_clear_mod_irqs(WKUP_MOD, 1); + c += prcm_clear_mod_irqs(CORE_MOD, 1); + c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); + if (omap_rev() > OMAP3430_REV_ES1_0) { + c += prcm_clear_mod_irqs(CORE_MOD, 3); + c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); + } + + return c; } /* @@ -106,18 +125,27 @@ static void prcm_clear_mod_irqs(s16 module, u8 regs) static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) { u32 irqstatus_mpu; + int c = 0; do { - prcm_clear_mod_irqs(WKUP_MOD, 1); - prcm_clear_mod_irqs(CORE_MOD, 1); - prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); - if (omap_rev() > OMAP3430_REV_ES1_0) { - prcm_clear_mod_irqs(CORE_MOD, 3); - prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); - } - irqstatus_mpu = prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); + + if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) { + c = _prcm_int_handle_wakeup(); + + /* + * Is the MPU PRCM interrupt handler racing with the + * IVA2 PRCM interrupt handler ? + */ + WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup " + "but no wakeup sources are marked\n"); + } else { + /* XXX we need to expand our PRCM interrupt handler */ + WARN(1, "prcm: WARNING: PRCM interrupt received, but " + "no code to handle it (%08x)\n", irqstatus_mpu); + } + prm_write_mod_reg(irqstatus_mpu, OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); -- cgit v1.2.3 From 71a807757394205cdb1465d68a4f0be50fd6f04b Mon Sep 17 00:00:00 2001 From: Vikram Pandita Date: Fri, 17 Jul 2009 19:33:09 -0500 Subject: OMAP3: PM: USBHOST: clear wakeup events on both hosts USBHOST module has 2 fclocks (for HOST1 and HOST2), only one iclock and only a single bit in the WKST register to indicate a wakeup event. Because of the single WKST bit, we cannot know whether a wakeup event was on HOST1 or HOST2, so enable both fclocks before clearing the wakeup event to ensure both hosts can properly clear the event. Signed-off-by: Vikram Pandita Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index d9440a18bd0..cf6ea9f318f 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -63,7 +63,7 @@ static struct powerdomain *mpu_pwrdm; */ static int prcm_clear_mod_irqs(s16 module, u8 regs) { - u32 wkst, fclk, iclk; + u32 wkst, fclk, iclk, clken; u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1; u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; @@ -77,8 +77,15 @@ static int prcm_clear_mod_irqs(s16 module, u8 regs) iclk = cm_read_mod_reg(module, iclk_off); fclk = cm_read_mod_reg(module, fclk_off); while (wkst) { - cm_set_mod_reg_bits(wkst, module, iclk_off); - cm_set_mod_reg_bits(wkst, module, fclk_off); + clken = wkst; + cm_set_mod_reg_bits(clken, module, iclk_off); + /* + * For USBHOST, we don't know whether HOST1 or + * HOST2 woke us up, so enable both f-clocks + */ + if (module == OMAP3430ES2_USBHOST_MOD) + clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT; + cm_set_mod_reg_bits(clken, module, fclk_off); prm_write_mod_reg(wkst, module, wkst_off); wkst = prm_read_mod_reg(module, wkst_off); c++; -- cgit v1.2.3 From eb350f74ebff9573641c5fb689fb071b695ef35b Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 10 Sep 2009 15:53:08 +0000 Subject: OMAP3: PM: Enable GPIO module-level wakeups Currently, only GPIOs in the wakeup domain (GPIOs in bank 0) are enabled as wakups. This patch also enables GPIOs in the PER powerdomain (banks 2-6) to be used as possible wakeup sources. In addition, this patch ensures that all GPIO wakeups can wakeup the MPU using the PM_MPUGRPSEL_ registers. NOTE: this doesn't enable the individual GPIOs as wakeups, this simply enables the per-bank wakeups at the powerdomain level. This problem was discovered by Mike Chan when preventing the CORE powerdomain from going into retention/off. When CORE was allowed to hit retention, GPIO wakeups via IO pad were working fine, but when CORE remained on, GPIO module-level wakeups were not working properly. To test, prevent CORE from going inactive/retention/off, thus preventing the IO chain from being armed: # echo 3 > /debug/pm_debug/core_pwrdm/suspend This ensures that GPIO wakeups happen via module-level wakeups and not via IO pad. Tested on 3430SDP using the touchscreen GPIO (gpio 2, in WKUP) Tested on Zoom2 using the QUART interrup GPIO (gpio 102, in PER) Also, c.f. OMAP PM wiki for troubleshooting GPIO wakeup issues: http://elinux.org/OMAP_Power_Management Reported-by: Mike Chan Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm34xx.c | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index cf6ea9f318f..378c2f61835 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -639,6 +639,16 @@ static void __init prcm_setup_regs(void) prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); + /* Enable GPIO wakeups in PER */ + prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | + OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | + OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN); + /* and allow them to wake up MPU */ + prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | + OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | + OMAP3430_GRPSEL_GPIO6, + OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); + /* Don't attach IVA interrupts */ prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); -- cgit v1.2.3 From ee894b18e064447f86019af38a90ccb091880942 Mon Sep 17 00:00:00 2001 From: Artem Bityutskiy Date: Thu, 1 Oct 2009 10:01:55 +0300 Subject: OMAP3: PM: introduce a new powerdomain walk helper The 'pwrdm_for_each()' function walks powerdomains with a spinlock locked, so the the callbacks cannot do anything which may sleep. This patch introduces a 'pwrdm_for_each_nolock()' helper which does the same, but without the spinlock locked. This fixes the following lockdep warning: [ 0.000000] WARNING: at kernel/lockdep.c:2460 lockdep_trace_alloc+0xac/0xec() [ 0.000000] Modules linked in: (unwind_backtrace+0x0/0xdc) from [] (warn_slowpath_common+0x48/0x60) (warn_slowpath_common+0x48/0x60) from [] (lockdep_trace_alloc+0xac/0xec) (lockdep_trace_alloc+0xac/0xec) from [] (kmem_cache_alloc+0x1c/0xd0) (kmem_cache_alloc+0x1c/0xd0) from [] (d_alloc+0x1c/0x1a4) (d_alloc+0x1c/0x1a4) from [] (__lookup_hash+0xd8/0x118) (__lookup_hash+0xd8/0x118) from [] (lookup_one_len+0x84/0x94) (lookup_one_len+0x84/0x94) from [] (debugfs_create_file+0x8c/0x20c) (debugfs_create_file+0x8c/0x20c) from [] (debugfs_create_dir+0x1c/0x20) (debugfs_create_dir+0x1c/0x20) from [] (pwrdms_setup+0x60/0x90) (pwrdms_setup+0x60/0x90) from [] (pwrdm_for_each+0x30/0x80) (pwrdm_for_each+0x30/0x80) from [] (pm_dbg_init+0x7c/0x14c) (pm_dbg_init+0x7c/0x14c) from [] (do_one_initcall+0x5c/0x1b8) (do_one_initcall+0x5c/0x1b8) from [] (kernel_init+0x90/0x10c) (kernel_init+0x90/0x10c) from [] (kernel_thread_exit+0x0/0x8) Signed-off-by: Artem Bityutskiy Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/pm-debug.c | 4 ++-- arch/arm/mach-omap2/powerdomain.c | 39 +++++++++++++++++++++++++++------------ 2 files changed, 29 insertions(+), 14 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 1b4c1600f8d..2fc4d6abbd0 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -541,7 +541,7 @@ static int __init pm_dbg_init(void) printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); return -ENODEV; } - + d = debugfs_create_dir("pm_debug", NULL); if (IS_ERR(d)) return PTR_ERR(d); @@ -551,7 +551,7 @@ static int __init pm_dbg_init(void) (void) debugfs_create_file("time", S_IRUGO, d, (void *)DEBUG_FILE_TIMERS, &debug_fops); - pwrdm_for_each(pwrdms_setup, (void *)d); + pwrdm_for_each_nolock(pwrdms_setup, (void *)d); pm_dbg_dir = debugfs_create_dir("registers", d); if (IS_ERR(pm_dbg_dir)) diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 2594cbff394..f00289abd30 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -273,35 +273,50 @@ struct powerdomain *pwrdm_lookup(const char *name) } /** - * pwrdm_for_each - call function on each registered clockdomain + * pwrdm_for_each_nolock - call function on each registered clockdomain * @fn: callback function * * * Call the supplied function for each registered powerdomain. The * callback function can return anything but 0 to bail out early from - * the iterator. The callback function is called with the pwrdm_rwlock - * held for reading, so no powerdomain structure manipulation - * functions should be called from the callback, although hardware - * powerdomain control functions are fine. Returns the last return - * value of the callback function, which should be 0 for success or - * anything else to indicate failure; or -EINVAL if the function - * pointer is null. + * the iterator. Returns the last return value of the callback function, which + * should be 0 for success or anything else to indicate failure; or -EINVAL if + * the function pointer is null. */ -int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), - void *user) +int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user) { struct powerdomain *temp_pwrdm; - unsigned long flags; int ret = 0; if (!fn) return -EINVAL; - read_lock_irqsave(&pwrdm_rwlock, flags); list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { ret = (*fn)(temp_pwrdm, user); if (ret) break; } + + return ret; +} + +/** + * pwrdm_for_each - call function on each registered clockdomain + * @fn: callback function * + * + * This function is the same as 'pwrdm_for_each_nolock()', but keeps the + * &pwrdm_rwlock locked for reading, so no powerdomain structure manipulation + * functions should be called from the callback, although hardware powerdomain + * control functions are fine. + */ +int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), + void *user) +{ + unsigned long flags; + int ret; + + read_lock_irqsave(&pwrdm_rwlock, flags); + ret = pwrdm_for_each_nolock(fn, user); read_unlock_irqrestore(&pwrdm_rwlock, flags); return ret; -- cgit v1.2.3 From 7a66a39b8599e09c82e2e95fec55f414ad015282 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Mon, 5 Oct 2009 13:31:44 -0700 Subject: omap: Lock DPLL5 at boot Lock DPLL5 at 120MHz at boot. The USBHOST 120MHz f-clock and USBTLL f-clock are the only users of this DPLL, and 120MHz is is the only recommended rate for these clocks. With this patch, the 60 MHz ULPI clock is generated correctly. Tested on an OMAP3430 SDP. Signed-off-by: Rajendra Nayak Signed-off-by: Anand Gadiyar Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index fafcd32e690..489556eecbd 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -338,6 +338,13 @@ static struct omap_clk omap34xx_clks[] = { */ #define SDRC_MPURATE_LOOPS 96 +/* + * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks + * that are sourced by DPLL5, and both of these require this clock + * to be at 120 MHz for proper operation. + */ +#define DPLL5_FREQ_FOR_USBHOST 120000000 + /** * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI * @clk: struct clk * being enabled @@ -1056,6 +1063,28 @@ void omap2_clk_prepare_for_reboot(void) #endif } +static void omap3_clk_lock_dpll5(void) +{ + struct clk *dpll5_clk; + struct clk *dpll5_m2_clk; + + dpll5_clk = clk_get(NULL, "dpll5_ck"); + clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); + clk_enable(dpll5_clk); + + /* Enable autoidle to allow it to enter low power bypass */ + omap3_dpll_allow_idle(dpll5_clk); + + /* Program dpll5_m2_clk divider for no division */ + dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); + clk_enable(dpll5_m2_clk); + clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); + + clk_disable(dpll5_m2_clk); + clk_disable(dpll5_clk); + return; +} + /* REVISIT: Move this init stuff out into clock.c */ /* @@ -1148,6 +1177,12 @@ int __init omap2_clk_init(void) */ clk_enable_init_clocks(); + /* + * Lock DPLL5 and put it in autoidle. + */ + if (omap_rev() >= OMAP3430_REV_ES2_0) + omap3_clk_lock_dpll5(); + /* Avoid sleeping during omap2_clk_prepare_for_reboot() */ /* REVISIT: not yet ready for 343x */ #if 0 -- cgit v1.2.3 From acf442dc560437858e6a4c904678052616f8226e Mon Sep 17 00:00:00 2001 From: Amit Kucheria Date: Mon, 5 Oct 2009 21:43:44 -0700 Subject: Input: fix rx51 board keymap The original driver was written with the KEY() macro defined as (col, row) instead of (row, col) as defined by the matrix keypad infrastructure. So the keymap was defined accordingly. Since the driver that was merged upstream uses the matrix keypad infrastructure, modify the keymap accordingly. While we are at it, fix the comments in twl4030.h and define PERSISTENT_KEY as (r,c) instead of (c, r) Tested on a RX51 (N900) device. Signed-off-by: Amit Kucheria Acked-by: Tony Lindgren Signed-off-by: Dmitry Torokhov --- arch/arm/mach-omap2/board-rx51-peripherals.c | 78 ++++++++++++++-------------- 1 file changed, 39 insertions(+), 39 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 56d931a425f..b5ce7a07999 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -37,49 +37,49 @@ static int rx51_keymap[] = { KEY(0, 0, KEY_Q), - KEY(0, 1, KEY_W), - KEY(0, 2, KEY_E), - KEY(0, 3, KEY_R), - KEY(0, 4, KEY_T), - KEY(0, 5, KEY_Y), - KEY(0, 6, KEY_U), - KEY(0, 7, KEY_I), - KEY(1, 0, KEY_O), + KEY(0, 1, KEY_O), + KEY(0, 2, KEY_P), + KEY(0, 3, KEY_COMMA), + KEY(0, 4, KEY_BACKSPACE), + KEY(0, 6, KEY_A), + KEY(0, 7, KEY_S), + KEY(1, 0, KEY_W), KEY(1, 1, KEY_D), - KEY(1, 2, KEY_DOT), - KEY(1, 3, KEY_V), - KEY(1, 4, KEY_DOWN), - KEY(2, 0, KEY_P), - KEY(2, 1, KEY_F), + KEY(1, 2, KEY_F), + KEY(1, 3, KEY_G), + KEY(1, 4, KEY_H), + KEY(1, 5, KEY_J), + KEY(1, 6, KEY_K), + KEY(1, 7, KEY_L), + KEY(2, 0, KEY_E), + KEY(2, 1, KEY_DOT), KEY(2, 2, KEY_UP), - KEY(2, 3, KEY_B), - KEY(2, 4, KEY_RIGHT), - KEY(3, 0, KEY_COMMA), - KEY(3, 1, KEY_G), - KEY(3, 2, KEY_ENTER), + KEY(2, 3, KEY_ENTER), + KEY(2, 5, KEY_Z), + KEY(2, 6, KEY_X), + KEY(2, 7, KEY_C), + KEY(3, 0, KEY_R), + KEY(3, 1, KEY_V), + KEY(3, 2, KEY_B), KEY(3, 3, KEY_N), - KEY(4, 0, KEY_BACKSPACE), - KEY(4, 1, KEY_H), - KEY(4, 3, KEY_M), + KEY(3, 4, KEY_M), + KEY(3, 5, KEY_SPACE), + KEY(3, 6, KEY_SPACE), + KEY(3, 7, KEY_LEFT), + KEY(4, 0, KEY_T), + KEY(4, 1, KEY_DOWN), + KEY(4, 2, KEY_RIGHT), KEY(4, 4, KEY_LEFTCTRL), - KEY(5, 1, KEY_J), - KEY(5, 2, KEY_Z), - KEY(5, 3, KEY_SPACE), - KEY(5, 4, KEY_LEFTSHIFT), - KEY(6, 0, KEY_A), - KEY(6, 1, KEY_K), - KEY(6, 2, KEY_X), - KEY(6, 3, KEY_SPACE), - KEY(6, 4, KEY_FN), - KEY(7, 0, KEY_S), - KEY(7, 1, KEY_L), - KEY(7, 2, KEY_C), - KEY(7, 3, KEY_LEFT), - KEY(0xff, 0, KEY_F6), - KEY(0xff, 1, KEY_F7), - KEY(0xff, 2, KEY_F8), - KEY(0xff, 4, KEY_F9), - KEY(0xff, 5, KEY_F10), + KEY(4, 5, KEY_RIGHTALT), + KEY(4, 6, KEY_LEFTSHIFT), + KEY(5, 0, KEY_Y), + KEY(6, 0, KEY_U), + KEY(7, 0, KEY_I), + KEY(7, 1, KEY_F7), + KEY(7, 2, KEY_F8), + KEY(0xff, 2, KEY_F9), + KEY(0xff, 4, KEY_F10), + KEY(0xff, 5, KEY_F11), }; static struct twl4030_keypad_data rx51_kp_data = { -- cgit v1.2.3 From cb3cc45ad9e55f673c336ad9d013dcdc3a84390b Mon Sep 17 00:00:00 2001 From: Aaro Koskinen Date: Wed, 14 Oct 2009 09:56:34 -0700 Subject: omap: RX-51: Drop I2C-1 speed to 2200 The I2C-1 bus frequency on RX-51 should be 2.2 MHz. The speed is limited by TWL5030/GAIA; a higher speed could lead to errors on the interface. The maximum speed depends on the system clock for GAIA: 2.2 MHz (if 19.2 MHz), 2.4 MHz (26 MHz) or 2.9 MHz (38.4 MHz). Signed-off-by: Aaro Koskinen Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-rx51-peripherals.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index c1af5326e92..2b0eb1ba5d7 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -444,7 +444,7 @@ static int __init rx51_i2c_init(void) rx51_twldata.vaux3 = &rx51_vaux3_cam; rx51_twldata.vmmc2 = &rx51_vmmc2; } - omap_register_i2c_bus(1, 2600, rx51_peripherals_i2c_board_info_1, + omap_register_i2c_bus(1, 2200, rx51_peripherals_i2c_board_info_1, ARRAY_SIZE(rx51_peripherals_i2c_board_info_1)); omap_register_i2c_bus(2, 100, NULL, 0); omap_register_i2c_bus(3, 400, NULL, 0); -- cgit v1.2.3 From 02563a5d56ac1d3978118c8498ae301d68ef7942 Mon Sep 17 00:00:00 2001 From: Teerth Reddy Date: Wed, 14 Oct 2009 09:56:35 -0700 Subject: omap: Initialization of SDRC params on Zoom2 This patch initializes the correct SDRC settings required for DVFS on Zoom2. Signed-off-by: Teerth Reddy Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-zoom2.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index b7b32208ced..fd3369d5e5c 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -25,6 +25,7 @@ #include #include "mmc-twl4030.h" +#include "sdram-micron-mt46h32m32lf-6.h" /* Zoom2 has Qwerty keyboard*/ static int board_keymap[] = { @@ -213,7 +214,8 @@ static void __init omap_zoom2_init_irq(void) { omap_board_config = zoom2_config; omap_board_config_size = ARRAY_SIZE(zoom2_config); - omap2_init_common_hw(NULL, NULL); + omap2_init_common_hw(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_init_irq(); omap_gpio_init(); } -- cgit v1.2.3 From a0219fbdacc01e039d1b158d16141349a3309915 Mon Sep 17 00:00:00 2001 From: Kalle Jokiniemi Date: Wed, 14 Oct 2009 16:40:37 -0600 Subject: OMAP: Fix race condition with autodeps There is a possible race condition in clockdomain code handling hw supported idle transitions. When multiple autodeps dependencies are being added or removed, a transition of still remaining dependent powerdomain can result in false readings of the state counter. This is especially fatal for off mode state counter, as it could result in a driver not noticing a context loss. Fixed by disabling hw supported state transitions when autodeps are being changed. Signed-off-by: Kalle Jokiniemi Signed-off-by: Paul Walmsley --- arch/arm/mach-omap2/clockdomain.c | 74 +++++++++++++++++++++++---------------- 1 file changed, 44 insertions(+), 30 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 4ef7b4f5474..58aff8485df 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -137,6 +137,36 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) } } +/* + * _omap2_clkdm_set_hwsup - set the hwsup idle transition bit + * @clkdm: struct clockdomain * + * @enable: int 0 to disable, 1 to enable + * + * Internal helper for actually switching the bit that controls hwsup + * idle transitions for clkdm. + */ +static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable) +{ + u32 v; + + if (cpu_is_omap24xx()) { + if (enable) + v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; + else + v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; + } else if (cpu_is_omap34xx()) { + if (enable) + v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; + else + v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; + } else { + BUG(); + } + + cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, + v << __ffs(clkdm->clktrctrl_mask), + clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); +} static struct clockdomain *_clkdm_lookup(const char *name) { @@ -456,8 +486,6 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) */ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) { - u32 v; - if (!clkdm) return; @@ -473,18 +501,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) if (atomic_read(&clkdm->usecount) > 0) _clkdm_add_autodeps(clkdm); - if (cpu_is_omap24xx()) - v = OMAP24XX_CLKSTCTRL_ENABLE_AUTO; - else if (cpu_is_omap34xx()) - v = OMAP34XX_CLKSTCTRL_ENABLE_AUTO; - else - BUG(); - - - cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, - v << __ffs(clkdm->clktrctrl_mask), - clkdm->pwrdm.ptr->prcm_offs, - CM_CLKSTCTRL); + _omap2_clkdm_set_hwsup(clkdm, 1); pwrdm_clkdm_state_switch(clkdm); } @@ -500,8 +517,6 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) */ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) { - u32 v; - if (!clkdm) return; @@ -514,16 +529,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) pr_debug("clockdomain: disabling automatic idle transitions for %s\n", clkdm->name); - if (cpu_is_omap24xx()) - v = OMAP24XX_CLKSTCTRL_DISABLE_AUTO; - else if (cpu_is_omap34xx()) - v = OMAP34XX_CLKSTCTRL_DISABLE_AUTO; - else - BUG(); - - cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, - v << __ffs(clkdm->clktrctrl_mask), - clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + _omap2_clkdm_set_hwsup(clkdm, 0); if (atomic_read(&clkdm->usecount) > 0) _clkdm_del_autodeps(clkdm); @@ -569,10 +575,14 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) v = omap2_clkdm_clktrctrl_read(clkdm); if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || - (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { + /* Disable HW transitions when we are changing deps */ + _omap2_clkdm_set_hwsup(clkdm, 0); _clkdm_add_autodeps(clkdm); - else + _omap2_clkdm_set_hwsup(clkdm, 1); + } else { omap2_clkdm_wakeup(clkdm); + } pwrdm_wait_transition(clkdm->pwrdm.ptr); pwrdm_clkdm_state_switch(clkdm); @@ -623,10 +633,14 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) v = omap2_clkdm_clktrctrl_read(clkdm); if ((cpu_is_omap34xx() && v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) || - (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) + (cpu_is_omap24xx() && v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO)) { + /* Disable HW transitions when we are changing deps */ + _omap2_clkdm_set_hwsup(clkdm, 0); _clkdm_del_autodeps(clkdm); - else + _omap2_clkdm_set_hwsup(clkdm, 1); + } else { omap2_clkdm_sleep(clkdm); + } pwrdm_clkdm_state_switch(clkdm); -- cgit v1.2.3 From a7f20b2695eb6a00a5464089bacf75b8ed64725e Mon Sep 17 00:00:00 2001 From: Paul Walmsley Date: Wed, 14 Oct 2009 16:40:37 -0600 Subject: OMAP2xxx clock: set up clockdomain pointer in struct clk clock24xx.c is missing a omap2_init_clk_clkdm() in its omap2_clk_init() function. Among other bad effects, this causes the OMAP hwmod layer to oops on boot. Thanks to Carlos Aguiar and Stefano Panella for reporting this bug. Thanks to Tony Lindgren for N800 booting advice. Signed-off-by: Paul Walmsley Cc: Carlos Aguiar Cc: Stefano Panella Cc: Tony Lindgren --- arch/arm/mach-omap2/clock24xx.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock24xx.c b/arch/arm/mach-omap2/clock24xx.c index bc5d3ac6661..e2dbedd581e 100644 --- a/arch/arm/mach-omap2/clock24xx.c +++ b/arch/arm/mach-omap2/clock24xx.c @@ -769,6 +769,7 @@ int __init omap2_clk_init(void) if (c->cpu & cpu_mask) { clkdev_add(&c->lk); clk_register(c->lk.clk); + omap2_init_clk_clkdm(c->lk.clk); } /* Check the MPU rate set by bootloader */ -- cgit v1.2.3 From 6135434a54719c45fdc6add1ba4965dea89ab069 Mon Sep 17 00:00:00 2001 From: Janusz Krzysztofik Date: Thu, 22 Oct 2009 14:43:17 -0700 Subject: omap: Fix omap-keypad by restoring old keypad.h without breaking omap2 boards that use matrix_keypad Only mach-omap2 boards are currently using matrix_keypad. Allow mach-omap1 boards to use the old style keypad.h without breaking. Created against linux-2.6.32-rc5. Compile tested with omap_3430sdp_defconfig and rx51_defconfig. Signed-off-by: Janusz Krzysztofik Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-3430sdp.c | 2 +- arch/arm/mach-omap2/board-ldp.c | 2 +- arch/arm/mach-omap2/board-omap3evm.c | 2 +- arch/arm/mach-omap2/board-omap3pandora.c | 2 +- arch/arm/mach-omap2/board-rx51-peripherals.c | 2 +- arch/arm/mach-omap2/board-rx51.c | 1 - arch/arm/mach-omap2/board-zoom2.c | 2 +- 7 files changed, 6 insertions(+), 7 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c index efaf053eba8..0acb5560229 100644 --- a/arch/arm/mach-omap2/board-3430sdp.c +++ b/arch/arm/mach-omap2/board-3430sdp.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -38,7 +39,6 @@ #include #include -#include #include #include "sdram-qimonda-hyb18m512160af-6.h" diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c index d110a7fdfbd..d57ec2f4d0a 100644 --- a/arch/arm/mach-omap2/board-ldp.c +++ b/arch/arm/mach-omap2/board-ldp.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -41,7 +42,6 @@ #include #include #include -#include #include "mmc-twl4030.h" diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index e4ec0c59121..4c4d7f8dbd7 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -37,7 +38,6 @@ #include #include #include -#include #include "sdram-micron-mt46h32m32lf-6.h" #include "mmc-twl4030.h" diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 7f6bf8772af..5326e0d6159 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include @@ -39,7 +40,6 @@ #include #include #include -#include #include #include "sdram-micron-mt46h32m32lf-6.h" diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 2b0eb1ba5d7..e34d96a825e 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -27,7 +28,6 @@ #include #include #include -#include #include #include diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c index f9196c3b1a7..78869a9a1cc 100644 --- a/arch/arm/mach-omap2/board-rx51.c +++ b/arch/arm/mach-omap2/board-rx51.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index fd3369d5e5c..ea00486a5e5 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -22,7 +23,6 @@ #include #include -#include #include "mmc-twl4030.h" #include "sdram-micron-mt46h32m32lf-6.h" -- cgit v1.2.3 From d2fbf3451d338ac68c8a555207183647074f78a0 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 22 Oct 2009 14:48:13 -0700 Subject: omap2: Fix detection of n8x0 Otherwise the machine_is_nokia_n8*() does not work. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 75b1c7efae7..aad194f61a3 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -73,9 +73,21 @@ config MACH_OMAP_3430SDP bool "OMAP 3430 SDP board" depends on ARCH_OMAP3 && ARCH_OMAP34XX +config MACH_NOKIA_N800 + bool + +config MACH_NOKIA_N810 + bool + +config MACH_NOKIA_N810_WIMAX + bool + config MACH_NOKIA_N8X0 bool "Nokia N800/N810" depends on ARCH_OMAP2420 + select MACH_NOKIA_N800 + select MACH_NOKIA_N810 + select MACH_NOKIA_N810_WIMAX config MACH_NOKIA_RX51 bool "Nokia RX-51 board" -- cgit v1.2.3 From b427f92f8cfca2787c18a77bef15cc8b13341774 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Thu, 22 Oct 2009 14:48:13 -0700 Subject: omap3: PM: enable UART3 module wakeups UART3 is in the PER powerdomain. If PER goes idle/inactive independently of CORE, for UART3 to wakeup it must have its wakeup enable bits setup in PM_WKEN_PER. This patch enables these bits. The reason it works when PER and CORE work together is because when CORE goes inactive/retention, the IOPAD wakeups are enabled and trigger UART3 wakeup. Without this patch, when the UART inactivity timer fires for UART3, its clocks are disabled and it's unable to wakeup so will be unusable until PER is awoken by another source. Another way of testing is by keeping CORE on during suspend but allowing PER to hit retention # echo 3 > /debug/pm_debug/core_pwrdm/suspend then enter suspend # echo mem > /sys/power/state Without this patch, UART3 will be unable to wakeup the system. Signed-off-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/pm34xx.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 378c2f61835..89463190923 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -639,14 +639,15 @@ static void __init prcm_setup_regs(void) prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); - /* Enable GPIO wakeups in PER */ + /* Enable wakeups in PER */ prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN); + OMAP3430_EN_GPIO6 | OMAP3430_EN_UART3, + OMAP3430_PER_MOD, PM_WKEN); /* and allow them to wake up MPU */ prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | - OMAP3430_GRPSEL_GPIO6, + OMAP3430_GRPSEL_GPIO6 | OMAP3430_EN_UART3, OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); /* Don't attach IVA interrupts */ -- cgit v1.2.3 From 5b7815b5ca2c7b44ebaaa33c66a3068d6de27bce Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Thu, 22 Oct 2009 14:48:14 -0700 Subject: omap4: Allow omap_serial_early_init() for OMAP4430 board This patch enables omap_serial_early_init() function for OMAP4430 SDP. Without this the bootup would throw oops in omap_serial_init(). Note that the ifndef CONFIG_ARCH_OMAP4 is split into two sections to enable omap_serial_early_init(). This ifndef cannot be removed until omap4 clock framework is implemented. Signed-off-by: Santosh Shilimkar Reviewed-By: Tony Lindgren Reviewed-By: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-4430sdp.c | 4 ++-- arch/arm/mach-omap2/io.c | 2 ++ 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c index eb37c40ea83..609a5a4a7e2 100644 --- a/arch/arm/mach-omap2/board-4430sdp.c +++ b/arch/arm/mach-omap2/board-4430sdp.c @@ -58,6 +58,8 @@ static void __init gic_init_irq(void) static void __init omap_4430sdp_init_irq(void) { + omap_board_config = sdp4430_config; + omap_board_config_size = ARRAY_SIZE(sdp4430_config); omap2_init_common_hw(NULL, NULL); #ifdef CONFIG_OMAP_32K_TIMER omap2_gp_clockevent_set_gptimer(1); @@ -70,8 +72,6 @@ static void __init omap_4430sdp_init_irq(void) static void __init omap_4430sdp_init(void) { platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); - omap_board_config = sdp4430_config; - omap_board_config_size = ARRAY_SIZE(sdp4430_config); omap_serial_init(); } diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index e3a3bad1d84..56be87d13ed 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -302,7 +302,9 @@ void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0, pwrdm_init(powerdomains_omap); clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); +#endif omap_serial_early_init(); +#ifndef CONFIG_ARCH_OMAP4 omap_hwmod_late_init(); omap_pm_if_init(); omap2_sdrc_init(sdrc_cs0, sdrc_cs1); -- cgit v1.2.3 From 54341c9b741dc5646842fe47eccfc3b506c6dafa Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Thu, 22 Oct 2009 14:48:14 -0700 Subject: omap4: Fix UART4 platform data on omap4 This patch removes the unnecessary UART4 platform which is under data is wrong because of this There is a separate platform structure for UART4 Signed-off-by: Santosh Shilimkar Reviewed-By: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/serial.c | 10 ---------- 1 file changed, 10 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index ae2186892c8..54dfeb5d566 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c @@ -109,16 +109,6 @@ static struct plat_serial8250_port serial_platform_data2[] = { .regshift = 2, .uartclk = OMAP24XX_BASE_BAUD * 16, }, { -#ifdef CONFIG_ARCH_OMAP4 - .membase = OMAP2_IO_ADDRESS(OMAP_UART4_BASE), - .mapbase = OMAP_UART4_BASE, - .irq = 70, - .flags = UPF_BOOT_AUTOCONF, - .iotype = UPIO_MEM, - .regshift = 2, - .uartclk = OMAP24XX_BASE_BAUD * 16, - }, { -#endif .flags = 0 } }; -- cgit v1.2.3 From 6d1352420901b0a74e6149a891ff4457f7199651 Mon Sep 17 00:00:00 2001 From: Tobias Klauser Date: Tue, 10 Nov 2009 18:55:19 -0800 Subject: omap: Use resource_size Use the resource_size function instead of manually calculating the resource size. This reduces the chance of introducing off-by-one errors and actually fixes one in mailbox.c. Signed-off-by: Tobias Klauser Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/gpmc.c | 2 +- arch/arm/mach-omap2/mailbox.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 15876828db2..f8657568b1b 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -366,7 +366,7 @@ int gpmc_cs_request(int cs, unsigned long size, unsigned long *base) if (r < 0) goto out; - gpmc_cs_enable_mem(cs, res->start, res->end - res->start + 1); + gpmc_cs_enable_mem(cs, res->start, resource_size(res)); *base = res->start; gpmc_cs_set_reserved(cs, 1); out: diff --git a/arch/arm/mach-omap2/mailbox.c b/arch/arm/mach-omap2/mailbox.c index c035ad3426d..ef57b38a56a 100644 --- a/arch/arm/mach-omap2/mailbox.c +++ b/arch/arm/mach-omap2/mailbox.c @@ -300,7 +300,7 @@ static int __devinit omap2_mbox_probe(struct platform_device *pdev) dev_err(&pdev->dev, "invalid mem resource\n"); return -ENODEV; } - mbox_base = ioremap(res->start, res->end - res->start); + mbox_base = ioremap(res->start, resource_size(res)); if (!mbox_base) return -ENOMEM; -- cgit v1.2.3 From 24de042ca4faa5dc1811d7b6a8b6eefd97ed7577 Mon Sep 17 00:00:00 2001 From: Grazvydas Ignotas Date: Wed, 11 Nov 2009 11:00:35 -0800 Subject: omap3: pandora: Fix keypad keymap The original TWL4030 keypad driver from linux-omap used KEY() macro defined as (col, row), but while it was merged upstream it was changed to use matrix keypad infrastructure, which uses (row, col) format. Update the keymap in board file to match layout of mainline driver. Signed-off-by: Grazvydas Ignotas Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-omap3pandora.c | 78 ++++++++++++++++---------------- 1 file changed, 39 insertions(+), 39 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index 5326e0d6159..7519edb6915 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -134,50 +134,50 @@ static void __init pandora_keys_gpio_init(void) } static int board_keymap[] = { - /* col, row, code */ + /* row, col, code */ KEY(0, 0, KEY_9), - KEY(0, 1, KEY_0), - KEY(0, 2, KEY_BACKSPACE), - KEY(0, 3, KEY_O), - KEY(0, 4, KEY_P), - KEY(0, 5, KEY_K), - KEY(0, 6, KEY_L), - KEY(0, 7, KEY_ENTER), - KEY(1, 0, KEY_8), + KEY(0, 1, KEY_8), + KEY(0, 2, KEY_I), + KEY(0, 3, KEY_J), + KEY(0, 4, KEY_N), + KEY(0, 5, KEY_M), + KEY(1, 0, KEY_0), KEY(1, 1, KEY_7), - KEY(1, 2, KEY_6), - KEY(1, 3, KEY_5), - KEY(1, 4, KEY_4), - KEY(1, 5, KEY_3), - KEY(1, 6, KEY_2), - KEY(1, 7, KEY_1), - KEY(2, 0, KEY_I), - KEY(2, 1, KEY_U), + KEY(1, 2, KEY_U), + KEY(1, 3, KEY_H), + KEY(1, 4, KEY_B), + KEY(1, 5, KEY_SPACE), + KEY(2, 0, KEY_BACKSPACE), + KEY(2, 1, KEY_6), KEY(2, 2, KEY_Y), - KEY(2, 3, KEY_T), - KEY(2, 4, KEY_R), - KEY(2, 5, KEY_E), - KEY(2, 6, KEY_W), - KEY(2, 7, KEY_Q), - KEY(3, 0, KEY_J), - KEY(3, 1, KEY_H), - KEY(3, 2, KEY_G), + KEY(2, 3, KEY_G), + KEY(2, 4, KEY_V), + KEY(2, 5, KEY_FN), + KEY(3, 0, KEY_O), + KEY(3, 1, KEY_5), + KEY(3, 2, KEY_T), KEY(3, 3, KEY_F), - KEY(3, 4, KEY_D), - KEY(3, 5, KEY_S), - KEY(3, 6, KEY_A), - KEY(3, 7, KEY_LEFTSHIFT), - KEY(4, 0, KEY_N), - KEY(4, 1, KEY_B), - KEY(4, 2, KEY_V), - KEY(4, 3, KEY_C), + KEY(3, 4, KEY_C), + KEY(4, 0, KEY_P), + KEY(4, 1, KEY_4), + KEY(4, 2, KEY_R), + KEY(4, 3, KEY_D), KEY(4, 4, KEY_X), - KEY(4, 5, KEY_Z), - KEY(4, 6, KEY_DOT), - KEY(4, 7, KEY_COMMA), - KEY(5, 0, KEY_M), - KEY(5, 1, KEY_SPACE), - KEY(5, 2, KEY_FN), + KEY(5, 0, KEY_K), + KEY(5, 1, KEY_3), + KEY(5, 2, KEY_E), + KEY(5, 3, KEY_S), + KEY(5, 4, KEY_Z), + KEY(6, 0, KEY_L), + KEY(6, 1, KEY_2), + KEY(6, 2, KEY_W), + KEY(6, 3, KEY_A), + KEY(6, 4, KEY_DOT), + KEY(7, 0, KEY_ENTER), + KEY(7, 1, KEY_1), + KEY(7, 2, KEY_Q), + KEY(7, 3, KEY_LEFTSHIFT), + KEY(7, 4, KEY_COMMA), }; static struct matrix_keymap_data board_map_data = { -- cgit v1.2.3 From e9840dc00468c4d2ca63b9f80038533d0f931d16 Mon Sep 17 00:00:00 2001 From: Jarkko Nikula Date: Wed, 11 Nov 2009 11:00:36 -0800 Subject: omap3: beagle: Fix USB host port power control The host port power is enabled by driving the nEN_USB_PWR low as stated in the comment. This fix is originally from Steve Sakoman . Signed-off-by: Jarkko Nikula Cc: Steve Sakoman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-omap3beagle.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c index 70df6b4dbcd..08b0816afa6 100644 --- a/arch/arm/mach-omap2/board-omap3beagle.c +++ b/arch/arm/mach-omap2/board-omap3beagle.c @@ -162,7 +162,7 @@ static int beagle_twl_gpio_setup(struct device *dev, /* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */ gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR"); - gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1); + gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0); /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; -- cgit v1.2.3 From f7343deb0f6e7654c60e97606aea388b9da612c2 Mon Sep 17 00:00:00 2001 From: Vimal Singh Date: Mon, 16 Nov 2009 14:55:59 -0800 Subject: omap: Fix keymap for zoom2 according to matrix keypad framwork Interpretation of 'row' and 'col' got reversed in matrix keymap framework. Also last element '0', present in keymap array, is no more needed. Correcting zoom2 keyboard keymap accordingly. Signed-off-by: Vimal Singh Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/board-zoom2.c | 87 +++++++++++++++++++-------------------- 1 file changed, 43 insertions(+), 44 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c index ea00486a5e5..51e0b3ba5f3 100644 --- a/arch/arm/mach-omap2/board-zoom2.c +++ b/arch/arm/mach-omap2/board-zoom2.c @@ -30,57 +30,56 @@ /* Zoom2 has Qwerty keyboard*/ static int board_keymap[] = { KEY(0, 0, KEY_E), - KEY(1, 0, KEY_R), - KEY(2, 0, KEY_T), - KEY(3, 0, KEY_HOME), - KEY(6, 0, KEY_I), - KEY(7, 0, KEY_LEFTSHIFT), - KEY(0, 1, KEY_D), + KEY(0, 1, KEY_R), + KEY(0, 2, KEY_T), + KEY(0, 3, KEY_HOME), + KEY(0, 6, KEY_I), + KEY(0, 7, KEY_LEFTSHIFT), + KEY(1, 0, KEY_D), KEY(1, 1, KEY_F), - KEY(2, 1, KEY_G), - KEY(3, 1, KEY_SEND), - KEY(6, 1, KEY_K), - KEY(7, 1, KEY_ENTER), - KEY(0, 2, KEY_X), - KEY(1, 2, KEY_C), + KEY(1, 2, KEY_G), + KEY(1, 3, KEY_SEND), + KEY(1, 6, KEY_K), + KEY(1, 7, KEY_ENTER), + KEY(2, 0, KEY_X), + KEY(2, 1, KEY_C), KEY(2, 2, KEY_V), - KEY(3, 2, KEY_END), - KEY(6, 2, KEY_DOT), - KEY(7, 2, KEY_CAPSLOCK), - KEY(0, 3, KEY_Z), - KEY(1, 3, KEY_KPPLUS), - KEY(2, 3, KEY_B), + KEY(2, 3, KEY_END), + KEY(2, 6, KEY_DOT), + KEY(2, 7, KEY_CAPSLOCK), + KEY(3, 0, KEY_Z), + KEY(3, 1, KEY_KPPLUS), + KEY(3, 2, KEY_B), KEY(3, 3, KEY_F1), - KEY(6, 3, KEY_O), - KEY(7, 3, KEY_SPACE), - KEY(0, 4, KEY_W), - KEY(1, 4, KEY_Y), - KEY(2, 4, KEY_U), - KEY(3, 4, KEY_F2), + KEY(3, 6, KEY_O), + KEY(3, 7, KEY_SPACE), + KEY(4, 0, KEY_W), + KEY(4, 1, KEY_Y), + KEY(4, 2, KEY_U), + KEY(4, 3, KEY_F2), KEY(4, 4, KEY_VOLUMEUP), - KEY(6, 4, KEY_L), - KEY(7, 4, KEY_LEFT), - KEY(0, 5, KEY_S), - KEY(1, 5, KEY_H), - KEY(2, 5, KEY_J), - KEY(3, 5, KEY_F3), + KEY(4, 6, KEY_L), + KEY(4, 7, KEY_LEFT), + KEY(5, 0, KEY_S), + KEY(5, 1, KEY_H), + KEY(5, 2, KEY_J), + KEY(5, 3, KEY_F3), KEY(5, 5, KEY_VOLUMEDOWN), - KEY(6, 5, KEY_M), - KEY(4, 5, KEY_ENTER), - KEY(7, 5, KEY_RIGHT), - KEY(0, 6, KEY_Q), - KEY(1, 6, KEY_A), - KEY(2, 6, KEY_N), - KEY(3, 6, KEY_BACKSPACE), + KEY(5, 6, KEY_M), + KEY(5, 7, KEY_ENTER), + KEY(6, 0, KEY_Q), + KEY(6, 1, KEY_A), + KEY(6, 2, KEY_N), + KEY(6, 3, KEY_BACKSPACE), KEY(6, 6, KEY_P), - KEY(7, 6, KEY_UP), KEY(6, 7, KEY_SELECT), - KEY(7, 7, KEY_DOWN), - KEY(0, 7, KEY_PROG1), /*MACRO 1 */ - KEY(1, 7, KEY_PROG2), /*MACRO 2 */ - KEY(2, 7, KEY_PROG3), /*MACRO 3 */ - KEY(3, 7, KEY_PROG4), /*MACRO 4 */ - 0 + KEY(7, 0, KEY_PROG1), /*MACRO 1 */ + KEY(7, 1, KEY_PROG2), /*MACRO 2 */ + KEY(7, 2, KEY_PROG3), /*MACRO 3 */ + KEY(7, 3, KEY_PROG4), /*MACRO 4 */ + KEY(7, 5, KEY_RIGHT), + KEY(7, 6, KEY_UP), + KEY(7, 7, KEY_DOWN) }; static struct matrix_keymap_data board_map_data = { -- cgit v1.2.3 From 9346f48b26a4b48a7d56314bbb94e6b801e28316 Mon Sep 17 00:00:00 2001 From: Rajendra Nayak Date: Mon, 16 Nov 2009 13:36:53 +0000 Subject: omap3: clock: Fix the DPLL freqsel computations Fix the freqsel value computation. Use n instead of (n+1) The formula in the TRM uses a zero-based N, hence the (n+1); however at this point in the clock34xx.c code, N is one-based. Hayati Bayrakdar and Nishanth Menon helped track down this bug. Signed-off-by: Rajendra Nayak Signed-off-by: Paul Walmsley [paul@pwsan.com: modified commit message] Cc: Hayati Bayrakdar Cc: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 489556eecbd..7c5c00df3c7 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -473,7 +473,7 @@ static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) unsigned long fint; u16 f = 0; - fint = clk->dpll_data->clk_ref->rate / (n + 1); + fint = clk->dpll_data->clk_ref->rate / n; pr_debug("clock: fint is %lu\n", fint); -- cgit v1.2.3 From 72f962fc7bc00f5ff4991912b889f87b464f7f1a Mon Sep 17 00:00:00 2001 From: Tero Kristo Date: Mon, 16 Nov 2009 13:36:54 +0000 Subject: omap3: clock: Fixed dpll3_m2x2 rate calculation Current calculation does not take into account any changes to M2 divisor, and thus when we change VDD2 OPP, dpll3_m2x2 rate does not change. Fixed by re-routing dpll3_m2x2 parent to dpll3_m2. Signed-off-by: Tero Kristo Signed-off-by: Paul Walmsley Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/clock34xx.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h index c8119781e00..9565c05bebd 100644 --- a/arch/arm/mach-omap2/clock34xx.h +++ b/arch/arm/mach-omap2/clock34xx.h @@ -489,9 +489,9 @@ static struct clk core_ck = { static struct clk dpll3_m2x2_ck = { .name = "dpll3_m2x2_ck", .ops = &clkops_null, - .parent = &dpll3_x2_ck, + .parent = &dpll3_m2_ck, .clkdm_name = "dpll3_clkdm", - .recalc = &followparent_recalc, + .recalc = &omap3_clkoutx2_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ -- cgit v1.2.3 From e7fdc6052e78738ce90e0bdc051f2ddf60e41324 Mon Sep 17 00:00:00 2001 From: Roel Kluin Date: Tue, 17 Nov 2009 14:39:06 -0800 Subject: OMAP: cs should be positive in gpmc_cs_free() The index `cs' is signed, test whether it is negative before we release gpmc_cs_mem[cs]. Signed-off-by: Roel Kluin Cc: Russell King Signed-off-by: Tony Lindgren Signed-off-by: Andrew Morton --- arch/arm/mach-omap2/gpmc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-omap2') diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index f8657568b1b..f3c992e2965 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -378,7 +378,7 @@ EXPORT_SYMBOL(gpmc_cs_request); void gpmc_cs_free(int cs) { spin_lock(&gpmc_mem_lock); - if (cs >= GPMC_CS_NUM || !gpmc_cs_reserved(cs)) { + if (cs >= GPMC_CS_NUM || cs < 0 || !gpmc_cs_reserved(cs)) { printk(KERN_ERR "Trying to free non-reserved GPMC CS%d\n", cs); BUG(); spin_unlock(&gpmc_mem_lock); -- cgit v1.2.3