From 56b34426888d35b3b6367c216bbfb17b82b4f0ac Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:12 +0000 Subject: [ARM] S3C: Make IRQ_EINT sleep control common Move the IRQ_EINT sleep control to be available to all s3c impelmentations. Since s3c_irqext_wake is not large, place it in arch/arm/plat-s3c/pm.c as adding it to a new file would be a waste of compile time. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/include/mach/irqs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-s3c2410/include') diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index 49efce8cd4a..0cd89b73577 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h @@ -80,7 +80,7 @@ #define IRQ_EINT22 S3C2410_IRQ(50) #define IRQ_EINT23 S3C2410_IRQ(51) - +#define IRQ_EINT_BIT(x) ((x) - (IRQ_EINT4 + 4)) #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) #define IRQ_LCD_FIFO S3C2410_IRQ(52) -- cgit v1.2.3 From 598ee00207a561572e011c49e39144a321ef3979 Mon Sep 17 00:00:00 2001 From: Andy Green Date: Fri, 12 Dec 2008 00:24:13 +0000 Subject: [ARM] S3C24XX: Fix bug in IRQ_EINT_BIT() calculation There's a bug in calculation of IRQ_EINT_BIT introduced on the test branch for pm changes for s3c by Ben Dooks fixed in this patch. There's also a bit of a mystery about how wake gets to wake EINT set of interrupts, I added a couple of lines that make it work for EINT4+ but not sure what's meant to be there for EINT0-3. Still, this gets GTA02 resume working again. Signed-off-by: Andy Green [ben-linux@fluff.org: remove irq-pm.c change] Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/include/mach/irqs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/mach-s3c2410/include') diff --git a/arch/arm/mach-s3c2410/include/mach/irqs.h b/arch/arm/mach-s3c2410/include/mach/irqs.h index 0cd89b73577..2a2384ffa7b 100644 --- a/arch/arm/mach-s3c2410/include/mach/irqs.h +++ b/arch/arm/mach-s3c2410/include/mach/irqs.h @@ -80,7 +80,7 @@ #define IRQ_EINT22 S3C2410_IRQ(50) #define IRQ_EINT23 S3C2410_IRQ(51) -#define IRQ_EINT_BIT(x) ((x) - (IRQ_EINT4 + 4)) +#define IRQ_EINT_BIT(x) ((x) - IRQ_EINT4 + 4) #define IRQ_EINT(x) (((x) >= 4) ? (IRQ_EINT4 + (x) - 4) : (IRQ_EINT0 + (x))) #define IRQ_LCD_FIFO S3C2410_IRQ(52) -- cgit v1.2.3 From 67c2addcb08df4827fbb7af88b57cce2ba71e34b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Fri, 12 Dec 2008 00:24:29 +0000 Subject: [ARM] S3C24XX: Add S3C_GPIO_END definition Add the definition for S3C_GPIO_END to allow the PM code to build. This means moving the GPIO bank numbers to a separate file to allow the gpio and regs-gpio to include them. Including regs-gpio.h into gpio.h causes too many build problems and adding gpio.h would mean editing a large number of files. Signed-off-by: Ben Dooks --- arch/arm/mach-s3c2410/include/mach/gpio-nrs.h | 23 +++++++++++++++++++++++ arch/arm/mach-s3c2410/include/mach/gpio.h | 3 +++ arch/arm/mach-s3c2410/include/mach/regs-gpio.h | 11 +---------- 3 files changed, 27 insertions(+), 10 deletions(-) create mode 100644 arch/arm/mach-s3c2410/include/mach/gpio-nrs.h (limited to 'arch/arm/mach-s3c2410/include') diff --git a/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h new file mode 100644 index 00000000000..ce1ec69806a --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/gpio-nrs.h @@ -0,0 +1,23 @@ +/* arch/arm/mach-s3c2410/include/mach/gpio-nrs.h + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C2410 - GPIO bank numbering + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) + +#define S3C2410_GPIO_BANKA (32*0) +#define S3C2410_GPIO_BANKB (32*1) +#define S3C2410_GPIO_BANKC (32*2) +#define S3C2410_GPIO_BANKD (32*3) +#define S3C2410_GPIO_BANKE (32*4) +#define S3C2410_GPIO_BANKF (32*5) +#define S3C2410_GPIO_BANKG (32*6) +#define S3C2410_GPIO_BANKH (32*7) diff --git a/arch/arm/mach-s3c2410/include/mach/gpio.h b/arch/arm/mach-s3c2410/include/mach/gpio.h index 00476a573bb..51a88cf9526 100644 --- a/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/gpio.h @@ -23,3 +23,6 @@ #define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) #include +#include + +#define S3C_GPIO_END (S3C2410_GPIO_BANKH + 32) diff --git a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h index 32107761306..35a03df473f 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-gpio.h @@ -14,16 +14,7 @@ #ifndef __ASM_ARCH_REGS_GPIO_H #define __ASM_ARCH_REGS_GPIO_H -#define S3C2410_GPIONO(bank,offset) ((bank) + (offset)) - -#define S3C2410_GPIO_BANKA (32*0) -#define S3C2410_GPIO_BANKB (32*1) -#define S3C2410_GPIO_BANKC (32*2) -#define S3C2410_GPIO_BANKD (32*3) -#define S3C2410_GPIO_BANKE (32*4) -#define S3C2410_GPIO_BANKF (32*5) -#define S3C2410_GPIO_BANKG (32*6) -#define S3C2410_GPIO_BANKH (32*7) +#include #ifdef CONFIG_CPU_S3C2400 #define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) -- cgit v1.2.3