From 39e1d4c18f34190c739f765ae56bfaa9cbbc6fdb Mon Sep 17 00:00:00 2001 From: Santosh Shilimkar Date: Tue, 28 Apr 2009 20:52:00 +0530 Subject: ARM: OMAP4: SMP: Add mpu timer support for OMAP4430 This patch adds SMP platform specific parts for local(mpu) timer support for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the MPU domain. These timers are not in wakeup domain. Signed-off-by: Santosh Shilimkar --- arch/arm/plat-omap/include/mach/entry-macro.S | 28 +++++++++++++++++++++++++++ arch/arm/plat-omap/include/mach/irqs.h | 2 ++ 2 files changed, 30 insertions(+) (limited to 'arch/arm/plat-omap') diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S index 00f45c01390..56426ed45ef 100644 --- a/arch/arm/plat-omap/include/mach/entry-macro.S +++ b/arch/arm/plat-omap/include/mach/entry-macro.S @@ -136,6 +136,34 @@ cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr .endm + + /* We assume that irqstat (the raw value of the IRQ acknowledge + * register) is preserved from the macro above. + * If there is an IPI, we immediately signal end of interrupt + * on the controller, since this requires the original irqstat + * value which we won't easily be able to recreate later. + */ + + .macro test_for_ipi, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + cmp \irqnr, #16 + it cc + strcc \irqstat, [\base, #GIC_CPU_EOI] + it cs + cmpcs \irqnr, \irqnr + .endm + + /* As above, this assumes that irqstat and base are preserved */ + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + bic \irqnr, \irqstat, #0x1c00 + mov \tmp, #0 + cmp \irqnr, #29 + itt eq + moveq \tmp, #1 + streq \irqstat, [\base, #GIC_CPU_EOI] + cmp \tmp, #0 + .endm #endif .macro irq_prio_table diff --git a/arch/arm/plat-omap/include/mach/irqs.h b/arch/arm/plat-omap/include/mach/irqs.h index 8015fe27c8b..fb7cb772399 100644 --- a/arch/arm/plat-omap/include/mach/irqs.h +++ b/arch/arm/plat-omap/include/mach/irqs.h @@ -427,6 +427,8 @@ #define IRQ_GIC_START 32 +#define INT_44XX_LOCALTIMER_IRQ 29 +#define INT_44XX_LOCALWDT_IRQ 30 #define INT_44XX_BENCH_MPU_EMUL (3 + IRQ_GIC_START) #define INT_44XX_SSM_ABORT_IRQ (6 + IRQ_GIC_START) -- cgit v1.2.3