From b2a6cf3b1e099a724504ba16a4c9aea1eb0122a6 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:06:20 +0100 Subject: [ARM] S3C24XX: Default SPI pin configuration for SPI Add a set of default pin configuration routines for setting up the SPI gpio configuration when using the hardware SPI driver. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c | 37 +++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c (limited to 'arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c') diff --git a/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c new file mode 100644 index 00000000000..8fccd4e549f --- /dev/null +++ b/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c @@ -0,0 +1,37 @@ +/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpg5_6_7.c + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C24XX SPI - gpio configuration for bus 1 on gpg5,6,7 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. +*/ + +#include + +#include + +#include +#include + +void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, + int enable) +{ + if (enable) { + s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1); + s3c2410_gpio_pullup(S3C2410_GPG5, 0); + s3c2410_gpio_pullup(S3C2410_GPG6, 0); + } else { + s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPG5, 1); + s3c2410_gpio_pullup(S3C2410_GPG6, 1); + s3c2410_gpio_pullup(S3C2410_GPG7, 1); + } +} -- cgit v1.2.3