From 6972d14fb604e3065189686476ecc01f9d1f22d9 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 25 Feb 2009 00:41:17 +0000 Subject: S3C64XX: Add DMA/SDMA clock sources Add the clock sources for the DMA and SDMA controllers and ensure that they are shut down at startup. The DMA engines are dma0 and dma1, whilst the SDMA are called dma2 and dma3. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c64xx/clock.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'arch/arm/plat-s3c64xx/clock.c') diff --git a/arch/arm/plat-s3c64xx/clock.c b/arch/arm/plat-s3c64xx/clock.c index 136c982c68e..b12fc8ad217 100644 --- a/arch/arm/plat-s3c64xx/clock.c +++ b/arch/arm/plat-s3c64xx/clock.c @@ -152,6 +152,30 @@ static struct clk init_clocks_disable[] = { .parent = &clk_48m, .enable = s3c64xx_sclk_ctrl, .ctrlbit = S3C_CLKCON_SCLK_MMC2_48, + }, { + .name = "dma0", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_DMA0, + }, { + .name = "dma1", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_DMA1, + }, { + .name = "dma2", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_SDMA0, + }, { + .name = "dma3", + .id = -1, + .parent = &clk_h, + .enable = s3c64xx_hclk_ctrl, + .ctrlbit = S3C_CLKCON_HCLK_SDMA1, }, }; -- cgit v1.2.3