From e19e5349be8de4b2ea89a251f44c4ec6ae624c45 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Tue, 21 Oct 2008 14:07:08 +0100 Subject: [ARM] S3C64XX: Add IRQ_EINT support Add the necessary code to support IRQ_EINT(x) on the S3C64XX series of CPUs. Note, since there is no GPIO configuration support in the kernel, the irq set_type method does not configure the relevant pin to interrupt. Signed-off-by: Ben Dooks --- arch/arm/plat-s3c64xx/include/plat/irqs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/plat-s3c64xx/include') diff --git a/arch/arm/plat-s3c64xx/include/plat/irqs.h b/arch/arm/plat-s3c64xx/include/plat/irqs.h index 8bdfb27425e..5ab41ad143b 100644 --- a/arch/arm/plat-s3c64xx/include/plat/irqs.h +++ b/arch/arm/plat-s3c64xx/include/plat/irqs.h @@ -150,7 +150,8 @@ #define S3C_IRQ_EINT_BASE S3C_IRQ(64+5) -#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) +#define S3C_EINT(x) ((x) + S3C_IRQ_EINT_BASE) +#define IRQ_EINT(x) S3C_EINT(x) /* Define NR_IRQs here, machine specific can always re-define. * Currently the IRQ_EINT27 is the last one we can have. */ -- cgit v1.2.3