From aa9ad6ad9c16e1daff41792c485f46e601a5af33 Mon Sep 17 00:00:00 2001 From: Harald Welte Date: Tue, 1 Dec 2009 01:24:34 +0000 Subject: ARM: SAMSUNG: Add core clock implementation for clksrc based clocks Add a core for the clksrc clock implementation, which is found in many of the newer Samsung SoCs into plat-samsung. Signed-off-by: Harald Welte [ben-linux@fluff.org: split from original patch to make change smaller] [ben-linux@fluff.org: split clk and clksrc changes] [ben-linux@fluff.org: moved to plat-samsung from plat-s3c] [ben-linux@fluff.org: re-wrote headers after splits] [ben-linux@fluff.org: added better documentation to headers] Signed-off-by: Ben Dooks --- arch/arm/plat-samsung/include/plat/clock-clksrc.h | 75 +++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 arch/arm/plat-samsung/include/plat/clock-clksrc.h (limited to 'arch/arm/plat-samsung/include') diff --git a/arch/arm/plat-samsung/include/plat/clock-clksrc.h b/arch/arm/plat-samsung/include/plat/clock-clksrc.h new file mode 100644 index 00000000000..283dfa02875 --- /dev/null +++ b/arch/arm/plat-samsung/include/plat/clock-clksrc.h @@ -0,0 +1,75 @@ +/* linux/arch/arm/plat-samsung/include/plat/clock-clksrc.h + * + * Parts taken from arch/arm/plat-s3c64xx/clock.c + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks + * http://armlinux.simtec.co.uk/ + * + * Copyright 2009 Ben Dooks + * Copyright 2009 Harald Welte + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/** + * struct clksrc_sources - list of sources for a given clock + * @sources: array of pointers to clocks + * @nr_sources: The size of @sources + */ +struct clksrc_sources { + unsigned int nr_sources; + struct clk **sources; +}; + +/** + * struct clksrc_reg - register definition for clock control bits + * @reg: pointer to the register in virtual memory. + * @shift: the shift in bits to where the bitfield is. + * @size: the size in bits of the bitfield. + * + * This specifies the size and position of the bits we are interested + * in within the register specified by @reg. + */ +struct clksrc_reg { + void __iomem *reg; + unsigned short shift; + unsigned short size; +}; + +/** + * struct clksrc_clk - class of clock for newer style samsung devices. + * @clk: the standard clock representation + * @sources: the sources for this clock + * @reg_src: the register definition for selecting the clock's source + * @reg_div: the register definition for the clock's output divisor + * + * This clock implements the features required by the newer SoCs where + * the standard clock block provides an input mux and a post-mux divisor + * to provide the periperhal's clock. + * + * The array of @sources provides the mapping of mux position to the + * clock, and @reg_src shows the code where to modify to change the mux + * position. The @reg_div defines how to change the divider settings on + * the output. + */ +struct clksrc_clk { + struct clk clk; + struct clksrc_sources *sources; + + struct clksrc_reg reg_src; + struct clksrc_reg reg_div; +}; + +extern void s3c_set_clksrc(struct clksrc_clk *clk); + +/** + * s3c_register_clksrc() register clocks from an array of clksrc clocks + * @srcs: The array of clocks to register + * @size: The size of the @srcs array. + * + * Initialise and register the array of clocks described by @srcs. + */ +extern void s3c_register_clksrc(struct clksrc_clk *srcs, int size); -- cgit v1.2.3